1b78e86fb8
Change-Id: Ia7750df3dd4ec4bd68624c800a0241c70eea7ca4
1086 lines
23 KiB
C
1086 lines
23 KiB
C
#include <minix/blockdriver.h>
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#include <minix/drivers.h>
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#include <minix/ds.h>
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#include <minix/i2c.h>
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#include <minix/i2cdriver.h>
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#include <minix/log.h>
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#include <ctype.h>
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#include <stdio.h>
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#include <stdlib.h>
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/* constants */
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#define NR_DEVS 1 /* number of devices this driver handles */
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#define TDA19988_DEV 0 /* index of TDA19988 device */
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#define EDID_LEN 128 /* length of standard EDID block */
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/* When passing data over a grant one needs to pass
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* a buffer to sys_safecopy copybuff is used for that*/
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#define COPYBUF_SIZE 0x1000 /* 4k buf */
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static unsigned char copybuf[COPYBUF_SIZE];
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/* The device has two I2C interfaces CEC (0x34) and HDMI (0x70). This driver
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* needs access to both.
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*/
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/*
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* CEC - Register and Bit Definitions
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*/
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#define CEC_STATUS_REG 0xfe
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#define CEC_STATUS_CONNECTED_MASK 0x02
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#define CEC_ENABLE_REG 0xff
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#define CEC_ENABLE_ALL_MASK 0x87
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/*
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* HDMI - Pages
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*
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* The HDMI part is much bigger than the CEC part. Memory is accessed according
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* to page and address. Once the page is set, only the address needs to be
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* sent if accessing memory locations within the same page (you don't need to
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* send the page number every time).
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*/
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#define HDMI_CTRL_PAGE 0x00
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#define HDMI_PPL_PAGE 0x02
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#define HDMI_EDID_PAGE 0x09
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#define HDMI_INFO_PAGE 0x10
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#define HDMI_AUDIO_PAGE 0x11
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#define HDMI_HDCP_OTP_PAGE 0x12
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#define HDMI_GAMUT_PAGE 0x13
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/*
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* The page select register isn't part of a page. A dummy value of 0xff is
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* used to signfiy this in the code.
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*/
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#define HDMI_PAGELESS 0xff
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/*
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* Control Page Registers and Bit Definitions
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*/
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#define HDMI_CTRL_REV_LO_REG 0x00
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#define HDMI_CTRL_REV_HI_REG 0x02
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#define HDMI_CTRL_RESET_REG 0x0a
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#define HDMI_CTRL_RESET_DDC_MASK 0x02
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#define HDMI_CTRL_DDC_CTRL_REG 0x0b
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#define HDMI_CTRL_DDC_EN_MASK 0x00
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#define HDMI_CTRL_DDC_CLK_REG 0x0c
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#define HDMI_CTRL_DDC_CLK_EN_MASK 0x01
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#define HDMI_CTRL_INTR_CTRL_REG 0x0f
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#define HDMI_CTRL_INTR_EN_GLO_MASK 0x04
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#define HDMI_CTRL_INT_REG 0x11
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#define HDMI_CTRL_INT_EDID_MASK 0x02
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/*
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* EDID Page Registers and Bit Definitions
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*/
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#define HDMI_EDID_DATA_REG 0x00
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#define HDMI_EDID_DEV_ADDR_REG 0xfb
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#define HDMI_EDID_DEV_ADDR 0xa0
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#define HDMI_EDID_OFFSET_REG 0xfc
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#define HDMI_EDID_OFFSET 0x00
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#define HDMI_EDID_SEG_PTR_ADDR_REG 0xfc
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#define HDMI_EDID_SEG_PTR_ADDR 0x00
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#define HDMI_EDID_SEG_ADDR_REG 0xfe
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#define HDMI_EDID_SEG_ADDR 0x00
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#define HDMI_EDID_REQ_REG 0xfa
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#define HDMI_EDID_REQ_READ_MASK 0x01
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/*
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* HDCP and OTP
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*/
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#define HDMI_HDCP_OTP_DDC_CLK_REG 0x9a
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#define HDMI_HDCP_OTP_DDC_CLK_MASK 0x27
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/* this register/mask isn't documented but it has to be cleared/set */
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#define HDMI_HDCP_OTP_SOME_REG 0x9b
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#define HDMI_HDCP_OTP_SOME_MASK 0x02
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/*
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* Pageless Registers
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*/
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#define HDMI_PAGE_SELECT_REG 0xff
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/*
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* Constants
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*/
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/* Revision of the TDA19988. */
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#define HDMI_REV_TDA19988 0x0331
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/* the bus that this device is on (counting starting at 1) */
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static uint32_t cec_bus;
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static uint32_t hdmi_bus;
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/* slave address of the device */
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static i2c_addr_t cec_address;
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static i2c_addr_t hdmi_address;
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/* endpoint for the driver for the bus itself. */
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static endpoint_t cec_bus_endpoint;
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static endpoint_t hdmi_bus_endpoint;
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/* logging - use with log_warn(), log_info(), log_debug(), log_trace(), etc */
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static struct log log = {
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.name = "tda19988",
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.log_level = LEVEL_INFO,
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.log_func = default_log
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};
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static void sef_local_startup(void);
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static int sef_cb_lu_state_save(int);
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static int lu_state_restore(void);
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static int sef_cb_init(int type, sef_init_info_t * info);
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/* CEC Module */
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static int is_display_connected(void);
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static int enable_hdmi_module(void);
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/* HDMI Module */
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static int set_page(uint8_t page);
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static int hdmi_read(uint8_t page, uint8_t reg, uint8_t * val);
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static int hdmi_write(uint8_t page, uint8_t reg, uint8_t val);
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static int hdmi_set(uint8_t page, uint8_t reg, uint8_t mask);
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static int hdmi_clear(uint8_t page, uint8_t reg, uint8_t mask);
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static int hdmi_ddc_enable(void);
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static int hdmi_init(void);
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static int check_revision(void);
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static int read_edid(uint8_t * data, size_t count);
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/* libblockdriver callbacks */
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static int tda19988_blk_open(dev_t minor, int access);
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static int tda19988_blk_close(dev_t minor);
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static ssize_t tda19988_blk_transfer(dev_t minor, int do_write, u64_t pos,
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endpoint_t endpt, iovec_t * iov, unsigned count, int flags);
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static int tda19988_blk_ioctl(dev_t minor, unsigned int request,
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endpoint_t endpt, cp_grant_id_t grant);
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static struct device *tda19988_blk_part(dev_t minor);
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static int tda19988_blk_other(message * m);
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/* Entry points into the device dependent code of block drivers. */
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struct blockdriver tda19988_tab = {
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.bdr_type = BLOCKDRIVER_TYPE_OTHER,
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.bdr_open = tda19988_blk_open,
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.bdr_close = tda19988_blk_close,
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.bdr_transfer = tda19988_blk_transfer,
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.bdr_ioctl = tda19988_blk_ioctl, /* nop -- always returns EINVAL */
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.bdr_cleanup = NULL, /* nothing allocated -- nothing to clean up */
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.bdr_part = tda19988_blk_part,
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.bdr_geometry = NULL, /* no geometry (cylinders, heads, sectors, etc) */
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.bdr_intr = NULL, /* i2c devices don't generate interrupts */
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.bdr_alarm = NULL, /* alarm not needed */
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.bdr_other = tda19988_blk_other, /* to recv notify events from DS */
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.bdr_device = NULL /* 1 insance per device, threads not needed */
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};
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/* counts the number of times a device file is open */
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static int openct[NR_DEVS];
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/* base and size of each device */
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static struct device geom[NR_DEVS];
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static int
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tda19988_blk_open(dev_t minor, int access)
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{
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log_trace(&log, "tda19988_blk_open(%d,%d)\n", minor, access);
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if (tda19988_blk_part(minor) == NULL) {
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return ENXIO;
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}
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openct[minor]++;
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return OK;
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}
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static int
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tda19988_blk_close(dev_t minor)
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{
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log_trace(&log, "tda19988_blk_close(%d)\n", minor);
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if (tda19988_blk_part(minor) == NULL) {
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return ENXIO;
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}
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if (openct[minor] < 1) {
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log_warn(&log, "closing unopened device %d\n", minor);
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return EINVAL;
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}
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openct[minor]--;
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return OK;
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}
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static ssize_t
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tda19988_blk_transfer(dev_t minor, int do_write, u64_t pos64,
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endpoint_t endpt, iovec_t * iov, unsigned nr_req, int flags)
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{
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unsigned count;
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struct device *dv;
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u64_t dv_size;
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int r;
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u64_t position;
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cp_grant_id_t grant;
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log_trace(&log, "tda19988_blk_transfer()\n");
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/* Get minor device information. */
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dv = tda19988_blk_part(minor);
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if (dv == NULL) {
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return ENXIO;
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}
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if (nr_req > NR_IOREQS) {
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return EINVAL;
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}
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dv_size = dv->dv_size;
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if (pos64 >= dv_size) {
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return OK; /* Beyond EOF */
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}
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if (nr_req > 0) {
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/* How much to transfer and where to / from. */
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count = iov->iov_size;
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grant = (cp_grant_id_t) iov->iov_addr;
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/* check for EOF */
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if (pos64 >= dv_size) {
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return 0;
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}
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/* don't go past the end of the device */
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if (pos64 + count > dv_size) {
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count = dv_size - position;
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}
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/* don't overflow copybuf */
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if (count > COPYBUF_SIZE) {
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count = COPYBUF_SIZE;
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}
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log_debug(&log, "transfering 0x%x bytes\n", count);
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if (do_write) {
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log_warn(&log, "Error: writing to read-only device\n");
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return EACCES;
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} else {
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if (is_display_connected() == 1) {
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r = hdmi_init();
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if (r != OK) {
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log_warn(&log,
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"Failed to enable HDMI module\n");
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return EIO;
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}
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memset(copybuf, '\0', COPYBUF_SIZE);
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r = read_edid(copybuf, count);
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if (r != OK) {
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log_warn(&log,
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"read_edid() failed (r=%d)\n", r);
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return r;
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}
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r = sys_safecopyto(endpt, grant, (vir_bytes)
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0, (vir_bytes) copybuf, count);
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if (r != OK) {
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log_warn(&log, "safecopyto failed\n");
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return EINVAL;
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}
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return iov->iov_size;
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} else {
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log_warn(&log, "Display not connected.\n");
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return ENODEV;
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}
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}
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} else {
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/* empty request */
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return 0;
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}
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}
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static int
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tda19988_blk_ioctl(dev_t minor, unsigned int request, endpoint_t endpt,
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cp_grant_id_t grant)
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{
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log_trace(&log, "tda19988_blk_ioctl(%d)\n", minor);
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/* no supported ioctls for this device */
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return EINVAL;
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}
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static struct device *
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tda19988_blk_part(dev_t minor)
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{
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log_trace(&log, "tda19988_blk_part(%d)\n", minor);
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if (minor >= NR_DEVS) {
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return NULL;
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}
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return &geom[minor];
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}
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static int
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tda19988_blk_other(message * m)
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{
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int r;
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log_trace(&log, "tda19988_blk_other(0x%x)\n", m->m_type);
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switch (m->m_type) {
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case NOTIFY_MESSAGE:
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if (m->m_source == DS_PROC_NR) {
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log_debug(&log,
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"bus driver changed state, update endpoint\n");
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i2cdriver_handle_bus_update(&cec_bus_endpoint, cec_bus,
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cec_address);
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i2cdriver_handle_bus_update(&hdmi_bus_endpoint,
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hdmi_bus, hdmi_address);
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}
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r = OK;
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break;
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default:
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log_warn(&log, "Invalid message type (0x%x)\n", m->m_type);
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r = EINVAL;
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break;
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}
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return r;
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}
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/*
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* Check to see if a display is connected.
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* Returns 1 for yes, 0 for no, -1 for error.
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*/
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static int
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is_display_connected(void)
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{
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int r;
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minix_i2c_ioctl_exec_t ioctl_exec;
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memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
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/* Read from CEC */
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ioctl_exec.iie_op = I2C_OP_READ_WITH_STOP;
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ioctl_exec.iie_addr = cec_address;
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/* write the register address */
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ioctl_exec.iie_cmd[0] = CEC_STATUS_REG;
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ioctl_exec.iie_cmdlen = 1;
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/* read 1 byte */
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ioctl_exec.iie_buflen = 1;
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r = i2cdriver_exec(cec_bus_endpoint, &ioctl_exec);
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if (r != OK) {
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log_warn(&log, "Reading connection status failed (r=%d)\n", r);
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return -1;
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}
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if ((CEC_STATUS_CONNECTED_MASK & ioctl_exec.iie_buf[0]) == 0) {
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log_debug(&log, "No Display Detected\n");
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return 0;
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} else {
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log_debug(&log, "Display Detected\n");
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return 1;
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}
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}
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/*
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* Enable all the modules and clocks.
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*/
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static int
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enable_hdmi_module(void)
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{
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int r;
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minix_i2c_ioctl_exec_t ioctl_exec;
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memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
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/* Write to CEC */
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ioctl_exec.iie_op = I2C_OP_WRITE_WITH_STOP;
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ioctl_exec.iie_addr = cec_address;
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/* write the register address and value */
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ioctl_exec.iie_buf[0] = CEC_ENABLE_REG;
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ioctl_exec.iie_buf[1] = CEC_ENABLE_ALL_MASK;
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ioctl_exec.iie_buflen = 2;
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r = i2cdriver_exec(cec_bus_endpoint, &ioctl_exec);
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if (r != OK) {
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log_warn(&log, "Writing enable bits failed (r=%d)\n", r);
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return -1;
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}
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log_debug(&log, "HDMI module enabled\n");
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return OK;
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}
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static int
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set_page(uint8_t page)
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{
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int r;
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static int current_page = HDMI_PAGELESS;
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if (page != current_page) {
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r = hdmi_write(HDMI_PAGELESS, HDMI_PAGE_SELECT_REG, page);
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if (r != OK) {
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return r;
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}
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current_page = page;
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}
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return OK;
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}
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static int
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hdmi_read_block(uint8_t page, uint8_t reg, uint8_t * buf, size_t buflen)
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{
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int r;
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minix_i2c_ioctl_exec_t ioctl_exec;
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if (buf == NULL || buflen > I2C_EXEC_MAX_BUFLEN) {
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log_warn(&log,
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"Read block called with NULL pointer or invalid buflen.\n");
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return EINVAL;
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}
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if (page != HDMI_PAGELESS) {
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r = set_page(page);
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if (r != OK) {
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log_warn(&log, "Unable to set page to 0x%x\n", page);
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return r;
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}
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}
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memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
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/* Read from HDMI */
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ioctl_exec.iie_op = I2C_OP_READ_WITH_STOP;
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ioctl_exec.iie_addr = hdmi_address;
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/* write the register address */
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ioctl_exec.iie_cmd[0] = reg;
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ioctl_exec.iie_cmdlen = 1;
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/* read bytes */
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ioctl_exec.iie_buflen = buflen;
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r = i2cdriver_exec(hdmi_bus_endpoint, &ioctl_exec);
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if (r != OK) {
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log_warn(&log, "hdmi_read() failed (r=%d)\n", r);
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return -1;
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}
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memcpy(buf, ioctl_exec.iie_buf, buflen);
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log_trace(&log, "Read %d bytes from reg 0x%x in page 0x%x\n", buflen,
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reg, page);
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return OK;
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}
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static int
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hdmi_read(uint8_t page, uint8_t reg, uint8_t * val)
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{
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int r;
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minix_i2c_ioctl_exec_t ioctl_exec;
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if (val == NULL) {
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log_warn(&log, "Read called with NULL pointer\n");
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return EINVAL;
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}
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if (page != HDMI_PAGELESS) {
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r = set_page(page);
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if (r != OK) {
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log_warn(&log, "Unable to set page to 0x%x\n", page);
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return r;
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}
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|
}
|
|
|
|
memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
|
|
|
|
/* Read from HDMI */
|
|
ioctl_exec.iie_op = I2C_OP_READ_WITH_STOP;
|
|
ioctl_exec.iie_addr = hdmi_address;
|
|
|
|
/* write the register address */
|
|
ioctl_exec.iie_cmd[0] = reg;
|
|
ioctl_exec.iie_cmdlen = 1;
|
|
|
|
/* read 1 byte */
|
|
ioctl_exec.iie_buflen = 1;
|
|
|
|
r = i2cdriver_exec(hdmi_bus_endpoint, &ioctl_exec);
|
|
if (r != OK) {
|
|
log_warn(&log, "hdmi_read() failed (r=%d)\n", r);
|
|
return -1;
|
|
}
|
|
|
|
*val = ioctl_exec.iie_buf[0];
|
|
|
|
log_trace(&log, "Read 0x%x from reg 0x%x in page 0x%x\n", *val, reg,
|
|
page);
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
hdmi_write(uint8_t page, uint8_t reg, uint8_t val)
|
|
{
|
|
|
|
int r;
|
|
minix_i2c_ioctl_exec_t ioctl_exec;
|
|
|
|
if (page != HDMI_PAGELESS) {
|
|
r = set_page(page);
|
|
if (r != OK) {
|
|
log_warn(&log, "Unable to set page to 0x%x\n", page);
|
|
return r;
|
|
}
|
|
}
|
|
|
|
memset(&ioctl_exec, '\0', sizeof(minix_i2c_ioctl_exec_t));
|
|
|
|
/* Write to HDMI */
|
|
ioctl_exec.iie_op = I2C_OP_WRITE_WITH_STOP;
|
|
ioctl_exec.iie_addr = hdmi_address;
|
|
|
|
/* write the register address and value */
|
|
ioctl_exec.iie_buf[0] = reg;
|
|
ioctl_exec.iie_buf[1] = val;
|
|
ioctl_exec.iie_buflen = 2;
|
|
|
|
r = i2cdriver_exec(hdmi_bus_endpoint, &ioctl_exec);
|
|
if (r != OK) {
|
|
log_warn(&log, "hdmi_write() failed (r=%d)\n", r);
|
|
return -1;
|
|
}
|
|
|
|
log_trace(&log, "Successfully wrote 0x%x to reg 0x%x in page 0x%x\n",
|
|
val, reg, page);
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
hdmi_set(uint8_t page, uint8_t reg, uint8_t mask)
|
|
{
|
|
|
|
int r;
|
|
uint8_t val;
|
|
|
|
val = 0x00;
|
|
|
|
r = hdmi_read(page, reg, &val);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
val |= mask;
|
|
|
|
r = hdmi_write(page, reg, val);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
hdmi_clear(uint8_t page, uint8_t reg, uint8_t mask)
|
|
{
|
|
|
|
int r;
|
|
uint8_t val;
|
|
|
|
val = 0x00;
|
|
|
|
r = hdmi_read(page, reg, &val);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
val &= ~mask;
|
|
|
|
r = hdmi_write(page, reg, val);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
check_revision(void)
|
|
{
|
|
int r;
|
|
uint8_t rev_lo;
|
|
uint8_t rev_hi;
|
|
uint16_t revision;
|
|
|
|
r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_REV_LO_REG, &rev_lo);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to read rev_lo (r=%d)\n", r);
|
|
return -1;
|
|
}
|
|
|
|
r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_REV_HI_REG, &rev_hi);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to read rev_hi (r=%d)\n", r);
|
|
return -1;
|
|
}
|
|
|
|
revision = ((rev_hi << 8) | rev_lo);
|
|
if (revision != HDMI_REV_TDA19988) {
|
|
|
|
log_warn(&log, "Unrecognized value in revision registers.\n");
|
|
log_warn(&log, "Read: 0x%x | Expected: 0x%x\n", revision,
|
|
HDMI_REV_TDA19988);
|
|
return -1;
|
|
}
|
|
|
|
log_debug(&log, "Device Revision: 0x%x\n", revision);
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
hdmi_ddc_enable(void)
|
|
{
|
|
int r;
|
|
|
|
/* Soft Reset DDC Bus */
|
|
r = hdmi_set(HDMI_CTRL_PAGE, HDMI_CTRL_RESET_REG,
|
|
HDMI_CTRL_RESET_DDC_MASK);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
micro_delay(100000);
|
|
r = hdmi_clear(HDMI_CTRL_PAGE, HDMI_CTRL_RESET_REG,
|
|
HDMI_CTRL_RESET_DDC_MASK);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
micro_delay(100000);
|
|
|
|
/* Enable DDC */
|
|
r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_DDC_CTRL_REG,
|
|
HDMI_CTRL_DDC_EN_MASK);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
/* Setup the clock (I think) */
|
|
r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_DDC_CLK_REG,
|
|
HDMI_CTRL_DDC_CLK_EN_MASK);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
|
|
r = hdmi_write(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_DDC_CLK_REG,
|
|
HDMI_HDCP_OTP_DDC_CLK_MASK);
|
|
if (r != OK) {
|
|
return r;
|
|
}
|
|
log_debug(&log, "DDC Enabled\n");
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
hdmi_init(void)
|
|
{
|
|
int r;
|
|
|
|
/* Turn on HDMI module (slave 0x70) */
|
|
r = enable_hdmi_module();
|
|
if (r != OK) {
|
|
log_warn(&log, "HDMI Module Init Failed\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Read chip version to ensure compatibility */
|
|
r = check_revision();
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't find expected TDA19988 revision\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Turn on DDC interface between TDA19988 and display */
|
|
r = hdmi_ddc_enable();
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to enable DDC\n");
|
|
return -1;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
read_edid(uint8_t * buf, size_t count)
|
|
{
|
|
int r;
|
|
int i, j;
|
|
int tries;
|
|
int edid_ready;
|
|
uint8_t val;
|
|
|
|
log_debug(&log, "Reading edid...\n");
|
|
|
|
if (buf == NULL || count < EDID_LEN) {
|
|
log_warn(&log, "Expected 128 byte data buffer\n");
|
|
return -1;
|
|
}
|
|
|
|
r = hdmi_clear(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_SOME_REG,
|
|
HDMI_HDCP_OTP_SOME_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to clear bit in HDCP OTP reg\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Enable EDID Block Read Interrupt */
|
|
r = hdmi_set(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG,
|
|
HDMI_CTRL_INT_EDID_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to enable EDID Block Read interrupt\n");
|
|
return -1;
|
|
}
|
|
|
|
/* enable global interrupts */
|
|
r = hdmi_write(HDMI_CTRL_PAGE, HDMI_CTRL_INTR_CTRL_REG,
|
|
HDMI_CTRL_INTR_EN_GLO_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to enable interrupts\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Set Device Address */
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_DEV_ADDR_REG,
|
|
HDMI_EDID_DEV_ADDR);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't set device address\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Set Offset */
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_OFFSET_REG, HDMI_EDID_OFFSET);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't set offset\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Set Segment Pointer Address */
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_SEG_PTR_ADDR_REG,
|
|
HDMI_EDID_SEG_PTR_ADDR);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't set segment pointer address\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Set Segment Address */
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_SEG_ADDR_REG,
|
|
HDMI_EDID_SEG_ADDR);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't set segment address\n");
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Toggle EDID Read Request Bit to request a read.
|
|
*/
|
|
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_REQ_REG,
|
|
HDMI_EDID_REQ_READ_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't set Read Request bit\n");
|
|
return -1;
|
|
}
|
|
|
|
r = hdmi_write(HDMI_EDID_PAGE, HDMI_EDID_REQ_REG, 0x00);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't clear Read Request bit\n");
|
|
return -1;
|
|
}
|
|
|
|
log_debug(&log, "Starting polling\n");
|
|
|
|
/* poll interrupt status flag */
|
|
edid_ready = 0;
|
|
for (tries = 0; tries < 100; tries++) {
|
|
|
|
r = hdmi_read(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG, &val);
|
|
if (r != OK) {
|
|
log_warn(&log, "Read failed while polling int flag\n");
|
|
return -1;
|
|
}
|
|
|
|
if (val & HDMI_CTRL_INT_EDID_MASK) {
|
|
log_debug(&log, "Mask Set\n");
|
|
edid_ready = 1;
|
|
break;
|
|
}
|
|
|
|
micro_delay(1000);
|
|
}
|
|
|
|
if (!edid_ready) {
|
|
log_warn(&log, "Data Ready interrupt never fired.\n");
|
|
return EBUSY;
|
|
}
|
|
|
|
log_debug(&log, "Ready to read\n");
|
|
|
|
/* Finally, perform the read. */
|
|
memset(buf, '\0', count);
|
|
r = hdmi_read_block(HDMI_EDID_PAGE, HDMI_EDID_DATA_REG, buf, EDID_LEN);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to read EDID data\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Disable EDID Block Read Interrupt */
|
|
r = hdmi_clear(HDMI_CTRL_PAGE, HDMI_CTRL_INT_REG,
|
|
HDMI_CTRL_INT_EDID_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log,
|
|
"Failed to disable EDID Block Read interrupt\n");
|
|
return -1;
|
|
}
|
|
|
|
r = hdmi_set(HDMI_HDCP_OTP_PAGE, HDMI_HDCP_OTP_SOME_REG,
|
|
HDMI_HDCP_OTP_SOME_MASK);
|
|
if (r != OK) {
|
|
log_warn(&log, "Failed to set bit in HDCP/OTP reg\n");
|
|
return -1;
|
|
}
|
|
|
|
log_debug(&log, "Done EDID Reading\n");
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
sef_cb_lu_state_save(int UNUSED(state))
|
|
{
|
|
ds_publish_u32("cec_bus", cec_bus, DSF_OVERWRITE);
|
|
ds_publish_u32("hdmi_bus", hdmi_bus, DSF_OVERWRITE);
|
|
ds_publish_u32("cec_address", cec_address, DSF_OVERWRITE);
|
|
ds_publish_u32("hdmi_address", hdmi_address, DSF_OVERWRITE);
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
lu_state_restore(void)
|
|
{
|
|
/* Restore the state. */
|
|
u32_t value;
|
|
|
|
ds_retrieve_u32("cec_bus", &value);
|
|
ds_delete_u32("cec_bus");
|
|
cec_bus = (int) value;
|
|
|
|
ds_retrieve_u32("hdmi_bus", &value);
|
|
ds_delete_u32("hdmi_bus");
|
|
hdmi_bus = (int) value;
|
|
|
|
ds_retrieve_u32("cec_address", &value);
|
|
ds_delete_u32("cec_address");
|
|
cec_address = (int) value;
|
|
|
|
ds_retrieve_u32("hdmi_address", &value);
|
|
ds_delete_u32("hdmi_address");
|
|
hdmi_address = (int) value;
|
|
|
|
return OK;
|
|
}
|
|
|
|
static int
|
|
sef_cb_init(int type, sef_init_info_t * UNUSED(info))
|
|
{
|
|
int r;
|
|
|
|
if (type == SEF_INIT_LU) {
|
|
/* Restore the state. */
|
|
lu_state_restore();
|
|
}
|
|
|
|
geom[TDA19988_DEV].dv_base = ((u64_t) (0));
|
|
geom[TDA19988_DEV].dv_size = ((u64_t) (128));
|
|
|
|
/*
|
|
* CEC Module
|
|
*/
|
|
|
|
/* look-up the endpoint for the bus driver */
|
|
cec_bus_endpoint = i2cdriver_bus_endpoint(cec_bus);
|
|
if (cec_bus_endpoint == 0) {
|
|
log_warn(&log, "Couldn't find bus driver.\n");
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
/* claim the device */
|
|
r = i2cdriver_reserve_device(cec_bus_endpoint, cec_address);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't reserve device 0x%x (r=%d)\n",
|
|
cec_address, r);
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* HDMI Module
|
|
*/
|
|
|
|
/* look-up the endpoint for the bus driver */
|
|
hdmi_bus_endpoint = i2cdriver_bus_endpoint(hdmi_bus);
|
|
if (hdmi_bus_endpoint == 0) {
|
|
log_warn(&log, "Couldn't find bus driver.\n");
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
/* claim the device */
|
|
r = i2cdriver_reserve_device(hdmi_bus_endpoint, hdmi_address);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't reserve device 0x%x (r=%d)\n",
|
|
hdmi_address, r);
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
if (type != SEF_INIT_LU) {
|
|
|
|
/* sign up for updates about the i2c bus going down/up */
|
|
r = i2cdriver_subscribe_bus_updates(cec_bus);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't subscribe to bus updates\n");
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
/* sign up for updates about the i2c bus going down/up */
|
|
r = i2cdriver_subscribe_bus_updates(hdmi_bus);
|
|
if (r != OK) {
|
|
log_warn(&log, "Couldn't subscribe to bus updates\n");
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
i2cdriver_announce(cec_bus);
|
|
if (cec_bus != hdmi_bus) {
|
|
i2cdriver_announce(hdmi_bus);
|
|
}
|
|
|
|
log_trace(&log, "announced\n");
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
static void
|
|
sef_local_startup(void)
|
|
{
|
|
/*
|
|
* Register init callbacks. Use the same function for all event types
|
|
*/
|
|
sef_setcb_init_fresh(sef_cb_init);
|
|
sef_setcb_init_lu(sef_cb_init);
|
|
sef_setcb_init_restart(sef_cb_init);
|
|
|
|
/*
|
|
* Register live update callbacks.
|
|
*/
|
|
/* Agree to update immediately when LU is requested in a valid state. */
|
|
sef_setcb_lu_prepare(sef_cb_lu_prepare_always_ready);
|
|
/* Support live update starting from any standard state. */
|
|
sef_setcb_lu_state_isvalid(sef_cb_lu_state_isvalid_standard);
|
|
/* Register a custom routine to save the state. */
|
|
sef_setcb_lu_state_save(sef_cb_lu_state_save);
|
|
|
|
/* Let SEF perform startup. */
|
|
sef_startup();
|
|
}
|
|
|
|
static int
|
|
tda19988_env_parse()
|
|
{
|
|
int r;
|
|
long int cec_busl;
|
|
long int cec_addressl;
|
|
long int hdmi_busl;
|
|
long int hdmi_addressl;
|
|
|
|
r = env_parse("cec_bus", "d", 0, &cec_busl, 1, 3);
|
|
if (r != EP_SET) {
|
|
return -1;
|
|
}
|
|
cec_bus = (uint32_t) cec_busl;
|
|
|
|
r = env_parse("cec_address", "x", 0, &cec_addressl, 0x34, 0x37);
|
|
if (r != EP_SET) {
|
|
return -1;
|
|
}
|
|
cec_address = (i2c_addr_t) cec_addressl;
|
|
|
|
r = env_parse("hdmi_bus", "d", 0, &hdmi_busl, 1, 3);
|
|
if (r != EP_SET) {
|
|
return -1;
|
|
}
|
|
hdmi_bus = (uint32_t) hdmi_busl;
|
|
|
|
r = env_parse("hdmi_address", "x", 0, &hdmi_addressl, 0x70, 0x73);
|
|
if (r != EP_SET) {
|
|
return -1;
|
|
}
|
|
hdmi_address = (i2c_addr_t) hdmi_addressl;
|
|
|
|
return OK;
|
|
}
|
|
|
|
int
|
|
main(int argc, char *argv[])
|
|
{
|
|
int r;
|
|
|
|
env_setargs(argc, argv);
|
|
|
|
r = tda19988_env_parse();
|
|
if (r < 0) {
|
|
log_warn(&log,
|
|
"Expecting -args 'cec_bus=X cec_address=0xAA hdmi_bus=Y hdmi_address=0xBB'\n");
|
|
log_warn(&log,
|
|
"Example -args 'cec_bus=1 cec_address=0x34 hdmi_bus=1 hdmi_address=0x70'\n");
|
|
return EXIT_FAILURE;
|
|
}
|
|
|
|
sef_local_startup();
|
|
|
|
log_debug(&log, "Startup Complete\n");
|
|
blockdriver_task(&tda19988_tab);
|
|
log_debug(&log, "Shutting down\n");
|
|
|
|
return OK;
|
|
}
|