84d9c625bf
- Fix for possible unset uid/gid in toproto
- Fix for default mtree style
- Update libelf
- Importing libexecinfo
- Resynchronize GCC, mpc, gmp, mpfr
- build.sh: Replace params with show-params.
This has been done as the make target has been renamed in the same
way, while a new target named params has been added. This new
target generates a file containing all the parameters, instead of
printing it on the console.
- Update test48 with new etc/services (Fix by Ben Gras <ben@minix3.org)
get getservbyport() out of the inner loop
Change-Id: Ie6ad5226fa2621ff9f0dee8782ea48f9443d2091
158 lines
4.6 KiB
ArmAsm
158 lines
4.6 KiB
ArmAsm
/* $NetBSD: atomic_cas.S,v 1.12 2013/09/12 15:36:14 joerg Exp $ */
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/*-
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* Copyright (c) 2007, 2008 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Andrew Doran and Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include "atomic_op_asm.h"
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#if defined(_HARDKERNEL)
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#include <machine/psl.h>
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#include "opt_multiprocessor.h"
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#define DISABLE_INTERRUPTS \
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rd %psr, %o4 /* disable interrupts */;\
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or %o4, PSR_PIL, %o5 ;\
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wr %o5, 0, %psr ;\
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nop ;\
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nop ;\
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nop
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#define RESTORE_INTERRUPTS \
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wr %o4, 0, %psr /* enable interrupts */ ;\
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nop ;\
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nop ;\
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nop
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#else /* _HARDKERNEL */
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#define MULTIPROCESSOR 1
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#define DISABLE_INTERRUPTS /* nothing */
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#define RESTORE_INTERRUPTS /* nothing */
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#endif /* _HARDKERNEL */
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#if defined(MULTIPROCESSOR)
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.section .bss
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.align 1024
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#ifdef __PIC__
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.globl _C_LABEL(_atomic_cas_locktab)
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#endif
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OTYPE(_C_LABEL(_atomic_cas_locktab))
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_C_LABEL(_atomic_cas_locktab):
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.space 1024
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#ifdef __PIC__
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/* o4 is not used for PSR in PIC cases, so we can use it here */
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#define GETLOCKTAB \
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PIC_PROLOGUE(%o3,%o4) ;\
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set _C_LABEL(_atomic_cas_locktab), %o4 ;\
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ld [%o3 + %o4], %o3
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#else
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#define GETLOCKTAB \
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sethi %hi(_C_LABEL(_atomic_cas_locktab)), %o3
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#endif
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#define ACQUIRE_INTERLOCK \
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DISABLE_INTERRUPTS ;\
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srl %o0, 3, %o5 /* get lock address */ ;\
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and %o5, 1023, %o5 ;\
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GETLOCKTAB ;\
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add %o5, %o3, %o5 ;\
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;\
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/* %o5 has interlock address */ ;\
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;\
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1: ldstub [%o5], %o3 /* acquire lock */ ;\
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tst %o3 ;\
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bz,a 2f ;\
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nop ;\
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nop ;\
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nop ;\
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b,a 1b /* spin */ ;\
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nop ;\
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/* We now hold the interlock */ ;\
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2:
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#define RELEASE_INTERLOCK \
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stb %g0, [%o5] /* release interlock */ ;\
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RESTORE_INTERRUPTS
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#else /* ! MULTIPROCESSOR */
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#define ACQUIRE_INTERLOCK DISABLE_INTERRUPTS
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#define RELEASE_INTERLOCK RESTORE_INTERRUPTS
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#endif /* MULTIPROCESSOR */
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.text
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/*
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* The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts
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* and use an interlock.
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*
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* XXX On single CPU systems, this should use a restartable sequence:
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* XXX there we don't need the overhead of interlocking.
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*
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* XXX NOTE! The interlock trick only works if EVERYTHING writes to
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* XXX the memory cell through this code path!
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*/
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ENTRY(_atomic_cas_32)
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ACQUIRE_INTERLOCK
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! %o4 has saved PSR value
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! %o5 has interlock address
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ld [%o0], %o3 ! get old value
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cmp %o1, %o3 ! old == new?
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beq,a 3f ! yes, do the store
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st %o2, [%o0] ! (in the delay slot)
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3: RELEASE_INTERLOCK
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retl
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mov %o3, %o0 ! return old value
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ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
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ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
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STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
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