- before enabling paging VM asks kernel to resize its segments. This may cause kernel to segfault if APIC is used and an interrupt happens between this and paging enabled. As these are 2 separate vmctl calls it is not atomic. This patch fixes this problem. VM does not ask kernel to resize the segments in a separate call anymore. The new segments limit is part of the "enable paging" call. It generalizes this call in such a way that more information can be passed as need be or the information may be completely different if another architecture requires this.
98 lines
3.8 KiB
C
98 lines
3.8 KiB
C
#ifndef __SYS_VM_386_H__
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#define __SYS_VM_386_H__
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/*
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i386/vm.h
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*/
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#define I386_PAGE_SIZE 4096
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#define I386_BIG_PAGE_SIZE (I386_PAGE_SIZE*I386_VM_PT_ENTRIES)
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/* i386 paging constants */
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#define I386_VM_PRESENT 0x001 /* Page is present */
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#define I386_VM_WRITE 0x002 /* Read/write access allowed */
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#define I386_VM_USER 0x004 /* User access allowed */
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#define I386_VM_PWT 0x008 /* Write through */
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#define I386_VM_PCD 0x010 /* Cache disable */
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#define I386_VM_ACC 0x020 /* Accessed */
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#define I386_VM_ADDR_MASK 0xFFFFF000 /* physical address */
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#define I386_VM_ADDR_MASK_4MB 0xFFC00000 /* physical address */
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#define I386_VM_OFFSET_MASK_4MB 0x003FFFFF /* physical address */
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/* Page directory specific flags. */
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#define I386_VM_BIGPAGE 0x080 /* 4MB page */
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/* Page table specific flags. */
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#define I386_VM_DIRTY (1L<< 6) /* Dirty */
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#define I386_VM_PS (1L<< 7) /* Page size. */
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#define I386_VM_GLOBAL (1L<< 8) /* Global. */
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#define I386_VM_PTAVAIL1 (1L<< 9) /* Available for use. */
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#define I386_VM_PTAVAIL2 (1L<<10) /* Available for use. */
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#define I386_VM_PTAVAIL3 (1L<<11) /* Available for use. */
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#define I386_VM_PT_ENT_SIZE 4 /* Size of a page table entry */
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#define I386_VM_DIR_ENTRIES 1024 /* Number of entries in a page dir */
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#define I386_VM_DIR_ENT_SHIFT 22 /* Shift to get entry in page dir. */
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#define I386_VM_PT_ENT_SHIFT 12 /* Shift to get entry in page table */
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#define I386_VM_PT_ENT_MASK 0x3FF /* Mask to get entry in page table */
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#define I386_VM_PT_ENTRIES 1024 /* Number of entries in a page table */
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#define I386_VM_PFA_SHIFT 22 /* Page frame address shift */
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/* CR0 bits */
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#define I386_CR0_PE 0x00000001 /* Protected mode */
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#define I386_CR0_MP 0x00000002 /* Monitor Coprocessor */
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#define I386_CR0_EM 0x00000004 /* Emulate */
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#define I386_CR0_TS 0x00000008 /* Task Switched */
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#define I386_CR0_ET 0x00000010 /* Extension Type */
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#define I386_CR0_WP 0x00010000 /* Enable paging */
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#define I386_CR0_PG 0x80000000 /* Enable paging */
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/* some CR4 bits */
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#define I386_CR4_VME 0x00000001 /* Virtual 8086 */
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#define I386_CR4_PVI 0x00000002 /* Virtual ints */
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#define I386_CR4_TSD 0x00000004 /* RDTSC privileged */
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#define I386_CR4_DE 0x00000008 /* Debugging extensions */
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#define I386_CR4_PSE 0x00000010 /* Page size extensions */
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#define I386_CR4_PAE 0x00000020 /* Physical addr extens. */
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#define I386_CR4_MCE 0x00000040 /* Machine check enable */
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#define I386_CR4_PGE 0x00000080 /* Global page flag enable */
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/* i386 paging 'functions' */
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#define I386_VM_PTE(v) (((v) >> I386_VM_PT_ENT_SHIFT) & I386_VM_PT_ENT_MASK)
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#define I386_VM_PDE(v) ( (v) >> I386_VM_DIR_ENT_SHIFT)
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#define I386_VM_PFA(e) ( (e) & I386_VM_ADDR_MASK)
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#define I386_VM_PAGE(v) ( (v) >> I386_VM_PFA_SHIFT)
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/* i386 pagefault error code bits */
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#define I386_VM_PFE_P 0x01 /* Pagefault caused by non-present page.
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* (otherwise protection violation.)
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*/
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#define I386_VM_PFE_W 0x02 /* Caused by write (otherwise read) */
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#define I386_VM_PFE_U 0x04 /* CPU in user mode (otherwise supervisor) */
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/* CPUID flags */
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#define CPUID1_EDX_FPU (1L) /* FPU presence */
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#define CPUID1_EDX_PSE (1L << 3) /* Page Size Extension */
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#define CPUID1_EDX_PGE (1L << 13) /* Page Global (bit) Enable */
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#define CPUID1_EDX_APIC_ON_CHIP (1L << 9) /* APIC is present on the chip */
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#define CPUID1_EDX_TSC (1L << 4) /* Timestamp counter present */
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#define CPUID1_EDX_HTT (1L << 28) /* Supports HTT */
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#define CPUID1_EDX_FXSR (1L << 24)
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#define CPUID1_EDX_SSE (1L << 25)
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#define CPUID1_EDX_SSE2 (1L << 26)
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#define CPUID1_ECX_SSE3 (1L)
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#define CPUID1_ECX_SSSE3 (1L << 9)
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#define CPUID1_ECX_SSE4_1 (1L << 19)
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#define CPUID1_ECX_SSE4_2 (1L << 20)
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#ifndef __ASSEMBLY__
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#include <minix/type.h>
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/* structure used by VM to pass data to the kernel while enabling paging */
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struct vm_ep_data {
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struct mem_map * mem_map;
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vir_bytes data_seg_limit;
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};
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#endif
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#endif /* __SYS_VM_386_H__ */
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