There is important information about booting non-ack images in docs/UPDATING. ack/aout-format images can't be built any more, and booting clang/ELF-format ones is a little different. Updating to the new boot monitor is recommended. Changes in this commit: . drop boot monitor -> allowing dropping ack support . facility to copy ELF boot files to /boot so that old boot monitor can still boot fairly easily, see UPDATING . no more ack-format libraries -> single-case libraries . some cleanup of OBJECT_FMT, COMPILER_TYPE, etc cases . drop several ack toolchain commands, but not all support commands (e.g. aal is gone but acksize is not yet). . a few libc files moved to netbsd libc dir . new /bin/date as minix date used code in libc/ . test compile fix . harmonize includes . /usr/lib is no longer special: without ack, /usr/lib plays no kind of special bootstrapping role any more and bootstrapping is done exclusively through packages, so releases depend even less on the state of the machine making them now. . rename nbsd_lib* to lib* . reduce mtree
197 lines
4.6 KiB
Text
197 lines
4.6 KiB
Text
/* $NetBSD: divrem.m4,v 1.9 2002/01/21 23:40:41 ross Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Division and remainder.
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*
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* The use of m4 is modeled after the sparc code, but the algorithm is
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* simple binary long division.
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*
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* Note that the loops could probably benefit from unrolling.
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*/
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/*
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* M4 Parameters
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* NAME name of function to generate
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* OP OP=div: t10 / t11 -> t12; OP=rem: t10 % t11 -> t12
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* S S=true: signed; S=false: unsigned
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* WORDSIZE total number of bits
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*/
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define(A, `t10')
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define(B, `t11')
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define(RESULT, `t12')
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define(BIT, `t0')
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define(I, `t1')
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define(CC, `t2')
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define(T_0, `t3')
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ifelse(S, `true', `define(NEG, `t4')')
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#include <machine/asm.h>
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LEAF(NAME, 0) /* XXX */
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lda sp, -64(sp)
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stq BIT, 0(sp)
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stq I, 8(sp)
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stq CC, 16(sp)
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stq T_0, 24(sp)
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ifelse(S, `true',
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` stq NEG, 32(sp)')
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stq A, 40(sp)
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stq B, 48(sp)
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mov zero, RESULT /* Initialize result to zero */
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ifelse(S, `true',
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`
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/* Compute sign of result. If either is negative, this is easy. */
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or A, B, NEG /* not the sign, but... */
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srl NEG, WORDSIZE - 1, NEG /* rather, or of high bits */
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blbc NEG, Ldoit /* neither negative? do it! */
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ifelse(OP, `div',
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` xor A, B, NEG /* THIS is the sign! */
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', ` mov A, NEG /* sign follows A. */
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')
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srl NEG, WORDSIZE - 1, NEG /* make negation the low bit. */
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srl A, WORDSIZE - 1, I /* is A negative? */
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blbc I, LnegB /* no. */
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/* A is negative; flip it. */
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ifelse(WORDSIZE, `32', `
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/* top 32 bits may be random junk */
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zap A, 0xf0, A
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')
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subq zero, A, A
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srl B, WORDSIZE - 1, I /* is B negative? */
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blbc I, Ldoit /* no. */
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LnegB:
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/* B is definitely negative, no matter how we got here. */
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ifelse(WORDSIZE, `32', `
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/* top 32 bits may be random junk */
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zap B, 0xf0, B
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')
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subq zero, B, B
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Ldoit:
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')
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ifelse(WORDSIZE, `32', `
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/*
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* Clear the top 32 bits of each operand, as they may
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* sign extension (if negated above), or random junk.
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*/
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zap A, 0xf0, A
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zap B, 0xf0, B
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')
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/* kill the special cases. */
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beq B, Ldotrap /* division by zero! */
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cmpult A, B, CC /* A < B? */
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/* RESULT is already zero, from above. A is untouched. */
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bne CC, Lret_result
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cmpeq A, B, CC /* A == B? */
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cmovne CC, 1, RESULT
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cmovne CC, zero, A
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bne CC, Lret_result
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/*
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* Find out how many bits of zeros are at the beginning of the divisor.
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*/
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LBbits:
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ldiq T_0, 1 /* I = 0; BIT = 1<<WORDSIZE-1 */
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mov zero, I
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sll T_0, WORDSIZE-1, BIT
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LBloop:
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and B, BIT, CC /* if bit in B is set, done. */
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bne CC, LAbits
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addq I, 1, I /* increment I, shift bit */
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srl BIT, 1, BIT
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cmplt I, WORDSIZE-1, CC /* if I leaves one bit, done. */
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bne CC, LBloop
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LAbits:
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beq I, Ldodiv /* If I = 0, divide now. */
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ldiq T_0, 1 /* BIT = 1<<WORDSIZE-1 */
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sll T_0, WORDSIZE-1, BIT
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LAloop:
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and A, BIT, CC /* if bit in A is set, done. */
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bne CC, Ldodiv
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subq I, 1, I /* decrement I, shift bit */
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srl BIT, 1, BIT
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bne I, LAloop /* If I != 0, loop again */
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Ldodiv:
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sll B, I, B /* B <<= i */
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ldiq T_0, 1
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sll T_0, I, BIT
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Ldivloop:
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cmpult A, B, CC
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or RESULT, BIT, T_0
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cmoveq CC, T_0, RESULT
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subq A, B, T_0
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cmoveq CC, T_0, A
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srl BIT, 1, BIT
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srl B, 1, B
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beq A, Lret_result
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bne BIT, Ldivloop
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Lret_result:
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ifelse(OP, `div',
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`', ` mov A, RESULT
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')
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ifelse(S, `true',
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`
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/* Check to see if we should negate it. */
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subq zero, RESULT, T_0
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cmovlbs NEG, T_0, RESULT
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')
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ldq BIT, 0(sp)
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ldq I, 8(sp)
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ldq CC, 16(sp)
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ldq T_0, 24(sp)
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ifelse(S, `true',
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` ldq NEG, 32(sp)')
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ldq A, 40(sp)
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ldq B, 48(sp)
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lda sp, 64(sp)
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ret zero, (t9), 1
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Ldotrap:
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ldiq a0, -2 /* This is the signal to SIGFPE! */
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call_pal PAL_gentrap
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ifelse(OP, `div',
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`', ` mov zero, A /* so that zero will be returned */
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')
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br zero, Lret_result
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END(NAME)
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