436d6012a3
-Move libdriver to lib/ -Install all boot image services on filesystem to aid restartability
128 lines
3.1 KiB
C
128 lines
3.1 KiB
C
#ifndef ES1371_H
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#define ES1371_H
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/* best viewed with tabsize=4 */
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#include <sys/types.h>
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#include <minix/drivers.h>
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#include <sys/ioc_sound.h>
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#include <minix/sound.h>
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/* set your vendor and device ID's here */
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#define VENDOR_ID 0x1274
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#define DEVICE_ID 0x1371
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#define DRIVER_NAME "ES1371"
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/* channels or subdevices */
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#define DAC1_CHAN 0
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#define ADC1_CHAN 1
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#define MIXER 2
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#define DAC2_CHAN 3
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/* PCI command register defines */
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#define SERR_EN 0x0100
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#define PCI_MASTER 0x0004
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#define IO_ACCESS 0x0001
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/* Interrupt/Chip Select Control */
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#define CHIP_SEL_CTRL 0x00
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#define ADC1_EN 0x0010
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#define DAC1_EN 0x0040
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#define DAC2_EN 0x0020
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#define CCB_INTRM 0x0400
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/* Interrupt/Chip Select Status */
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#define INTERRUPT_STATUS 0x04
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#define ADC 0x0001
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#define DAC2 0x0002
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#define DAC1 0x0004
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#define INTR 0x80000000
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/* Sample Rate Converter */
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#define SAMPLE_RATE_CONV 0x10
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/* CODEC Write/Read register */
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#define CODEC_WRITE 0x14
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#define CODEC_READ 0x14
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/* Legacy address */
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#define LEGACY 0x18
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/* Memory related defines */
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#define MEM_PAGE 0x0c
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#define ADC_MEM_PAGE 0x0d
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#define DAC_MEM_PAGE 0x0c /* for DAC1 and DAC2 */
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#define MEMORY 0x30
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#define ADC_BUFFER_SIZE 0x34
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#define DAC1_BUFFER_SIZE 0x34
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#define DAC2_BUFFER_SIZE 0X3c
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#define ADC_PCI_ADDRESS 0x30
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#define DAC1_PCI_ADDRESS 0x30
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#define DAC2_PCI_ADDRESS 0x38
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/* Serial Interface Control */
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#define SERIAL_INTERFACE_CTRL 0x20
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#define P1_S_MB 0x0001 /* DAC1 Stereo/Mono bit */
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#define P1_S_EB 0x0002 /* DAC1 Sixteen/Eight bit */
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#define P2_S_MB 0x0004 /* DAC2 Stereo/Mono bit */
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#define P2_S_EB 0x0008 /* DAC2 Sixteen/Eight bit */
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#define R1_S_MB 0x0010 /* ADC Stereo/Mono bit */
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#define R1_S_EB 0x0020 /* ADC Sixteen/Eight bit */
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#define P1_INTR_EN 0x0100
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#define P2_INTR_EN 0x0200
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#define R1_INT_EN 0x0400
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#define P1_PAUSE 0x0800
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#define P2_PAUSE 0x1000
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#define DAC1_SAMP_CT 0x24
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#define DAC1_CURR_SAMP_CT 0x26
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#define DAC2_SAMP_CT 0x28
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#define DAC2_CURR_SAMP_CT 0x2a
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#define ADC_SAMP_CT 0x2c
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#define ADC_CURR_SAMP_CT 0x2e
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typedef struct {
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u32_t stereo;
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u16_t sample_rate;
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u32_t nr_of_bits;
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u32_t sign;
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u32_t busy;
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u32_t fragment_size;
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} aud_sub_dev_conf_t;
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/* Some defaults for the aud_sub_dev_conf_t*/
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#define DEFAULT_RATE 44100 /* Sample rate */
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#define DEFAULT_NR_OF_BITS 16 /* Nr. of bits per sample per chan */
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#define DEFAULT_SIGNED 0 /* 0 = unsigned, 1 = signed */
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#define DEFAULT_STEREO 1 /* 0 = mono, 1 = stereo */
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#define MAX_RATE 44100 /* Max sample speed in KHz */
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#define MIN_RATE 4000 /* Min sample speed in KHz */
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typedef struct DEVSTRUCT {
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char* name;
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u16_t v_id; /* vendor id */
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u16_t d_id; /* device id */
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u32_t devind; /* minix pci device id, for
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* pci configuration space */
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u32_t base; /* changed to 32 bits */
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char irq;
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char revision; /* version of the device */
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} DEV_STRUCT;
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#define SRC_ERR_NOT_BUSY_TIMEOUT -1 /* SRC not busy */
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#define SRC_SUCCESS 0
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#endif /* ES1371_H */
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