e641d42a37
Small GPIO driver that exports a few pins using a virtual file system. Currently the two user leds and the user button are exported. Change-Id: I001d017ae27cd17b635587873f7da981054da459
237 lines
5.4 KiB
C
237 lines
5.4 KiB
C
/* kernel headers */
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#include <minix/syslib.h>
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#include <minix/drvlib.h>
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/* system headers */
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#include <sys/mman.h>
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#include <sys/types.h>
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/* usr headers */
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <assert.h>
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/* local headers */
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#include "log.h"
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#include "mmio.h"
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#include "gpio.h"
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/* used for logging */
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static struct log log = {
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.name = "gpio_omap",
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.log_level = LEVEL_INFO,
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.log_func = default_log
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};
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struct omap_gpio_bank
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{
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const char *name;
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uint32_t register_address;
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uint32_t base_address;
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uint32_t disabled;
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};
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static struct omap_gpio_bank omap_gpio_banks[] = {
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{"GPIO1", 0x48310000, 0, 0},
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{"GPIO2", 0x49050000, 0, 0},
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{"GPIO3", 0x49052000, 0, 0},
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{"GPIO4", 0x49054000, 0, 0},
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{"GPIO5", 0x49056000, 0, 0},
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{"GPIO6", 0x49058000, 0, 0},
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{NULL, 0, 0}
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};
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#define GPIO_REVISION 0x00
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#define GPIO_REVISION_MAJOR(X) ((X & 0xF0) >> 4)
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#define GPIO_REVISION_MINOR(X) (X & 0XF)
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#define GPIO_DATAOUT 0x3c
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#define GPIO_DATAIN 0x38
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#define GPIO_OE 0x34 /* Output Data Enable */
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#define GPIO_CLEARDATAOUT 0x90
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#define GPIO_SETDATAOUT 0x94
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#define LED_USR0 (1 << 21)
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#define LED_USR1 (1 << 22)
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struct omap_gpio_bank *
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omap_gpio_bank_get(int gpio_nr)
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{
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struct omap_gpio_bank *bank;
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assert(gpio_nr >= 0 && gpio_nr <= 32 * 6);
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bank = &omap_gpio_banks[gpio_nr / 32];
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return bank;
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}
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int
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omap_gpio_claim(char *owner, int nr, struct gpio **gpio)
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{
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log_trace(&log, "%s s claiming %d\n", owner, nr);
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if (nr < 0 && nr >= 32 * 6) {
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log_warn(&log, "%s is claiming unknown GPIO number %d\n", owner,
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nr);
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return EINVAL;
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}
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if ( omap_gpio_bank_get(nr)->disabled == 1) {
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log_warn(&log, "%s is claiming GPIO %d from disabled bank\n", owner,
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nr);
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return EINVAL;
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}
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struct gpio *tmp = malloc(sizeof(struct gpio));
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memset(tmp, 0, sizeof(*tmp));
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tmp->nr = nr;
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*gpio = tmp;
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return OK;
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}
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int
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omap_gpio_pin_mode(struct gpio *gpio, int mode)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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gpio->mode = mode;
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bank = omap_gpio_bank_get(gpio->nr);
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log_debug(&log,
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"pin mode bank %s, base address 0x%x -> register address (0x%x,0x%x,0x%x)\n",
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bank->name, bank->base_address, bank->register_address, GPIO_OE,
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bank->register_address + GPIO_OE);
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if (mode == GPIO_MODE_OUTPUT) {
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set32(bank->base_address + GPIO_OE, BIT(gpio->nr % 32), 0);
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} else {
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set32(bank->base_address + GPIO_OE, BIT(gpio->nr % 32),
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0xffffffff);
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}
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return 0;
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}
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int
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omap_gpio_set(struct gpio *gpio, int value)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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assert(gpio->nr >= 0 && gpio->nr <= 32 * 6);
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bank = omap_gpio_bank_get(gpio->nr);
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if (value == 1) {
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write32(bank->base_address + GPIO_SETDATAOUT,
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BIT(gpio->nr % 32));
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} else {
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write32(bank->base_address + GPIO_CLEARDATAOUT,
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BIT(gpio->nr % 32));
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}
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return OK;
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}
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int
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omap_gpio_read(struct gpio *gpio, int *value)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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assert(gpio->nr >= 0 && gpio->nr <= 32 * 6);
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bank = omap_gpio_bank_get(gpio->nr);
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log_trace(&log, "mode=%d OU/IN 0x%08x 0x%08x\n", gpio->mode,
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read32(bank->base_address + GPIO_DATAIN),
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read32(bank->base_address + GPIO_DATAOUT));
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if (gpio->mode == GPIO_MODE_INPUT) {
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*value =
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(read32(bank->base_address +
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GPIO_DATAIN) >> (gpio->nr % 32)) & 0x1;
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} else {
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*value =
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(read32(bank->base_address +
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GPIO_DATAOUT) >> (gpio->nr % 32)) & 0x1;
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}
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return OK;
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}
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int
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omap_gpio_init(struct gpio_driver *drv)
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{
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u32_t revision;
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int i;
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struct minix_mem_range mr;
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struct omap_gpio_bank *bank;
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bank = &omap_gpio_banks[0];
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for (i = 0; omap_gpio_banks[i].name != NULL; i++) {
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bank = &omap_gpio_banks[i];
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mr.mr_base = bank->register_address;
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mr.mr_limit = bank->register_address + 0x400;
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if (sys_privctl(SELF, SYS_PRIV_ADD_MEM, &mr) != 0) {
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log_warn(&log,
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"Unable to request permission to map memory\n");
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return EPERM; /* fixme */
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}
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/* Set the base address to use */
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bank->base_address =
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(uint32_t) vm_map_phys(SELF,
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(void *) bank->register_address, 0x400);
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if (bank->base_address == (uint32_t) MAP_FAILED) {
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log_warn(&log, "Unable to map GPIO memory\n");
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return EPERM; /* fixme */
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}
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revision = 0;
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revision = read32(bank->base_address + GPIO_REVISION);
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/* test if we can access it */
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if (GPIO_REVISION_MAJOR(revision) != 2
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|| GPIO_REVISION_MINOR(revision) != 5) {
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log_warn(&log,
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"Failed to read the revision of GPIO bank %s.. disabling\n",
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bank->name);
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bank->disabled = 1;
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}
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bank->disabled = 0;
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log_trace(&log, "bank %s mapped on 0x%x\n", bank->name,
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bank->base_address);
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}
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/* the following code need to move to a power management/clock service */
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#define CM_BASE 0x48004000
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#define CM_FCLKEN_WKUP 0xC00
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#define CM_ICLKEN_WKUP 0xC10
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u32_t base;
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mr.mr_base = CM_BASE;
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mr.mr_limit = CM_BASE + 0x1000;
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if (sys_privctl(SELF, SYS_PRIV_ADD_MEM, &mr) != 0) {
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log_warn(&log, "Unable to request permission to map memory\n");
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return EPERM;
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}
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base = (uint32_t) vm_map_phys(SELF, (void *) CM_BASE, 0x1000);
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if (base == (uint32_t) MAP_FAILED) {
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log_warn(&log, "Unable to map GPIO memory\n");
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return EPERM;
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}
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/* enable the interface and functional clock on GPIO bank 1 */
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set32(base + CM_FCLKEN_WKUP, BIT(3), 0xffffffff);
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set32(base + CM_ICLKEN_WKUP, BIT(3), 0xffffffff);
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/* end power management/clock service stuff */
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drv->claim = omap_gpio_claim;
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drv->pin_mode = omap_gpio_pin_mode;
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drv->set = omap_gpio_set;
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drv->read = omap_gpio_read;
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return 0;
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}
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