1d48c0148e
adjust the smp booting procedure for segmentless operation. changes are mostly due to gdt/idt being dependent on paging, because of the high location, and paging being on much sooner because of that too. also smaller fixes: redefine DESC_SIZE, fix kernel makefile variable name (crosscompiling), some null pointer checks that trap now because of a sparser pagetable, acpi sanity checking
528 lines
13 KiB
ArmAsm
528 lines
13 KiB
ArmAsm
/* This file is part of the lowest layer of the MINIX kernel. (The other part
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* is "proc.c".) The lowest layer does process switching and message handling.
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* Furthermore it contains the assembler startup code for Minix and the 32-bit
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* interrupt handlers. It cooperates with the code in "start.c" to set up a
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* good environment for main().
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*
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* Kernel is entered either because of kernel-calls, ipc-calls, interrupts or
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* exceptions. TSS is set so that the kernel stack is loaded. The user context is
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* saved to the proc table and the handler of the event is called. Once the
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* handler is done, switch_to_user() function is called to pick a new process,
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* finish what needs to be done for the next process to run, sets its context
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* and switch to userspace.
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*
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* For communication with the boot monitor at startup time some constant
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* data are compiled into the beginning of the text segment. This facilitates
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* reading the data at the start of the boot process, since only the first
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* sector of the file needs to be read.
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*
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* Some data storage is also allocated at the end of this file. This data
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* will be at the start of the data segment of the kernel and will be read
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* and modified by the boot monitor before the kernel starts.
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*/
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#include "kernel/kernel.h" /* configures the kernel */
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/* sections */
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#include <machine/vm.h>
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#include "../../kernel.h"
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#include <minix/config.h>
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#include <minix/const.h>
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#include <minix/com.h>
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#include <machine/asm.h>
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#include <machine/interrupt.h>
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#include "archconst.h"
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#include "kernel/const.h"
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#include "kernel/proc.h"
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#include "sconst.h"
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#include <machine/multiboot.h>
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#include "arch_proto.h" /* K_STACK_SIZE */
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#ifdef CONFIG_SMP
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#include "kernel/smp.h"
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#endif
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/* Selected 386 tss offsets. */
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#define TSS3_S_SP0 4
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IMPORT(copr_not_available_handler)
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IMPORT(params_size)
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IMPORT(params_offset)
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IMPORT(switch_to_user)
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IMPORT(multiboot_init)
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.text
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/*===========================================================================*/
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/* interrupt handlers */
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/* interrupt handlers for 386 32-bit protected mode */
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/*===========================================================================*/
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#define PIC_IRQ_HANDLER(irq) \
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push $irq ;\
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call _C_LABEL(irq_handle) /* intr_handle(irq_handlers[irq]) */ ;\
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add $4, %esp ;
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/*===========================================================================*/
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/* hwint00 - 07 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_master(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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movl $0, %ebp /* for stack trace */ ;\
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call _C_LABEL(context_stop) ;\
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add $4, %esp ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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jmp _C_LABEL(switch_to_user) ;\
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\
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0: \
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pusha ;\
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call _C_LABEL(context_stop_idle) ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_master macro */
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ENTRY(hwint00)
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/* Interrupt routine for irq 0 (the clock). */
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hwint_master(0)
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ENTRY(hwint01)
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/* Interrupt routine for irq 1 (keyboard) */
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hwint_master(1)
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ENTRY(hwint02)
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/* Interrupt routine for irq 2 (cascade!) */
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hwint_master(2)
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ENTRY(hwint03)
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/* Interrupt routine for irq 3 (second serial) */
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hwint_master(3)
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ENTRY(hwint04)
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/* Interrupt routine for irq 4 (first serial) */
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hwint_master(4)
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ENTRY(hwint05)
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/* Interrupt routine for irq 5 (XT winchester) */
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hwint_master(5)
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ENTRY(hwint06)
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/* Interrupt routine for irq 6 (floppy) */
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hwint_master(6)
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ENTRY(hwint07)
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/* Interrupt routine for irq 7 (printer) */
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hwint_master(7)
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/*===========================================================================*/
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/* hwint08 - 15 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_slave(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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movl $0, %ebp /* for stack trace */ ;\
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call _C_LABEL(context_stop) ;\
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add $4, %esp ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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jmp _C_LABEL(switch_to_user) ;\
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\
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0: \
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pusha ;\
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call _C_LABEL(context_stop_idle) ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_slave macro */
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ENTRY(hwint08)
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/* Interrupt routine for irq 8 (realtime clock) */
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hwint_slave(8)
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ENTRY(hwint09)
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/* Interrupt routine for irq 9 (irq 2 redirected) */
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hwint_slave(9)
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ENTRY(hwint10)
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/* Interrupt routine for irq 10 */
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hwint_slave(10)
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ENTRY(hwint11)
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/* Interrupt routine for irq 11 */
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hwint_slave(11)
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ENTRY(hwint12)
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/* Interrupt routine for irq 12 */
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hwint_slave(12)
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ENTRY(hwint13)
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/* Interrupt routine for irq 13 (FPU exception) */
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hwint_slave(13)
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ENTRY(hwint14)
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/* Interrupt routine for irq 14 (AT winchester) */
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hwint_slave(14)
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ENTRY(hwint15)
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/* Interrupt routine for irq 15 */
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hwint_slave(15)
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/*
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* IPC is only from a process to kernel
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*/
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ENTRY(ipc_entry)
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %ebx
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push %eax
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push %ecx
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/* stop user process cycles */
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push %ebp
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/* for stack trace */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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call _C_LABEL(do_ipc)
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/* restore the current process pointer and save the return value */
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add $3 * 4, %esp
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pop %esi
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mov %eax, AXREG(%esi)
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jmp _C_LABEL(switch_to_user)
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/*
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* kernel call is only from a process to kernel
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*/
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ENTRY(kernel_call_entry)
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %eax
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/* stop user process cycles */
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push %ebp
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/* for stack trace */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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call _C_LABEL(kernel_call)
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/* restore the current process pointer and save the return value */
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add $8, %esp
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jmp _C_LABEL(switch_to_user)
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.balign 16
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/*
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* called by the exception interrupt vectors. If the exception does not push
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* errorcode, we assume that the vector handler pushed 0 instead. Next pushed
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* thing is the vector number. From this point on we can continue as if every
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* exception pushes an error code
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*/
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exception_entry:
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/*
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* check if it is a nested trap by comparing the saved code segment
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* descriptor with the kernel CS first
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*/
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TEST_INT_IN_KERNEL(12, exception_entry_nested)
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exception_entry_from_user:
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SAVE_PROCESS_CTX(8)
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/* stop user process cycles */
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push %ebp
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/* for stack trace clear %ebp */
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movl $0, %ebp
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call _C_LABEL(context_stop)
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add $4, %esp
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/*
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* push a pointer to the interrupt state pushed by the cpu and the
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* vector number pushed by the vector handler just before calling
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* exception_entry and call the exception handler.
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*/
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push %esp
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push $0 /* it's not a nested exception */
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call _C_LABEL(exception_handler)
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jmp _C_LABEL(switch_to_user)
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exception_entry_nested:
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pusha
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mov %esp, %eax
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add $(8 * 4), %eax
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push %eax
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pushl $1 /* it's a nested exception */
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call _C_LABEL(exception_handler)
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add $8, %esp
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popa
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/* clear the error code and the exception number */
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add $8, %esp
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/* resume execution at the point of exception */
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iret
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/*===========================================================================*/
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/* restart */
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/*===========================================================================*/
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ENTRY(restore_user_context)
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mov 4(%esp), %ebp /* will assume P_STACKBASE == 0 */
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/* reconstruct the stack for iret */
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push $USER_DS_SELECTOR /* ss */
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movl SPREG(%ebp), %eax
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push %eax
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movl PSWREG(%ebp), %eax
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push %eax
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push $USER_CS_SELECTOR /* cs */
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movl PCREG(%ebp), %eax
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push %eax
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/* Restore segments as the user should see them. */
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movw $USER_DS_SELECTOR, %si
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movw %si, %ds
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movw %si, %es
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movw %si, %fs
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movw %si, %gs
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/* Same for general-purpose registers. */
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RESTORE_GP_REGS(%ebp)
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movl BPREG(%ebp), %ebp
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iret /* continue process */
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/*===========================================================================*/
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/* exception handlers */
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/*===========================================================================*/
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#define EXCEPTION_ERR_CODE(vector) \
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push $vector ;\
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jmp exception_entry
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#define EXCEPTION_NO_ERR_CODE(vector) \
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pushl $0 ;\
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EXCEPTION_ERR_CODE(vector)
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LABEL(divide_error)
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EXCEPTION_NO_ERR_CODE(DIVIDE_VECTOR)
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LABEL(single_step_exception)
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EXCEPTION_NO_ERR_CODE(DEBUG_VECTOR)
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LABEL(nmi)
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#ifndef USE_WATCHDOG
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EXCEPTION_NO_ERR_CODE(NMI_VECTOR)
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#else
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/*
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* We have to be very careful as this interrupt can occur anytime. On
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* the other hand, if it interrupts a user process, we will resume the
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* same process which makes things a little simpler. We know that we are
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* already on kernel stack whenever it happened and we can be
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* conservative and save everything as we don't need to be extremely
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* efficient as the interrupt is infrequent and some overhead is already
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* expected.
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*/
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/*
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* save the important registers. We don't save %cs and %ss and they are
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* saved and restored by CPU
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*/
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pushw %ds
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pushw %es
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pushw %fs
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pushw %gs
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pusha
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/*
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* We cannot be sure about the state of the kernel segment register,
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* however, we always set %ds and %es to the same as %ss
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*/
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mov %ss, %si
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mov %si, %ds
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mov %si, %es
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push %esp
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call _C_LABEL(nmi_watchdog_handler)
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add $4, %esp
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/* restore all the important registers as they were before the trap */
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popa
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popw %gs
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popw %fs
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popw %es
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popw %ds
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iret
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#endif
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LABEL(breakpoint_exception)
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EXCEPTION_NO_ERR_CODE(BREAKPOINT_VECTOR)
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LABEL(overflow)
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EXCEPTION_NO_ERR_CODE(OVERFLOW_VECTOR)
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LABEL(bounds_check)
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EXCEPTION_NO_ERR_CODE(BOUNDS_VECTOR)
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LABEL(inval_opcode)
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EXCEPTION_NO_ERR_CODE(INVAL_OP_VECTOR)
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LABEL(copr_not_available)
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TEST_INT_IN_KERNEL(4, copr_not_available_in_kernel)
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cld /* set direction flag to a known value */
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SAVE_PROCESS_CTX(0)
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/* stop user process cycles */
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push %ebp
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mov $0, %ebp
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call _C_LABEL(context_stop)
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call _C_LABEL(copr_not_available_handler)
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/* reached upon failure only */
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jmp _C_LABEL(switch_to_user)
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copr_not_available_in_kernel:
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pushl $0
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pushl $COPROC_NOT_VECTOR
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jmp exception_entry_nested
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LABEL(double_fault)
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EXCEPTION_ERR_CODE(DOUBLE_FAULT_VECTOR)
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LABEL(copr_seg_overrun)
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EXCEPTION_NO_ERR_CODE(COPROC_SEG_VECTOR)
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LABEL(inval_tss)
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EXCEPTION_ERR_CODE(INVAL_TSS_VECTOR)
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LABEL(segment_not_present)
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EXCEPTION_ERR_CODE(SEG_NOT_VECTOR)
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LABEL(stack_exception)
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EXCEPTION_ERR_CODE(STACK_FAULT_VECTOR)
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LABEL(general_protection)
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EXCEPTION_ERR_CODE(PROTECTION_VECTOR)
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LABEL(page_fault)
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EXCEPTION_ERR_CODE(PAGE_FAULT_VECTOR)
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LABEL(copr_error)
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EXCEPTION_NO_ERR_CODE(COPROC_ERR_VECTOR)
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LABEL(alignment_check)
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EXCEPTION_NO_ERR_CODE(ALIGNMENT_CHECK_VECTOR)
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LABEL(machine_check)
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EXCEPTION_NO_ERR_CODE(MACHINE_CHECK_VECTOR)
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LABEL(simd_exception)
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EXCEPTION_NO_ERR_CODE(SIMD_EXCEPTION_VECTOR)
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/*===========================================================================*/
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/* reload_cr3 */
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/*===========================================================================*/
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/* PUBLIC void reload_cr3(void); */
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ENTRY(reload_cr3)
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push %ebp
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mov %esp, %ebp
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mov %cr3, %eax
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mov %eax, %cr3
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pop %ebp
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ret
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#ifdef CONFIG_SMP
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ENTRY(startup_ap_32)
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/*
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* we are in protected mode now, %cs is correct and we need to set the
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* data descriptors before we can touch anything
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*
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* first load the regular, highly mapped idt, gdt
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*/
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/*
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* use the boot stack for now. The running CPUs are already using their
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* own stack, the rest is still waiting to be booted
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*/
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movw $KERN_DS_SELECTOR, %ax
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mov %ax, %ds
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mov %ax, %ss
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mov $_C_LABEL(k_boot_stktop) - 4, %esp
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/* load the highly mapped idt, gdt, per-cpu tss */
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call _C_LABEL(prot_load_selectors)
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jmp _C_LABEL(smp_ap_boot)
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hlt
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#endif
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/*===========================================================================*/
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/* data */
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/*===========================================================================*/
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.data
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.short 0x526F /* this must be the first data entry (magic #) */
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.bss
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k_initial_stack:
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.space K_STACK_SIZE
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LABEL(__k_unpaged_k_initial_stktop)
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/*
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* the kernel stack
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*/
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k_boot_stack:
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.space K_STACK_SIZE /* kernel stack */ /* FIXME use macro here */
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LABEL(k_boot_stktop) /* top of kernel stack */
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.balign K_STACK_SIZE
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LABEL(k_stacks_start)
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/* two pages for each stack, one for data, other as a sandbox */
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.space 2 * (K_STACK_SIZE * (CONFIG_MAX_CPUS + 1))
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LABEL(k_stacks_end)
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/* top of kernel stack */
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