62c666566e
- kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system
43 lines
983 B
C
43 lines
983 B
C
#ifndef __SMP_X86_H__
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#define __SMP_X86_H__
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#include "arch_proto.h" /* K_STACK_SIZE */
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#define MAX_NR_INTERRUPT_ENTRIES 128
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#define SMP_SCHED_PROC 0xF0
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#define SMP_DEQUEUE_PROC 0xF1
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#define SMP_CPU_REBOOT 0xF2
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#define SMP_CPU_HALT 0xF3
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#define SMP_ERROR_INT 0xF4
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/* currently only 2 interrupt priority levels are used */
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#define SPL0 0x0
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#define SPLHI 0xF
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#define SMP_IPI_DEST 0
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#define SMP_IPI_SELF 1
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#define SMP_IPI_TO_ALL 2
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#define SMP_IPI_TO_ALL_BUT_SELF 3
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#ifndef __ASSEMBLY__
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/* returns the current cpu id */
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#define cpuid (((u32_t *)(((u32_t)get_stack_frame() + (K_STACK_SIZE - 1)) \
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& ~(K_STACK_SIZE - 1)))[-1])
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/*
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* in case apic or smp is disabled in boot monitor, we need to finish single cpu
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* boot using the legacy PIC
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*/
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#define smp_single_cpu_fallback() do { \
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tss_init(0, get_k_stack_top(0)); \
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bsp_finish_booting(); \
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} while(0)
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extern unsigned char cpuid2apicid[CONFIG_MAX_CPUS];
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#endif
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#endif /* __SMP_X86_H__ */
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