On the AM335X, writes to the padconf registers must be done in privileged mode. To allow userspace drivers to dynamically change the padconf at runtime, a kernel call has been added. Change-Id: I4b25d2879399b1785a360912faa0e90b5c258533
224 lines
5.1 KiB
C
224 lines
5.1 KiB
C
/* system dependent functions for use inside the whole kernel. */
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#include "kernel/kernel.h"
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#include <unistd.h>
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#include <ctype.h>
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#include <string.h>
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#include <minix/cpufeature.h>
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#include <assert.h>
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#include <signal.h>
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#include <machine/vm.h>
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#include <minix/u64.h>
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#include "archconst.h"
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#include "arch_proto.h"
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#include "serial.h"
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#include "kernel/proc.h"
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#include "kernel/debug.h"
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#include "omap_ccnt.h"
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#include "omap_padconf.h"
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#include "omap_rtc.h"
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#include "omap_reset.h"
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#include "glo.h"
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void * k_stacks;
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static void ser_init(void);
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void fpu_init(void)
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{
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}
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void save_local_fpu(struct proc *pr, int retain)
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{
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}
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void save_fpu(struct proc *pr)
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{
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}
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void arch_proc_reset(struct proc *pr)
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{
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assert(pr->p_nr < NR_PROCS);
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/* Clear process state. */
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memset(&pr->p_reg, 0, sizeof(pr->p_reg));
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if(iskerneln(pr->p_nr))
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pr->p_reg.psr = INIT_TASK_PSR;
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else
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pr->p_reg.psr = INIT_PSR;
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}
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void arch_proc_setcontext(struct proc *p, struct stackframe_s *state,
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int isuser, int trapstyle)
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{
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assert(sizeof(p->p_reg) == sizeof(*state));
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memcpy(&p->p_reg, state, sizeof(*state));
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/* further code is instructed to not touch the context
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* any more
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*/
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p->p_misc_flags |= MF_CONTEXT_SET;
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if(!(p->p_rts_flags)) {
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printf("WARNINIG: setting full context of runnable process\n");
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print_proc(p);
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util_stacktrace();
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}
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}
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void arch_set_secondary_ipc_return(struct proc *p, u32_t val)
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{
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p->p_reg.r1 = val;
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}
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int restore_fpu(struct proc *pr)
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{
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return 0;
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}
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void cpu_identify(void)
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{
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u32_t midr;
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unsigned cpu = cpuid;
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asm volatile("mrc p15, 0, %[midr], c0, c0, 0 @ read MIDR\n\t"
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: [midr] "=r" (midr));
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cpu_info[cpu].implementer = midr >> 24;
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cpu_info[cpu].variant = (midr >> 20) & 0xF;
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cpu_info[cpu].arch = (midr >> 16) & 0xF;
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cpu_info[cpu].part = (midr >> 4) & 0xFFF;
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cpu_info[cpu].revision = midr & 0xF;
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cpu_info[cpu].freq = 660; /* 660 Mhz hardcoded */
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}
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void arch_init(void)
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{
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u32_t value;
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k_stacks = (void*) &k_stacks_start;
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assert(!((vir_bytes) k_stacks % K_STACK_SIZE));
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#ifndef CONFIG_SMP
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/*
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* use stack 0 and cpu id 0 on a single processor machine, SMP
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* configuration does this in smp_init() for all cpus at once
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*/
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tss_init(0, get_k_stack_top(0));
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#endif
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ser_init();
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/* enable user space access to cycle counter */
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/* set cycle counter to 0: ARM ARM B4.1.113 and B4.1.117 */
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asm volatile ("MRC p15, 0, %0, c9, c12, 0\t\n": "=r" (value));
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value |= OMAP_PMCR_C; /* Reset counter */
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value |= OMAP_PMCR_E; /* Enable counter hardware */
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asm volatile ("MCR p15, 0, %0, c9, c12, 0\t\n": : "r" (value));
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/* enable CCNT counting: ARM ARM B4.1.116 */
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value = OMAP_PMCNTENSET_C; /* Enable PMCCNTR cycle counter */
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asm volatile ("MCR p15, 0, %0, c9, c12, 1\t\n": : "r" (value));
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/* enable cycle counter in user mode: ARM ARM B4.1.124 */
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value = OMAP_PMUSERENR_EN;
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asm volatile ("MCR p15, 0, %0, c9, c14, 0\t\n": : "r" (value));
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/* map memory for padconf */
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arch_padconf_init();
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/* map memory for rtc */
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omap3_rtc_init();
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/* map memory for reset control */
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omap3_reset_init();
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}
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/*===========================================================================*
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* do_ser_debug *
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*===========================================================================*/
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void do_ser_debug()
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{
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}
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void arch_do_syscall(struct proc *proc)
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{
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/* do_ipc assumes that it's running because of the current process */
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assert(proc == get_cpulocal_var(proc_ptr));
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/* Make the system call, for real this time. */
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proc->p_reg.retreg =
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do_ipc(proc->p_reg.retreg, proc->p_reg.r1, proc->p_reg.r2);
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}
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reg_t svc_stack;
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struct proc * arch_finish_switch_to_user(void)
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{
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char * stk;
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struct proc * p;
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#ifdef CONFIG_SMP
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stk = (char *)tss[cpuid].sp0;
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#else
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stk = (char *)tss[0].sp0;
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#endif
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svc_stack = (reg_t)stk;
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/* set pointer to the process to run on the stack */
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p = get_cpulocal_var(proc_ptr);
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*((reg_t *)stk) = (reg_t) p;
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/* turn interrupts on */
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p->p_reg.psr &= ~(PSR_I|PSR_F);
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return p;
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}
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void fpu_sigcontext(struct proc *pr, struct sigframe *fr, struct sigcontext *sc)
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{
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}
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reg_t arch_get_sp(struct proc *p) { return p->p_reg.sp; }
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void get_randomness(struct k_randomness *rand, int source)
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{
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}
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static void ser_init(void)
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{
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}
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/*===========================================================================*/
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/* __switch_address_space */
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/*===========================================================================*/
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/*
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* sets the ttbr register to the supplied value if it is not already set to the
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* same value in which case it would only result in an extra TLB flush which is
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* not desirable
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*/
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void __switch_address_space(struct proc *p, struct proc **__ptproc)
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{
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reg_t orig_ttbr, new_ttbr;
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new_ttbr = p->p_seg.p_ttbr;
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if (new_ttbr == 0)
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return;
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orig_ttbr = read_ttbr0();
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/*
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* test if ttbr is loaded with the current value to avoid unnecessary
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* TLB flushes
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*/
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if (new_ttbr == orig_ttbr)
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return;
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write_ttbr0(new_ttbr);
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*__ptproc = p;
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return;
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}
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