43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
#ifndef SRC_H
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#define SRC_H
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#include "es1371.h"
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#include "wait.h"
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int SRCInit(DEV_STRUCT * DSP);
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int SRCRegRead(DEV_STRUCT * DSP, u16_t reg, u16_t *data);
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int SRCRegWrite(DEV_STRUCT * DSP, u16_t reg, u16_t val);
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void SRCSetRate(DEV_STRUCT * DSP, char src_base, u16_t rate);
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/* register/base and control equates for the SRC RAM */
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#define SRC_SYNTH_FIFO 0x00
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#define SRC_DAC_FIFO 0x20
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#define SRC_ADC_FIFO 0x40
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#define SRC_SYNTH_BASE 0x70
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#define SRC_DAC_BASE 0x74
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#define SRC_ADC_BASE 0x78
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#define SRC_SYNTH_LVOL 0x7c
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#define SRC_SYNTH_RVOL 0x7d
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#define SRC_DAC_LVOL 0x7e
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#define SRC_DAC_RVOL 0x7f
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#define SRC_ADC_LVOL 0x6c
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#define SRC_ADC_RVOL 0x6d
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#define SRC_TRUNC_N_OFF 0x00
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#define SRC_INT_REGS_OFF 0x01
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#define SRC_ACCUM_FRAC_OFF 0x02
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#define SRC_VFREQ_FRAC_OFF 0x03
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/* miscellaneous control defines */
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#define SRC_IOPOLL_COUNT 0x1000UL
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#define SRC_WENABLE (1UL << 24)
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#define SRC_BUSY_BIT 23
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#define SRC_BUSY (1UL << SRC_BUSY_BIT)
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#define SRC_DISABLE (1UL << 22)
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#define SRC_SYNTHFREEZE (1UL << 21)
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#define SRC_DACFREEZE (1UL << 20)
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#define SRC_ADCFREEZE (1UL << 19)
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#define SRC_CTLMASK 0x00780000UL
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#endif /* SRC_H */
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