286 lines
5.3 KiB
C
286 lines
5.3 KiB
C
/* asm86.h - 80X86 assembly intermediate Author: Kees J. Bot
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* 27 Jun 1993
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*/
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typedef enum opcode { /* 80486 opcodes, from the i486 reference manual.
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* Synonyms left out, some new words invented.
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*/
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DOT_ALIGN,
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DOT_ASCII, DOT_ASCIZ,
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DOT_ASSERT, /* Pseudo's invented */
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DOT_BASE,
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DOT_COMM, DOT_LCOMM,
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DOT_CODE16,
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DOT_DATA1,
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DOT_DATA2,
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DOT_DATA4,
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DOT_DEFINE, DOT_EXTERN,
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DOT_EQU,
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DOT_FILE, DOT_LINE,
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DOT_LABEL,
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DOT_LIST, DOT_NOLIST,
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DOT_SPACE,
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DOT_SYMB,
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DOT_TEXT, DOT_ROM, DOT_DATA, DOT_BSS, DOT_END,
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DOT_USE16, DOT_USE32,
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AAA,
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AAD,
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AAM,
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AAS,
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ADC,
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ADD,
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AND,
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ARPL,
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BOUND,
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BSF,
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BSR,
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BSWAP,
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BT,
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BTC,
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BTR,
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BTS,
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CALL, CALLF, /* CALLF added */
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CBW,
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CLC,
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CLD,
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CLI,
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CLTS,
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CMC,
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CMP,
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CMPS,
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CMPXCHG,
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CPUID,
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CWD,
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DAA,
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DAS,
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DEC,
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DIV,
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ENTER,
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F2XM1,
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FABS,
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FADD, FADDD, FADDS, FADDP, FIADDL, FIADDS,
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FBLD,
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FBSTP,
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FCHS,
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FCLEX,
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FCOMD, FCOMS, FCOMPD, FCOMPS, FCOMPP,
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FCOS,
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FDECSTP,
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FDIVD, FDIVS, FDIVP, FIDIVL, FIDIVS,
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FDIVRD, FDIVRS, FDIVRP, FIDIVRL, FIDIVRS,
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FFREE,
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FICOM, FICOMP,
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FILDQ, FILDL, FILDS,
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FINCSTP,
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FINIT,
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FISTL, FISTS, FISTP,
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FLDX, FLDD, FLDS,
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FLD1, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, FLDZ,
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FLDCW,
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FLDENV,
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FMULD, FMULS, FMULP, FIMULL, FIMULS,
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FNINIT,
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FNOP,
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FNSAVE,
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FNSTCW,
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FNSTSW,
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FPATAN,
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FPREM,
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FPREM1,
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FPTAN,
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FRNDINT,
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FRSTOR,
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FSAVE,
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FWAIT,
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FXRSTOR,
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FXSAVE,
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FSCALE,
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FSIN,
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FSINCOS,
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FSQRT,
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FSTD, FSTS, FSTP, FSTPX, FSTPD, FSTPS,
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FSTCW,
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FSTENV,
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FSTSW,
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FSUBD, FSUBS, FSUBP, FISUBL, FISUBS,
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FSUBRD, FSUBRS, FSUBPR, FISUBRL, FISUBRS,
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FTST,
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FUCOM, FUCOMP, FUCOMPP,
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FXAM,
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FXCH,
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FXTRACT,
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FYL2X,
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FYL2XP1,
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HLT,
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IDIV,
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IMUL,
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IN,
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INC,
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INS,
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INT, INTO,
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INVD,
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INVLPG,
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IRET, IRETD,
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JA, JAE, JB, JBE, JCXZ, JE, JG, JGE, JL,
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JLE, JNE, JNO, JNP, JNS, JO, JP, JS,
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JMP, JMPF, /* JMPF added */
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LAHF,
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LAR,
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LEA,
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LEAVE,
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LGDT, LIDT,
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LGS, LSS, LDS, LES, LFS,
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LLDT,
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LMSW,
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LOCK,
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LODS,
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LOOP, LOOPE, LOOPNE,
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LSL,
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LTR,
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MFENCE,
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MOV,
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MOVS,
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MOVSX,
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MOVSXB,
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MOVZX,
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MOVZXB,
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MUL,
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NEG,
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NOP,
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NOT,
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OR,
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OUT,
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OUTS,
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PAUSE,
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POP,
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POPA,
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POPAD,
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POPF,
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PUSH,
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PUSHA,
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PUSHAD,
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PUSHF,
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RCL, RCR, ROL, ROR,
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RDMSR,
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RDPMC,
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RDTSC,
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RET, RETF, /* RETF added */
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SAHF,
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SAL, SAR, SHL, SHR,
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SBB,
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SCAS,
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SETA, SETAE, SETB, SETBE, SETE, SETG, SETGE, SETL,
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SETLE, SETNE, SETNO, SETNP, SETNS, SETO, SETP, SETS,
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SGDT, SIDT,
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SHLD,
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SHRD,
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SLDT,
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SMSW,
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STC,
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STD,
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STI,
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STOS,
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STR,
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SUB,
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TEST,
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VERR, VERW,
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WAIT,
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WBINVD,
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WRMSR,
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XADD,
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XCHG,
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XLAT,
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XOR,
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COMMENT,
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C_PREPROCESSOR,
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UNKNOWN
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} opcode_t;
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#define is_pseudo(o) ((o) <= DOT_USE32)
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#define N_OPCODES ((int) XOR + 1)
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#define OPZ 0x01 /* Operand size prefix. */
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#define ADZ 0x02 /* Address size prefix. */
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typedef enum optype {
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NONE, PSEUDO, JUMP, JUMP16, BYTE, WORD, OWORD /* Ordered list! */
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} optype_t;
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typedef enum repeat {
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ONCE, REP, REPE, REPNE
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} repeat_t;
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typedef enum segment {
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DEFSEG, CSEG, DSEG, ESEG, FSEG, GSEG, SSEG
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} segment_t;
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typedef struct expression {
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int operator;
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struct expression *left, *middle, *right;
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char *name;
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size_t len;
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unsigned magic;
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} expression_t;
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typedef struct asm86 {
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opcode_t opcode; /* DOT_TEXT, MOV, ... */
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char *file; /* Name of the file it is found in. */
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long line; /* Line number. */
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optype_t optype; /* Type of operands: byte, word... */
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int oaz; /* Operand/address size prefix? */
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repeat_t rep; /* Repeat prefix used on this instr. */
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segment_t seg; /* Segment override. */
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expression_t *args; /* Arguments in ACK order. */
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unsigned magic;
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char * raw_string; /* each instruction can have a comment.
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Instruction can be empty if the
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comment is the only thing on the
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line. Or the instruction can be a
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preprocessor macro. It may span
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multiple lines and does not contain
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any instruction
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*/
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} asm86_t;
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expression_t *new_expr(void);
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void del_expr(expression_t *a);
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asm86_t *new_asm86(void);
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void del_asm86(asm86_t *a);
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int isregister(const char *name);
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#define IS_REG8(n) ((n) >= 1 && (n) <=8)
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#define IS_REG16(n) ((n) >= 9 && (n) <=16)
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#define IS_REG32(n) ((n) >= 17 && (n) <=24)
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#define IS_REGSEG(n) ((n) >= 25 && (n) <=30)
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#define IS_REGCR(n) ((n) >= 31 && (n) <=35)
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#define segreg2seg(reg) ((segment_t)(reg - 25 + 1))
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/*
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* Format of the arguments of the asm86_t structure:
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*
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*
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* ACK assembly operands expression_t cell:
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* or part of operand: {operator, left, middle, right, name, len}
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*
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* [expr] {'[', nil, expr, nil}
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* word {'W', nil, nil, nil, word}
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* "string" {'S', nil, nil, nil, "string", strlen("string")}
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* label = expr {'=', nil, expr, nil, label}
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* expr * expr {'*', expr, nil, expr}
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* - expr {'-', nil, expr, nil}
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* (memory) {'(', nil, memory, nil}
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* offset(base)(index*n) {'O', offset, base, index*n}
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* base {'B', nil, nil, nil, base}
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* index*4 {'4', nil, nil, nil, index}
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* operand, oplist {',', operand, nil, oplist}
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* label : {':', nil, nil, nil, label}
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*
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* The precedence of operators is ignored. The expression is simply copied
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* as is, including parentheses. Problems like missing operators in the
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* target language will have to be handled by rewriting the source language.
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* 16-bit or 32-bit registers must be used where they are required by the
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* target assembler even though ACK makes no difference between 'ax' and
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* 'eax'. Asmconv is smart enough to transform compiler output. Human made
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* assembly can be fixed up to be transformable.
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*/
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