007104d60e
-Set stack sizes for boot image processes -Increase RS stack size -Reduce ramdisk size -HARDWARE task should use kernel stack -Minor asm tweaks for leading underscores
736 lines
18 KiB
ArmAsm
736 lines
18 KiB
ArmAsm
/*
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* This file is part of the lowest layer of the MINIX kernel. (The other part
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* is "proc.c".) The lowest layer does process switching and message handling.
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* Furthermore it contains the assembler startup code for Minix and the 32-bit
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* interrupt handlers. It cooperates with the code in "start.c" to set up a
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* good environment for main().
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*
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* Kernel is entered either because of kernel-calls, ipc-calls, interrupts or
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* exceptions. TSS is set so that the kernel stack is loaded. The user cotext is
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* saved to the proc table and the handler of the event is called. Once the
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* handler is done, switch_to_user() function is called to pick a new process,
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* finish what needs to be done for the next process to run, sets its context
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* and switch to userspace.
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*
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* For communication with the boot monitor at startup time some constant
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* data are compiled into the beginning of the text segment. This facilitates
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* reading the data at the start of the boot process, since only the first
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* sector of the file needs to be read.
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*
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* Some data storage is also allocated at the end of this file. This data
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* will be at the start of the data segment of the kernel and will be read
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* and modified by the boot monitor before the kernel starts.
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*/
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#include "kernel/kernel.h" /* configures the kernel */
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/* sections */
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#include <machine/vm.h>
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#ifdef __ACK__
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.text
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begtext:
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#ifdef __ACK__
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.rom
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#else
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.data
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#endif
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begrom:
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.data
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begdata:
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.bss
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begbss:
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#endif
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#include <minix/config.h>
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#include <minix/const.h>
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#include <minix/com.h>
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#include <machine/interrupt.h>
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#include "archconst.h"
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#include "kernel/const.h"
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#include "kernel/proc.h"
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#include "sconst.h"
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/* Selected 386 tss offsets. */
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#define TSS3_S_SP0 4
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/*
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* Exported functions
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* Note: in assembly language the .define statement applied to a function name
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* is loosely equivalent to a prototype in C code -- it makes it possible to
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* link to an entity declared in the assembly code but does not create
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* the entity.
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*/
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.globl _restore_user_context
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.globl _reload_cr3
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.globl _divide_error
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.globl _single_step_exception
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.globl _nmi
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.globl _breakpoint_exception
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.globl _overflow
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.globl _bounds_check
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.globl _inval_opcode
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.globl _copr_not_available
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.globl _double_fault
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.globl _copr_seg_overrun
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.globl _inval_tss
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.globl _segment_not_present
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.globl _stack_exception
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.globl _general_protection
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.globl _page_fault
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.globl _copr_error
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.globl _alignment_check
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.globl _machine_check
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.globl _simd_exception
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.globl _params_size
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.globl _params_offset
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.globl _mon_ds
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.globl _switch_to_user
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.globl _lazy_fpu
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.globl _hwint00 /* handlers for hardware interrupts */
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.globl _hwint01
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.globl _hwint02
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.globl _hwint03
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.globl _hwint04
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.globl _hwint05
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.globl _hwint06
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.globl _hwint07
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.globl _hwint08
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.globl _hwint09
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.globl _hwint10
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.globl _hwint11
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.globl _hwint12
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.globl _hwint13
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.globl _hwint14
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.globl _hwint15
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/* Exported variables. */
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.globl begbss
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.globl begdata
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.text
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/*===========================================================================*/
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/* MINIX */
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/*===========================================================================*/
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.globl MINIX
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MINIX:
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/* this is the entry point for the MINIX kernel */
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jmp over_flags /* skip over the next few bytes */
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.short CLICK_SHIFT /* for the monitor: memory granularity */
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flags:
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/* boot monitor flags:
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* call in 386 mode, make bss, make stack,
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* load high, don't patch, will return,
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* uses generic INT, memory vector,
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* new boot code return
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*/
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.short 0x01FD
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nop /* extra byte to sync up disassembler */
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over_flags:
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/* Set up a C stack frame on the monitor stack. (The monitor sets cs and ds */
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/* right. The ss descriptor still references the monitor data segment.) */
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movzwl %sp, %esp /* monitor stack is a 16 bit stack */
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push %ebp
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mov %esp, %ebp
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push %esi
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push %edi
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cmp $0, 4(%ebp) /* monitor return vector is */
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je noret /* nonzero if return possible */
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incl _mon_return
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noret:
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movl %esp, _mon_sp /* save stack pointer for later return */
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/* Copy the monitor global descriptor table to the address space of kernel and */
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/* switch over to it. Prot_init() can then update it with immediate effect. */
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sgdt _gdt+GDT_SELECTOR /* get the monitor gdtr */
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movl _gdt+GDT_SELECTOR+2, %esi /* absolute address of GDT */
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mov $_gdt, %ebx /* address of kernel GDT */
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mov $8*8, %ecx /* copying eight descriptors */
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copygdt:
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movb %es:(%esi), %al
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movb %al, (%ebx)
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inc %esi
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inc %ebx
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loop copygdt
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movl _gdt+DS_SELECTOR+2, %eax /* base of kernel data */
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and $0x00FFFFFF, %eax /* only 24 bits */
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add $_gdt, %eax /* eax = vir2phys(gdt) */
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movl %eax, _gdt+GDT_SELECTOR+2 /* set base of GDT */
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lgdt _gdt+GDT_SELECTOR /* switch over to kernel GDT */
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/* Locate boot parameters, set up kernel segment registers and stack. */
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mov 8(%ebp), %ebx /* boot parameters offset */
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mov 12(%ebp), %edx /* boot parameters length */
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mov 16(%ebp), %eax /* address of a.out headers */
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movl %eax, _aout
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mov %ds, %ax /* kernel data */
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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mov %ax, %ss
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mov $_k_boot_stktop, %esp /* set sp to point to the top of kernel stack */
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/* Save boot parameters into these global variables for i386 code */
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movl %edx, _params_size
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movl %ebx, _params_offset
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movl $SS_SELECTOR, _mon_ds
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/* Call C startup code to set up a proper environment to run main(). */
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push %edx
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push %ebx
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push $SS_SELECTOR
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push $DS_SELECTOR
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push $CS_SELECTOR
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call _cstart /* cstart(cs, ds, mds, parmoff, parmlen) */
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add $5*4, %esp
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/* Reload gdtr, idtr and the segment registers to global descriptor table set */
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/* up by prot_init(). */
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lgdt _gdt+GDT_SELECTOR
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lidt _gdt+IDT_SELECTOR
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ljmp $CS_SELECTOR, $csinit
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csinit:
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movw $DS_SELECTOR, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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mov %ax, %ss
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movw $TSS_SELECTOR, %ax /* no other TSS is used */
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ltr %ax
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push $0 /* set flags to known good state */
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popf /* esp, clear nested task and int enable */
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jmp _main /* main() */
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/*===========================================================================*/
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/* interrupt handlers */
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/* interrupt handlers for 386 32-bit protected mode */
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/*===========================================================================*/
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#define PIC_IRQ_HANDLER(irq) \
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push $irq ;\
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call _irq_handle /* intr_handle(irq_handlers[irq]) */ ;\
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add $4, %esp ;
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/*===========================================================================*/
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/* hwint00 - 07 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_master(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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call _context_stop ;\
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add $4, %esp ;\
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movl $0, %ebp /* for stack trace */ ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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jmp _switch_to_user ;\
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\
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0: \
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pusha ;\
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call _context_stop_idle ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_master macro */
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.balign 16
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_hwint00:
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/* Interrupt routine for irq 0 (the clock). */
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hwint_master(0)
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.balign 16
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_hwint01:
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/* Interrupt routine for irq 1 (keyboard) */
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hwint_master(1)
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.balign 16
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_hwint02:
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/* Interrupt routine for irq 2 (cascade!) */
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hwint_master(2)
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.balign 16
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_hwint03:
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/* Interrupt routine for irq 3 (second serial) */
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hwint_master(3)
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.balign 16
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_hwint04:
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/* Interrupt routine for irq 4 (first serial) */
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hwint_master(4)
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.balign 16
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_hwint05:
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/* Interrupt routine for irq 5 (XT winchester) */
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hwint_master(5)
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.balign 16
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_hwint06:
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/* Interrupt routine for irq 6 (floppy) */
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hwint_master(6)
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.balign 16
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_hwint07:
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/* Interrupt routine for irq 7 (printer) */
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hwint_master(7)
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/*===========================================================================*/
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/* hwint08 - 15 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_slave(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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call _context_stop ;\
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add $4, %esp ;\
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movl $0, %ebp /* for stack trace */ ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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jmp _switch_to_user ;\
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\
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0: \
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pusha ;\
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call _context_stop_idle ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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CLEAR_IF(10*4(%esp)) ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_slave macro */
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.balign 16
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_hwint08:
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/* Interrupt routine for irq 8 (realtime clock) */
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hwint_slave(8)
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.balign 16
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_hwint09:
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/* Interrupt routine for irq 9 (irq 2 redirected) */
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hwint_slave(9)
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.balign 16
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_hwint10:
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/* Interrupt routine for irq 10 */
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hwint_slave(10)
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.balign 16
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_hwint11:
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/* Interrupt routine for irq 11 */
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hwint_slave(11)
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.balign 16
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_hwint12:
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/* Interrupt routine for irq 12 */
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hwint_slave(12)
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.balign 16
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_hwint13:
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/* Interrupt routine for irq 13 (FPU exception) */
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hwint_slave(13)
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.balign 16
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_hwint14:
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/* Interrupt routine for irq 14 (AT winchester) */
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hwint_slave(14)
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.balign 16
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_hwint15:
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/* Interrupt routine for irq 15 */
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hwint_slave(15)
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/*
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* IPC is only from a process to kernel
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*/
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.balign 16
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.globl _ipc_entry
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_ipc_entry:
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %ebx
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push %eax
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push %ecx
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/* stop user process cycles */
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push %ebp
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call _context_stop
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add $4, %esp
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/* for stack trace */
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movl $0, %ebp
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call _do_ipc
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/* restore the current process pointer and save the return value */
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add $3 * 4, %esp
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pop %esi
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mov %eax, AXREG(%esi)
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jmp _switch_to_user
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/*
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* kernel call is only from a process to kernel
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*/
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.balign 16
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.globl _kernel_call_entry
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_kernel_call_entry:
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %eax
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/* stop user process cycles */
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push %ebp
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call _context_stop
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add $4, %esp
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/* for stack trace */
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movl $0, %ebp
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call _kernel_call
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/* restore the current process pointer and save the return value */
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add $8, %esp
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jmp _switch_to_user
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.balign 16
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/*
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* called by the exception interrupt vectors. If the exception does not push
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* errorcode, we assume that the vector handler pushed 0 instead. Next pushed
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* thing is the vector number. From this point on we can continue as if every
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* exception pushes an error code
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*/
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exception_entry:
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/*
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* check if it is a nested trap by comparing the saved code segment
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* descriptor with the kernel CS first
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*/
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TEST_INT_IN_KERNEL(12, exception_entry_nested)
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exception_entry_from_user:
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SAVE_PROCESS_CTX(8)
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/* stop user process cycles */
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push %ebp
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call _context_stop
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add $4, %esp
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/* for stack trace clear %ebp */
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movl $0, %ebp
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|
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/*
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* push a pointer to the interrupt state pushed by the cpu and the
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* vector number pushed by the vector handler just before calling
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* exception_entry and call the exception handler.
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*/
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push %esp
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push $0 /* it's not a nested exception */
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call _exception_handler
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jmp _switch_to_user
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exception_entry_nested:
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pusha
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mov %esp, %eax
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add $(8 * 4), %eax
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push %eax
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pushl $1 /* it's a nested exception */
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call _exception_handler
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add $8, %esp
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popa
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|
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/* clear the error code and the exception number */
|
|
add $8, %esp
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/* resume execution at the point of exception */
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iret
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|
|
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/*===========================================================================*/
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/* restart */
|
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/*===========================================================================*/
|
|
_restore_user_context:
|
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mov 4(%esp), %ebp /* will assume P_STACKBASE == 0 */
|
|
|
|
/* reconstruct the stack for iret */
|
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movl SSREG(%ebp), %eax
|
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push %eax
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|
movl SPREG(%ebp), %eax
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|
push %eax
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movl PSWREG(%ebp), %eax
|
|
push %eax
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|
movl CSREG(%ebp), %eax
|
|
push %eax
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|
movl PCREG(%ebp), %eax
|
|
push %eax
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|
|
|
RESTORE_GP_REGS(%ebp)
|
|
|
|
RESTORE_SEGS(%ebp)
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|
|
|
movl %ss:BPREG(%ebp), %ebp
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|
|
|
iret /* continue process */
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|
|
|
/*===========================================================================*/
|
|
/* exception handlers */
|
|
/*===========================================================================*/
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|
|
#define EXCEPTION_ERR_CODE(vector) \
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push $vector ;\
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jmp exception_entry
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|
|
#define EXCEPTION_NO_ERR_CODE(vector) \
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pushl $0 ;\
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EXCEPTION_ERR_CODE(vector)
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|
|
|
_divide_error:
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EXCEPTION_NO_ERR_CODE(DIVIDE_VECTOR)
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|
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_single_step_exception:
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|
EXCEPTION_NO_ERR_CODE(DEBUG_VECTOR)
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|
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_nmi:
|
|
#ifndef CONFIG_WATCHDOG
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|
EXCEPTION_NO_ERR_CODE(NMI_VECTOR)
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|
#else
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|
/*
|
|
* We have to be very careful as this interrupt can occur anytime. On
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* the other hand, if it interrupts a user process, we will resume the
|
|
* same process which makes things a little simpler. We know that we are
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* already on kernel stack whenever it happened and we can be
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* conservative and save everything as we don't need to be extremely
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* efficient as the interrupt is infrequent and some overhead is already
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* expected.
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*/
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|
|
|
/*
|
|
* save the important registers. We don't save %cs and %ss and they are
|
|
* saved and restored by CPU
|
|
*/
|
|
pushw %ds
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|
pushw %es
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|
pushw %fs
|
|
pushw %gs
|
|
pusha
|
|
|
|
/*
|
|
* We cannot be sure about the state of the kernel segment register,
|
|
* however, we always set %ds and %es to the same as %ss
|
|
*/
|
|
mov %ss, %si
|
|
mov %si, %ds
|
|
mov %si, %es
|
|
|
|
push %esp
|
|
call _nmi_watchdog_handler
|
|
add $4, %esp
|
|
|
|
/* restore all the important registers as they were before the trap */
|
|
popa
|
|
popw %gs
|
|
popw %fs
|
|
popw %es
|
|
popw %ds
|
|
|
|
iret
|
|
#endif
|
|
|
|
_breakpoint_exception:
|
|
EXCEPTION_NO_ERR_CODE(BREAKPOINT_VECTOR)
|
|
|
|
_overflow:
|
|
EXCEPTION_NO_ERR_CODE(OVERFLOW_VECTOR)
|
|
|
|
_bounds_check:
|
|
EXCEPTION_NO_ERR_CODE(BOUNDS_VECTOR)
|
|
|
|
_inval_opcode:
|
|
EXCEPTION_NO_ERR_CODE(INVAL_OP_VECTOR)
|
|
|
|
_copr_not_available:
|
|
TEST_INT_IN_KERNEL(4, copr_not_available_in_kernel)
|
|
clts
|
|
cld /* set direction flag to a known value */
|
|
SAVE_PROCESS_CTX_NON_LAZY(0)
|
|
/* stop user process cycles */
|
|
push %ebp
|
|
call _context_stop
|
|
pop %ebp
|
|
lea P_MISC_FLAGS(%ebp), %ebx
|
|
movw (%ebx), %cx
|
|
and $MF_FPU_INITIALIZED, %cx
|
|
jnz 0f /* jump if FPU is already initialized */
|
|
orw $MF_FPU_INITIALIZED, (%ebx)
|
|
fninit
|
|
jmp copr_return
|
|
0: /* load FPU context for current process */
|
|
mov %ss:FP_SAVE_AREA_P(%ebp), %eax
|
|
cmp $0, _osfxsr_feature
|
|
jz fp_l_no_fxsr /* FXSR is not avaible. */
|
|
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fxrstor (%eax)
|
|
jmp copr_return
|
|
fp_l_no_fxsr:
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
frstor (%eax)
|
|
copr_return:
|
|
orw $MF_USED_FPU, (%ebx) /* fpu was used during last execution */
|
|
jmp _switch_to_user
|
|
|
|
copr_not_available_in_kernel:
|
|
movl $0, (%esp)
|
|
call _panic
|
|
|
|
_double_fault:
|
|
EXCEPTION_ERR_CODE(DOUBLE_FAULT_VECTOR)
|
|
|
|
_copr_seg_overrun:
|
|
EXCEPTION_NO_ERR_CODE(COPROC_SEG_VECTOR)
|
|
|
|
_inval_tss:
|
|
EXCEPTION_ERR_CODE(INVAL_TSS_VECTOR)
|
|
|
|
_segment_not_present:
|
|
EXCEPTION_ERR_CODE(SEG_NOT_VECTOR)
|
|
|
|
_stack_exception:
|
|
EXCEPTION_ERR_CODE(STACK_FAULT_VECTOR)
|
|
|
|
_general_protection:
|
|
EXCEPTION_ERR_CODE(PROTECTION_VECTOR)
|
|
|
|
_page_fault:
|
|
EXCEPTION_ERR_CODE(PAGE_FAULT_VECTOR)
|
|
|
|
_copr_error:
|
|
EXCEPTION_NO_ERR_CODE(COPROC_ERR_VECTOR)
|
|
|
|
_alignment_check:
|
|
EXCEPTION_NO_ERR_CODE(ALIGNMENT_CHECK_VECTOR)
|
|
|
|
_machine_check:
|
|
EXCEPTION_NO_ERR_CODE(MACHINE_CHECK_VECTOR)
|
|
|
|
_simd_exception:
|
|
EXCEPTION_NO_ERR_CODE(SIMD_EXCEPTION_VECTOR)
|
|
|
|
/*===========================================================================*/
|
|
/* lazy_fpu */
|
|
/*===========================================================================*/
|
|
/* void lazy_fpu(struct proc *pptr)
|
|
* It's called, when we are on kernel stack.
|
|
* Actualy lazy code is just few lines, which check MF_USED_FPU,
|
|
* another part is save_init_fpu().
|
|
*/
|
|
_lazy_fpu:
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
push %eax
|
|
push %ebx
|
|
push %ecx
|
|
cmp $0, _fpu_presence /* Do we have FPU? */
|
|
jz no_fpu_available
|
|
mov 8(%ebp), %eax /* Get pptr */
|
|
lea P_MISC_FLAGS(%eax), %ebx
|
|
movw (%ebx), %cx
|
|
and $MF_USED_FPU, %cx
|
|
jz 0f /* Don't save FPU */
|
|
mov %ss:FP_SAVE_AREA_P(%eax), %eax
|
|
cmp $0, _osfxsr_feature
|
|
jz fp_s_no_fxsr /* FXSR is not avaible. */
|
|
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fxsave (%eax)
|
|
fninit
|
|
jmp fp_saved
|
|
fp_s_no_fxsr:
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fnsave (%eax)
|
|
fwait /* required for compatibility with processors prior pentium */
|
|
fp_saved:
|
|
andw $~MF_USED_FPU, (%ebx)
|
|
0: mov %cr0, %eax
|
|
or $0x00000008, %eax /* Set TS flag */
|
|
mov %eax, %cr0
|
|
no_fpu_available:
|
|
pop %ecx
|
|
pop %ebx
|
|
pop %eax
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* reload_cr3 */
|
|
/*===========================================================================*/
|
|
/* PUBLIC void reload_cr3(void); */
|
|
_reload_cr3:
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
mov %cr3, %eax
|
|
mov %eax, %cr3
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* data */
|
|
/*===========================================================================*/
|
|
|
|
#ifdef __ACK__
|
|
.rom /* Before the string table please */
|
|
#else
|
|
.data
|
|
#endif
|
|
.short 0x526F /* this must be the first data entry (magic #) */
|
|
|
|
.bss
|
|
/*
|
|
* the kernel stack
|
|
*/
|
|
.globl _k_boot_stktop
|
|
k_boot_stack:
|
|
.space 4096 /* kernel stack */ /* FIXME use macro here */
|
|
_k_boot_stktop: /* top of kernel stack */
|