66 lines
2.4 KiB
ArmAsm
66 lines
2.4 KiB
ArmAsm
/* $NetBSD: atomic_cas_8.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas <matt@3am-software.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "atomic_op_asm.h"
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#if defined(_ARM_ARCH_6)
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/*
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* ARMv6 has load-exclusive/store-exclusive which works for both user
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* and kernel.
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*/
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ENTRY_NP(_atomic_cas_8)
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mov ip, r0 /* we need r0 for return value */
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1:
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ldrexb r0, [ip] /* load old value */
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cmp r0, r1 /* compare? */
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#ifdef __thumb__
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bne 2f
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#else
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RETc(ne) /* return if different */
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#endif
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strexb r3, r2, [ip] /* store new value */
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cmp r3, #0 /* succeed? */
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bne 1b /* nope, try again. */
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#ifdef _ARM_ARCH_7
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dsb /* data synchronization barrier */
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#else
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mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
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#endif
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2: RET /* return. */
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END(_atomic_cas_8)
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ATOMIC_OP_ALIAS(atomic_cas_8,_atomic_cas_8)
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STRONG_ALIAS(_atomic_cas_char,_atomic_cas_8)
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STRONG_ALIAS(_atomic_cas_uchar,_atomic_cas_8)
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STRONG_ALIAS(__sync_val_compare_and_swap_1,_atomic_cas_8)
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#endif /* _ARM_ARCH_6 */
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