829 lines
20 KiB
ArmAsm
829 lines
20 KiB
ArmAsm
/* sections */
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#include <minix/config.h>
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#include <minix/const.h>
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#include <machine/asm.h>
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#include <machine/interrupt.h>
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#include <machine/vm.h>
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#include "archconst.h"
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#include "kernel/const.h"
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#include "sconst.h"
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#include <machine/multiboot.h>
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/* Easy way to make functions */
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/* Make a function of the form func(arg) */
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#define STACKARG 8(%ebp)
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#define ARG_EAX_ACTION(FUNCTION, ACTION) ;\
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ENTRY(FUNCTION) ;\
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push %ebp ;\
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mov %esp, %ebp ;\
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mov STACKARG, %eax ;\
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ACTION ;\
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pop %ebp ;\
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ret
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/* Make a function of the form ret = func() */
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#define ARG_EAX_RETURN(FUNCTION, EXPR) ;\
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ENTRY(FUNCTION) ;\
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push %ebp ;\
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mov %esp, %ebp ;\
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mov EXPR, %eax ;\
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pop %ebp ;\
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ret
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/* Make a function of the form ret = func() */
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#define ARG_EAX_SET(FUNCTION, DEST) ;\
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ENTRY(FUNCTION) ;\
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push %ebp ;\
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mov %esp, %ebp ;\
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mov STACKARG, %eax ;\
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mov %eax, DEST ;\
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jmp 0f /* a jump is required for some sets */ ;\
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0: pop %ebp ;\
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ret
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/* Make a function of the form ret = func() */
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#define ARG_AX_SET(FUNCTION, DEST) ;\
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ENTRY(FUNCTION) ;\
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push %ebp ;\
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mov %esp, %ebp ;\
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mov STACKARG, %eax ;\
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mov %ax, DEST ;\
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jmp 0f /* a jump is required for some sets */ ;\
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0: pop %ebp ;\
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ret
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/*
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* This file contains a number of assembly code utility routines needed by the
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* kernel.
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*/
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ENTRY(__main)
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ret
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/*===========================================================================*/
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/* phys_insw */
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/*===========================================================================*/
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/*
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* PUBLIC void phys_insw(Port_t port, phys_bytes buf, size_t count);
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* Input an array from an I/O port. Absolute address version of insw().
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*/
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/* transfer data from (disk controller) port to memory */
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ENTRY(phys_insw)
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push %ebp
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mov %esp, %ebp
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cld
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push %edi
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mov 8(%ebp), %edx /* port to read from */
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mov 12(%ebp), %edi /* destination addr */
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mov 16(%ebp), %ecx /* byte count */
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shr $1, %ecx /* word count */
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rep insw /* input many words */
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pop %edi
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pop %ebp
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ret
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/*===========================================================================*/
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/* phys_insb */
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/*===========================================================================*/
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/*
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* PUBLIC void phys_insb(Port_t port, phys_bytes buf, size_t count);
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* Input an array from an I/O port. Absolute address version of insb().
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*/
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/* transfer data from (disk controller) port to memory byte by byte */
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ENTRY(phys_insb)
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push %ebp
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mov %esp, %ebp
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cld
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push %edi
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mov 8(%ebp), %edx /* port to read from */
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mov 12(%ebp), %edi /* destination addr */
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mov 16(%ebp), %ecx /* byte count */
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rep insb /* input many bytes */
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pop %edi
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pop %ebp
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ret
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/*===========================================================================*/
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/* phys_outsw */
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/*===========================================================================*/
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/*
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* PUBLIC void phys_outsw(Port_t port, phys_bytes buf, size_t count);
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* Output an array to an I/O port. Absolute address version of outsw().
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*/
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/* transfer data from memory to (disk controller) port */
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ENTRY(phys_outsw)
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push %ebp
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mov %esp, %ebp
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cld
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push %esi
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mov 8(%ebp), %edx /* port to write to */
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mov 12(%ebp), %esi /* source addr */
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mov 16(%ebp), %ecx /* byte count */
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shr $1, %ecx /* word count */
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rep outsw /* output many words */
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pop %esi
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pop %ebp
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ret
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/*===========================================================================*/
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/* phys_outsb */
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/*===========================================================================*/
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/*
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* PUBLIC void phys_outsb(Port_t port, phys_bytes buf, size_t count);
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* Output an array to an I/O port. Absolute address version of outsb().
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*/
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/* transfer data from memory to (disk controller) port byte by byte */
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ENTRY(phys_outsb)
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push %ebp
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mov %esp, %ebp
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cld
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push %esi
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mov 8(%ebp), %edx /* port to write to */
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mov 12(%ebp), %esi /* source addr */
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mov 16(%ebp), %ecx /* byte count */
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rep outsb /* output many bytes */
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pop %esi
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pop %ebp
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ret
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/*===========================================================================*/
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/* phys_copy */
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/*===========================================================================*/
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/*
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* PUBLIC phys_bytes phys_copy(phys_bytes source, phys_bytes destination,
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* phys_bytes bytecount);
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* Copy a block of data from anywhere to anywhere in physical memory.
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*/
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/* es edi esi eip src dst len */
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ENTRY(phys_copy)
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push %ebp
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mov %esp, %ebp
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cld
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push %esi
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push %edi
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mov 8(%ebp), %esi
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mov 12(%ebp), %edi
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mov 16(%ebp), %eax
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cmp $10, %eax /* avoid align overhead for small counts */
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jb pc_small
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mov %esi, %ecx /* align source, hope target is too */
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neg %ecx
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and $3, %ecx /* count for alignment */
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sub %ecx, %eax
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rep movsb (%esi), (%edi)
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mov %eax, %ecx
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shr $2, %ecx /* count of dwords */
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rep movsl (%esi), (%edi)
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and $3, %eax
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pc_small:
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xchg %eax, %ecx /* remainder */
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rep movsb (%esi), (%edi)
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mov $0, %eax /* 0 means: no fault */
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LABEL(phys_copy_fault) /* kernel can send us here */
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pop %edi
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pop %esi
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pop %ebp
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ret
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LABEL(phys_copy_fault_in_kernel) /* kernel can send us here */
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pop %edi
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pop %esi
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pop %ebp
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mov %cr2, %eax
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ret
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/*===========================================================================*/
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/* copy_msg_from_user */
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/*===========================================================================*/
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/*
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* int copy_msg_from_user(message * user_mbuf, message * dst);
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*
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* Copies a message of 64 bytes from user process space to a kernel buffer. This
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* function assumes that the process address space is installed (cr3 loaded).
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*
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* This function from the callers point of view either succeeds or returns an
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* error which gives the caller a chance to respond accordingly. In fact it
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* either succeeds or if it generates a pagefault, general protection or other
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* exception, the trap handler has to redirect the execution to
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* __user_copy_msg_pointer_failure where the error is reported to the caller
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* without resolving the pagefault. It is not kernel's problem to deal with
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* wrong pointers from userspace and the caller should return an error to
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* userspace as if wrong values or request were passed to the kernel
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*/
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ENTRY(copy_msg_from_user)
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/* load the source pointer */
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mov 4(%esp), %ecx
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/* load the destination pointer */
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mov 8(%esp), %edx
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/* mov 0*4(%ecx), %eax
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mov %eax, 0*4(%edx) */
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mov 1*4(%ecx), %eax
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mov %eax, 1*4(%edx)
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mov 2*4(%ecx), %eax
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mov %eax, 2*4(%edx)
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mov 3*4(%ecx), %eax
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mov %eax, 3*4(%edx)
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mov 4*4(%ecx), %eax
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mov %eax, 4*4(%edx)
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mov 5*4(%ecx), %eax
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mov %eax, 5*4(%edx)
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mov 6*4(%ecx), %eax
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mov %eax, 6*4(%edx)
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mov 7*4(%ecx), %eax
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mov %eax, 7*4(%edx)
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mov 8*4(%ecx), %eax
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mov %eax, 8*4(%edx)
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mov 9*4(%ecx), %eax
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mov %eax, 9*4(%edx)
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mov 10*4(%ecx), %eax
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mov %eax, 10*4(%edx)
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mov 11*4(%ecx), %eax
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mov %eax, 11*4(%edx)
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mov 12*4(%ecx), %eax
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mov %eax, 12*4(%edx)
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mov 13*4(%ecx), %eax
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mov %eax, 13*4(%edx)
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mov 14*4(%ecx), %eax
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mov %eax, 14*4(%edx)
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mov 15*4(%ecx), %eax
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mov %eax, 15*4(%edx)
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LABEL(__copy_msg_from_user_end)
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movl $0, %eax
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ret
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/*===========================================================================*/
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/* copy_msg_to_user */
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/*===========================================================================*/
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/*
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* void copy_msg_to_user(message * src, message * user_mbuf);
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*
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* Copies a message of 64 bytes to user process space from a kernel buffer.
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*
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* All the other copy_msg_from_user() comments apply here as well!
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*/
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ENTRY(copy_msg_to_user)
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/* load the source pointer */
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mov 4(%esp), %ecx
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/* load the destination pointer */
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mov 8(%esp), %edx
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mov 0*4(%ecx), %eax
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mov %eax, 0*4(%edx)
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mov 1*4(%ecx), %eax
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mov %eax, 1*4(%edx)
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mov 2*4(%ecx), %eax
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mov %eax, 2*4(%edx)
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mov 3*4(%ecx), %eax
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mov %eax, 3*4(%edx)
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mov 4*4(%ecx), %eax
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mov %eax, 4*4(%edx)
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mov 5*4(%ecx), %eax
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mov %eax, 5*4(%edx)
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mov 6*4(%ecx), %eax
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mov %eax, 6*4(%edx)
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mov 7*4(%ecx), %eax
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mov %eax, 7*4(%edx)
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mov 8*4(%ecx), %eax
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mov %eax, 8*4(%edx)
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mov 9*4(%ecx), %eax
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mov %eax, 9*4(%edx)
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mov 10*4(%ecx), %eax
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mov %eax, 10*4(%edx)
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mov 11*4(%ecx), %eax
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mov %eax, 11*4(%edx)
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mov 12*4(%ecx), %eax
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mov %eax, 12*4(%edx)
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mov 13*4(%ecx), %eax
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mov %eax, 13*4(%edx)
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mov 14*4(%ecx), %eax
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mov %eax, 14*4(%edx)
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mov 15*4(%ecx), %eax
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mov %eax, 15*4(%edx)
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LABEL(__copy_msg_to_user_end)
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movl $0, %eax
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ret
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/*
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* if a function from a selected set of copies from or to userspace fails, it is
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* because of a wrong pointer supplied by the userspace. We have to clean up and
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* and return -1 to indicated that something wrong has happend. The place it was
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* called from has to handle this situation. The exception handler redirect us
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* here to continue, clean up and report the error
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*/
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ENTRY(__user_copy_msg_pointer_failure)
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movl $-1, %eax
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ret
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/*===========================================================================*/
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/* phys_memset */
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/*===========================================================================*/
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/*
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* PUBLIC void phys_memset(phys_bytes dst, unsigned long pattern,
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* phys_bytes bytecount);
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* Fill a block of physical memory with pattern.
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*/
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ENTRY(phys_memset)
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push %ebp
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mov %esp, %ebp
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push %edi
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cld
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mov 8(%ebp), %edi
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mov 16(%ebp), %ecx
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mov 12(%ebp), %eax
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shr $2, %ecx
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rep stosl
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/* Any remaining bytes? */
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mov 16(%ebp), %ecx
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and $3, %ecx
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rep stosb
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LABEL(memset_fault) /* kernel can send us here */
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mov $0, %eax /* 0 means: no fault */
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pop %edi
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pop %ebp
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ret
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LABEL(memset_fault_in_kernel) /* kernel can send us here */
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pop %edi
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pop %ebp
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mov %cr2, %eax
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ret
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/*===========================================================================*/
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/* x86_triplefault */
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/*===========================================================================*/
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/*
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* PUBLIC void x86_triplefault();
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* Reset the system by loading IDT with offset 0 and interrupting.
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*/
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ENTRY(x86_triplefault)
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lidt idt_zero
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int $3 /* anything goes, the 386 will not like it */
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.data
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idt_zero:
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.long 0, 0
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.text
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/*===========================================================================*/
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/* halt_cpu */
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/*===========================================================================*/
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/*
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* PUBLIC void halt_cpu(void);
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* reanables interrupts and puts the cpu in the halts state. Once an interrupt
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* is handled the execution resumes by disabling interrupts and continues
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*/
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ENTRY(halt_cpu)
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sti
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hlt /* interrupts enabled only after this instruction is executed! */
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/*
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* interrupt handlers make sure that the interrupts are disabled when we
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* get here so we take only _one_ interrupt after halting the CPU
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*/
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ret
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/*===========================================================================*/
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/* poweroff_vmware_clihlt */
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/*===========================================================================*/
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/*
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* PUBLIC void poweroff_vmware_clihlt(void);
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* VMware detects this peculiar sequence and forces the virtual machine off
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* when the parameter gui.exitOnCLIHLT is set to TRUE.
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* Otherwise this sequence just hangs the CPU, requiring a power down action.
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*/
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ENTRY(poweroff_vmware_clihlt)
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#ifndef NO_VMWARE_DETECTION
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mov $1, %eax
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cpuid
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test $[1<<31], %ecx /* "virtualized" */
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jz 1f /* always 0 on real hardware */
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mov $0x40000000, %eax /* select hypervisor-use leaf */
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cpuid
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cmp $0x61774D56, %ebx /* ASCII "VMwa" */
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jne 1f
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cmp $0x4D566572, %ecx /* ASCII "reVM" */
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jne 1f
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cmp $0x65726177, %edx /* ASCII "ware" */
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jne 1f
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/* we are virtualized by some VMware product! */
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#endif
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cli
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hlt
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1: ret
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/*===========================================================================*/
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/* read_flags */
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/*===========================================================================*/
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/*
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* PUBLIC unsigned long read_cpu_flags(void);
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* Read CPU status flags from C.
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*/
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ENTRY(read_cpu_flags)
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pushf
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mov (%esp), %eax
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add $4, %esp
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ret
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ENTRY(read_ds)
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mov $0, %eax
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mov %ds, %ax
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ret
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ENTRY(read_cs)
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mov $0, %eax
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mov %cs, %ax
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ret
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ENTRY(read_ss)
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mov $0, %eax
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mov %ss, %ax
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ret
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/*===========================================================================*/
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/* fpu_routines */
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/*===========================================================================*/
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/* non-waiting FPU initialization */
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ENTRY(fninit)
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fninit
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ret
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ENTRY(clts)
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clts
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ret
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/* store status word (non-waiting) */
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ENTRY(fnstsw)
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xor %eax, %eax
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/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
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fnstsw %ax
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ret
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/*===========================================================================*/
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/* fxrstor */
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/*===========================================================================*/
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ENTRY(fxrstor)
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mov 4(%esp), %eax
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fxrstor (%eax)
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ENTRY(__fxrstor_end)
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xor %eax, %eax
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ret
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/*===========================================================================*/
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/* frstor */
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/*===========================================================================*/
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ENTRY(frstor)
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mov 4(%esp), %eax
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frstor (%eax)
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ENTRY(__frstor_end)
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xor %eax, %eax
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ret
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/* Shared exception handler for both fxrstor and frstor. */
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ENTRY(__frstor_failure)
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mov $1, %eax
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ret
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/* Read/write control registers */
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ARG_EAX_RETURN(read_cr0, %cr0);
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ARG_EAX_RETURN(read_cr2, %cr2);
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ARG_EAX_RETURN(read_cr3, %cr3);
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ARG_EAX_RETURN(read_cr4, %cr4);
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ARG_EAX_SET(write_cr4, %cr4);
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ARG_EAX_SET(write_cr0, %cr0);
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ARG_EAX_SET(write_cr3, %cr3);
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/* Read/write various descriptor tables */
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ARG_EAX_ACTION(x86_ltr, ltr STACKARG );
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ARG_EAX_ACTION(x86_lidt, lidtl (%eax));
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ARG_EAX_ACTION(x86_lgdt, lgdt (%eax));
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ARG_EAX_ACTION(x86_lldt, lldt STACKARG);
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ARG_EAX_ACTION(x86_sgdt, sgdt (%eax));
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ARG_EAX_ACTION(x86_sidt, sidt (%eax));
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/* Load segments */
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ARG_AX_SET(x86_load_ds, %ds)
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ARG_AX_SET(x86_load_es, %es)
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ARG_AX_SET(x86_load_fs, %fs)
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ARG_AX_SET(x86_load_gs, %gs)
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ARG_AX_SET(x86_load_ss, %ss)
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/* FPU */
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ARG_EAX_ACTION(fnsave, fnsave (%eax) ; fwait);
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ARG_EAX_ACTION(fxsave, fxsave (%eax));
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ARG_EAX_ACTION(fnstcw, fnstcw (%eax));
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/* invlpg */
|
|
ARG_EAX_ACTION(i386_invlpg, invlpg (%eax));
|
|
|
|
ENTRY(x86_load_kerncs)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
mov 8(%ebp), %eax
|
|
jmp $KERN_CS_SELECTOR, $newcs
|
|
newcs:
|
|
pop %ebp
|
|
ret
|
|
|
|
/*
|
|
* Read the Model Specific Register (MSR) of IA32 architecture
|
|
*
|
|
* void ia32_msr_read(u32_t reg, u32_t * hi, u32_t * lo)
|
|
*/
|
|
ENTRY(ia32_msr_read)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
|
|
mov 8(%ebp), %ecx
|
|
rdmsr
|
|
mov 12(%ebp), %ecx
|
|
mov %edx, (%ecx)
|
|
mov 16(%ebp), %ecx
|
|
mov %eax, (%ecx)
|
|
|
|
pop %ebp
|
|
ret
|
|
|
|
/*
|
|
* Write the Model Specific Register (MSR) of IA32 architecture
|
|
*
|
|
* void ia32_msr_write(u32_t reg, u32_t hi, u32_t lo)
|
|
*/
|
|
ENTRY(ia32_msr_write)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
|
|
mov 12(%ebp), %edx
|
|
mov 16(%ebp), %eax
|
|
mov 8(%ebp), %ecx
|
|
wrmsr
|
|
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* __switch_address_space */
|
|
/*===========================================================================*/
|
|
/* PUBLIC void __switch_address_space(struct proc *p, struct ** ptproc)
|
|
*
|
|
* sets the %cr3 register to the supplied value if it is not already set to the
|
|
* same value in which case it would only result in an extra TLB flush which is
|
|
* not desirable
|
|
*/
|
|
ENTRY(__switch_address_space)
|
|
/* read the process pointer */
|
|
mov 4(%esp), %edx
|
|
/* get the new cr3 value */
|
|
movl P_CR3(%edx), %eax
|
|
/* test if the new cr3 != NULL */
|
|
cmpl $0, %eax
|
|
je 0f
|
|
|
|
/*
|
|
* test if the cr3 is loaded with the current value to avoid unnecessary
|
|
* TLB flushes
|
|
*/
|
|
mov %cr3, %ecx
|
|
cmp %ecx, %eax
|
|
je 0f
|
|
mov %eax, %cr3
|
|
/* get ptproc */
|
|
mov 8(%esp), %eax
|
|
mov %edx, (%eax)
|
|
0:
|
|
ret
|
|
|
|
/* acknowledge just the master PIC */
|
|
ENTRY(eoi_8259_master)
|
|
movb $END_OF_INT, %al
|
|
outb $INT_CTL
|
|
ret
|
|
|
|
/* we have to acknowledge both PICs */
|
|
ENTRY(eoi_8259_slave)
|
|
movb $END_OF_INT, %al
|
|
outb $INT_CTL
|
|
outb $INT2_CTL
|
|
ret
|
|
|
|
/* in some cases we need to force TLB update, reloading cr3 does the trick */
|
|
ENTRY(refresh_tlb)
|
|
mov %cr3, %eax
|
|
mov %eax, %cr3
|
|
ret
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
/*===========================================================================*/
|
|
/* smp_get_htt */
|
|
/*===========================================================================*/
|
|
/* PUBLIC int smp_get_htt(void); */
|
|
/* return true if the processor is hyper-threaded. */
|
|
ENTRY(smp_get_htt)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
pushf
|
|
pop %eax
|
|
mov %eax, %ebx
|
|
and $0x200000, %eax
|
|
je 0f
|
|
mov $0x1, %eax
|
|
/* FIXME don't use the byte code */
|
|
.byte 0x0f, 0xa2 /* opcode for cpuid */
|
|
mov %edx, %eax
|
|
pop %ebp
|
|
ret
|
|
0:
|
|
xor %eax, %eax
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* smp_get_num_htt */
|
|
/*===========================================================================*/
|
|
/* PUBLIC int smp_get_num_htt(void); */
|
|
/* Get the number of hyper-threaded processor cores */
|
|
ENTRY(smp_get_num_htt)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
pushf
|
|
pop %eax
|
|
mov %eax, %ebx
|
|
and $0x200000, %eax
|
|
je 0f
|
|
mov $0x1, %eax
|
|
/* FIXME don't use the byte code */
|
|
.byte 0x0f, 0xa2 /* opcode for cpuid */
|
|
mov %ebx, %eax
|
|
pop %ebp
|
|
ret
|
|
0:
|
|
xor %eax, %eax
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* smp_get_cores */
|
|
/*===========================================================================*/
|
|
/* PUBLIC int smp_get_cores(void); */
|
|
/* Get the number of cores. */
|
|
ENTRY(smp_get_cores)
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
pushf
|
|
pop %eax
|
|
mov %eax, %ebx
|
|
and $0x200000, %eax
|
|
je 0f
|
|
push %ecx
|
|
xor %ecx, %ecx
|
|
mov $0x4, %eax
|
|
/* FIXME don't use the byte code */
|
|
.byte 0x0f, 0xa2 /* opcode for cpuid */
|
|
pop %ebp
|
|
ret
|
|
0:
|
|
xor %eax, %eax
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* arch_spinlock_lock */
|
|
/*===========================================================================*/
|
|
/* void arch_spinlock_lock (u32_t *lock_data)
|
|
* {
|
|
* while (test_and_set(lock_data) == 1)
|
|
* while (*lock_data == 1)
|
|
* ;
|
|
* }
|
|
* eax register is clobbered.
|
|
*/
|
|
ENTRY(arch_spinlock_lock)
|
|
mov 4(%esp), %eax
|
|
mov $1, %edx
|
|
2:
|
|
mov $1, %ecx
|
|
xchg %ecx, (%eax)
|
|
test %ecx, %ecx
|
|
je 0f
|
|
|
|
cmp $(1<< 16), %edx
|
|
je 1f
|
|
shl %edx
|
|
1:
|
|
mov %edx, %ecx
|
|
3:
|
|
pause
|
|
sub $1, %ecx
|
|
test %ecx, %ecx
|
|
jz 2b
|
|
jmp 3b
|
|
0:
|
|
mfence
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* arch_spinlock_unlock */
|
|
/*===========================================================================*/
|
|
/* * void arch_spinlock_unlock (unsigned int *lockp) */
|
|
/* spin lock release routine. */
|
|
ENTRY(arch_spinlock_unlock)
|
|
mov 4(%esp), %eax
|
|
mov $0, %ecx
|
|
xchg %ecx, (%eax)
|
|
mfence
|
|
ret
|
|
|
|
#endif /* CONFIG_SMP */
|
|
|
|
/*===========================================================================*/
|
|
/* mfence */
|
|
/*===========================================================================*/
|
|
/* PUBLIC void mfence (void); */
|
|
/* architecture specific memory barrier routine. */
|
|
ENTRY(mfence)
|
|
mfence
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* arch_pause */
|
|
/*===========================================================================*/
|
|
/* PUBLIC void arch_pause (void); */
|
|
/* architecture specific pause routine. */
|
|
ENTRY(arch_pause)
|
|
pause
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* read_ebp */
|
|
/*===========================================================================*/
|
|
/* PUBLIC u16_t cpuid(void) */
|
|
ENTRY(read_ebp)
|
|
mov %ebp, %eax
|
|
ret
|
|
|
|
ENTRY(interrupts_enable)
|
|
sti
|
|
ret
|
|
|
|
ENTRY(interrupts_disable)
|
|
cli
|
|
ret
|
|
|
|
|
|
/*
|
|
* void switch_k_stack(void * esp, void (* continuation)(void));
|
|
*
|
|
* sets the current stack pointer to the given value and continues execution at
|
|
* the given address
|
|
*/
|
|
ENTRY(switch_k_stack)
|
|
/* get the arguments from the stack */
|
|
mov 8(%esp), %eax
|
|
mov 4(%esp), %ecx
|
|
mov $0, %ebp /* reset %ebp for stack trace */
|
|
mov %ecx, %esp /* set the new stack */
|
|
jmp *%eax /* and jump to the continuation */
|
|
|
|
/* NOT_REACHABLE */
|
|
0: jmp 0b
|
|
|
|
.data
|
|
idt_ptr:
|
|
.short 0x3ff
|
|
.long 0x0
|
|
|
|
ldtsel:
|
|
.long LDT_SELECTOR
|