201 lines
6.2 KiB
C
201 lines
6.2 KiB
C
/*
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* 3c503.c A shared memory driver for Etherlink II board.
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*
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* Created: Dec. 20, 1996 by G. Falzoni <falzoni@marina.scn.de>
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*
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* Inspired by the TNET package by M. Ostrowski, the driver for Linux
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* by D. Becker, the Crynwr 3c503 packet driver, and the Amoeba driver.
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*
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* It works in shared memory mode and should be used with the
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* device driver for NS 8390 based cards of Minix. Programmed
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* I/O could be used as well but would result in poor performance.
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*/
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#include <minix/drivers.h>
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#include <net/gen/ether.h>
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#include <net/gen/eth_io.h>
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#include "local.h"
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#include "dp8390.h"
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#include "3c503.h"
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#if ENABLE_3C503
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extern u32_t system_hz;
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#define MILLIS_TO_TICKS(m) (((m)*system_hz/1000)+1)
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static void el2_init(dpeth_t *dep);
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static void el2_stop(dpeth_t *dep);
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static void milli_delay(unsigned long millis);
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/*===========================================================================*
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* el2_init *
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*===========================================================================*/
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static void el2_init(dep)
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dpeth_t * dep;
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{
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/* Initalize hardware and data structures. */
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int ix, irq;
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int sendq_nr;
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int cntr;
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/* Map the address PROM to lower I/O address range */
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cntr = inb_el2(dep, EL2_CNTR);
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outb_el2(dep, EL2_CNTR, cntr | ECNTR_SAPROM);
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/* Read station address from PROM */
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for (ix = EL2_EA0; ix <= EL2_EA5; ix += 1)
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dep->de_address.ea_addr[ix] = inb_el2(dep, ix);
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/* Map the 8390 back to lower I/O address range */
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outb_el2(dep, EL2_CNTR, cntr);
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/* Enable memory, but turn off interrupts until we are ready */
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outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
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dep->de_data_port = dep->de_dp8390_port = dep->de_base_port;
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dep->de_prog_IO = 0; /* Programmed I/O not yet available */
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/* Check width of data bus:
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* 1. Write 0 to WTS bit. The board will drive it to 1 if it is a
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* 16-bit card.
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* 2. Select page 2
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* 3. See if it is a 16-bit card
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* 4. Select page 0
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*/
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outb_el2(dep, DP_CR, CR_PS_P0|CR_DM_ABORT|CR_STP);
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outb_el2(dep, DP_DCR, 0);
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outb_el2(dep, DP_CR, CR_PS_P2|CR_DM_ABORT|CR_STP);
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dep->de_16bit = (inb_el2(dep, DP_DCR) & DCR_WTS) != 0;
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outb_el2(dep, DP_CR, CR_PS_P0|CR_DM_ABORT|CR_STP);
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/* Allocate one send buffer (1.5KB) per 8KB of on board memory. */
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sendq_nr = (dep->de_ramsize - dep->de_offset_page) / 0x2000;
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if (sendq_nr < 1)
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sendq_nr = 1;
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else if (sendq_nr > SENDQ_NR)
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sendq_nr = SENDQ_NR;
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dep->de_sendq_nr = sendq_nr;
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for (ix = 0; ix < sendq_nr; ix++)
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dep->de_sendq[ix].sq_sendpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
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dep->de_startpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
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dep->de_stoppage = EL2_SM_STOP_PG;
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outb_el2(dep, EL2_STARTPG, dep->de_startpage);
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outb_el2(dep, EL2_STOPPG, dep->de_stoppage);
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/* Point the vector pointer registers somewhere ?harmless?. */
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outb_el2(dep, EL2_VP2, 0xFF); /* Point at the ROM restart location */
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outb_el2(dep, EL2_VP1, 0xFF); /* 0xFFFF:0000 (from original sources) */
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outb_el2(dep, EL2_VP0, 0x00); /* - What for protected mode? */
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/* Set interrupt level for 3c503 */
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irq = (dep->de_irq &= ~DEI_DEFAULT); /* Strip the default flag. */
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if (irq == 9) irq = 2;
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if (irq < 2 || irq > 5) panic("bad 3c503 irq configuration: %d", irq);
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outb_el2(dep, EL2_IDCFG, (0x04 << irq));
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outb_el2(dep, EL2_DRQCNT, 0x08); /* Set burst size to 8 */
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outb_el2(dep, EL2_DMAAH, EL2_SM_START_PG); /* Put start of TX */
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outb_el2(dep, EL2_DMAAL, 0x00); /* buffer in the GA DMA reg */
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outb_el2(dep, EL2_CFGR, ECFGR_NORM); /* Enable shared memory */
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if (!debug) {
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printf("%s: 3c503 at %X:%d:%lX\n",
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dep->de_name, dep->de_base_port, dep->de_irq,
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dep->de_linmem + dep->de_offset_page);
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} else {
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printf("%s: 3Com Etherlink II %sat I/O address 0x%X, "
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"memory address 0x%lX, irq %d\n",
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dep->de_name, dep->de_16bit ? "(16-bit) " : "",
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dep->de_base_port,
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dep->de_linmem + dep->de_offset_page,
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dep->de_irq);
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}
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}
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/*===========================================================================*
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* el2_stop *
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*===========================================================================*/
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static void el2_stop(dep)
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dpeth_t * dep;
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{
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/* Stops board by disabling interrupts. */
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#if DEBUG
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printf("%s: stopping Etherlink\n", dep->de_name);
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#endif
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outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
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return;
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}
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/*===========================================================================*
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* el2_probe *
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*===========================================================================*/
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int el2_probe(dep)
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dpeth_t * dep;
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{
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/* Probe for the presence of an EtherLink II card. Initialize memory
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* addressing if card detected.
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*/
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int iobase, membase;
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int thin;
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/* Thin ethernet or AUI? */
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thin = (dep->de_linmem & 1) ? ECNTR_AUI : ECNTR_THIN;
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/* Location registers should have 1 bit set */
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if (!(iobase = inb_el2(dep, EL2_IOBASE))) return 0;
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if (!((membase = inb_el2(dep, EL2_MEMBASE)) & 0xF0)) return 0;
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if ((iobase & (iobase - 1)) || (membase & (membase - 1))) return 0;
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/* Resets board */
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outb_el2(dep, EL2_CNTR, ECNTR_RESET | thin);
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milli_delay(1);
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outb_el2(dep, EL2_CNTR, thin);
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milli_delay(5);
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/* Map the address PROM to lower I/O address range */
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outb_el2(dep, EL2_CNTR, ECNTR_SAPROM | thin);
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if (inb_el2(dep, EL2_EA0) != 0x02 || /* Etherlink II Station address */
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inb_el2(dep, EL2_EA1) != 0x60 || /* MUST be 02:60:8c:xx:xx:xx */
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inb_el2(dep, EL2_EA2) != 0x8C)
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return 0; /* No Etherlink board at this address */
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/* Map the 8390 back to lower I/O address range */
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outb_el2(dep, EL2_CNTR, thin);
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/* Setup shared memory addressing for 3c503 */
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dep->de_linmem = ((membase & 0xC0) ? EL2_BASE_0D8000 : EL2_BASE_0C8000) +
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((membase & 0xA0) ? (EL2_BASE_0CC000 - EL2_BASE_0C8000) : 0x0000);
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dep->de_offset_page = (EL2_SM_START_PG * DP_PAGESIZE);
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dep->de_ramsize = (EL2_SM_STOP_PG - EL2_SM_START_PG) * DP_PAGESIZE;
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/* (Bad kludge, something Philip needs to look into. -- kjb) */
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dep->de_linmem -= dep->de_offset_page;
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dep->de_ramsize += dep->de_offset_page;
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/* Board initialization and stop functions */
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dep->de_initf = el2_init;
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dep->de_stopf = el2_stop;
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return 1;
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}
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static void milli_delay(unsigned long millis)
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{
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tickdelay(MILLIS_TO_TICKS(millis));
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}
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#endif /* ENABLE_3C503 */
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/** 3c503.c **/
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/*
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* $PchId: 3c503.c,v 1.3 2003/09/10 15:33:04 philip Exp $
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*/
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