1b56fdb33c
- as thre are still KERNEL and IDLE entries, time accounting for kernel and idle time works the same as for any other process - everytime we stop accounting for the currently running process, kernel or idle, we read the TSC counter and increment the p_cycles entry. - the process cycles inherently include some of the kernel cycles as we can stop accounting for the process only after we save its context and we start accounting just before we restore its context - this assumes that the system does not scale the CPU frequency which will be true for ... long time ;-)
765 lines
19 KiB
ArmAsm
765 lines
19 KiB
ArmAsm
/*
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* This file, mpx386.s, is included by mpx.s when Minix is compiled for
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* 32-bit Intel CPUs. The alternative mpx88.s is compiled for 16-bit CPUs.
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*
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* This file is part of the lowest layer of the MINIX kernel. (The other part
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* is "proc.c".) The lowest layer does process switching and message handling.
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* Furthermore it contains the assembler startup code for Minix and the 32-bit
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* interrupt handlers. It cooperates with the code in "start.c" to set up a
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* good environment for main().
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*
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* Every transition to the kernel goes through this file. Transitions to the
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* kernel may be nested. The initial entry may be with a system call (i.e.,
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* send or receive a message), an exception or a hardware interrupt; kernel
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* reentries may only be made by hardware interrupts. The count of reentries
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* is kept in "k_reenter". It is important for deciding whether to switch to
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* the kernel stack and for protecting the message passing code in "proc.c".
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*
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* For the message passing trap, most of the machine state is saved in the
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* proc table. (Some of the registers need not be saved.) Then the stack is
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* switched to "k_stack", and interrupts are reenabled. Finally, the system
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* call handler (in C) is called. When it returns, interrupts are disabled
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* again and the code falls into the restart routine, to finish off held-up
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* interrupts and run the process or task whose pointer is in "proc_ptr".
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*
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* Hardware interrupt handlers do the same, except (1) The entire state must
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* be saved. (2) There are too many handlers to do this inline, so the save
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* routine is called. A few cycles are saved by pushing the address of the
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* appropiate restart routine for a return later. (3) A stack switch is
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* avoided when the stack is already switched. (4) The (master) 8259 interrupt
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* controller is reenabled centrally in save(). (5) Each interrupt handler
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* masks its interrupt line using the 8259 before enabling (other unmasked)
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* interrupts, and unmasks it after servicing the interrupt. This limits the
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* nest level to the number of lines and protects the handler from itself.
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*
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* For communication with the boot monitor at startup time some constant
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* data are compiled into the beginning of the text segment. This facilitates
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* reading the data at the start of the boot process, since only the first
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* sector of the file needs to be read.
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*
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* Some data storage is also allocated at the end of this file. This data
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* will be at the start of the data segment of the kernel and will be read
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* and modified by the boot monitor before the kernel starts.
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*/
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#include "../../kernel.h" /* configures the kernel */
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/* sections */
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#include <sys/vm_i386.h>
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#ifdef __ACK__
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.text
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begtext:
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#ifdef __ACK__
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.rom
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#else
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.data
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#endif
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begrom:
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.data
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begdata:
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.bss
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begbss:
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#endif
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#include <minix/config.h>
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#include <minix/const.h>
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#include <minix/com.h>
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#include <ibm/interrupt.h>
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#include <archconst.h>
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#include "../../const.h"
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#include "../../proc.h"
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#include "sconst.h"
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/* Selected 386 tss offsets. */
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#define TSS3_S_SP0 4
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/*
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* Exported functions
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* Note: in assembly language the .define statement applied to a function name
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* is loosely equivalent to a prototype in C code -- it makes it possible to
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* link to an entity declared in the assembly code but does not create
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* the entity.
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*/
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.globl restart
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.globl reload_cr3
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.globl divide_error
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.globl single_step_exception
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.globl nmi
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.globl breakpoint_exception
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.globl overflow
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.globl bounds_check
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.globl inval_opcode
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.globl copr_not_available
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.globl double_fault
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.globl copr_seg_overrun
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.globl inval_tss
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.globl segment_not_present
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.globl stack_exception
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.globl general_protection
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.globl page_fault
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.globl copr_error
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.globl alignment_check
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.globl machine_check
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.globl simd_exception
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.globl params_size
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.globl params_offset
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.globl mon_ds
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.globl schedcheck
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.globl dirtypde
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.globl lazy_fpu
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.globl hwint00 /* handlers for hardware interrupts */
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.globl hwint01
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.globl hwint02
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.globl hwint03
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.globl hwint04
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.globl hwint05
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.globl hwint06
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.globl hwint07
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.globl hwint08
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.globl hwint09
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.globl hwint10
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.globl hwint11
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.globl hwint12
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.globl hwint13
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.globl hwint14
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.globl hwint15
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/* Exported variables. */
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.globl begbss
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.globl begdata
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.text
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/*===========================================================================*/
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/* MINIX */
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/*===========================================================================*/
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.global MINIX
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MINIX:
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/* this is the entry point for the MINIX kernel */
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jmp over_flags /* skip over the next few bytes */
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.short CLICK_SHIFT /* for the monitor: memory granularity */
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flags:
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/* boot monitor flags:
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* call in 386 mode, make bss, make stack,
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* load high, don't patch, will return,
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* uses generic INT, memory vector,
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* new boot code return
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*/
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.short 0x01FD
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nop /* extra byte to sync up disassembler */
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over_flags:
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/* Set up a C stack frame on the monitor stack. (The monitor sets cs and ds */
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/* right. The ss descriptor still references the monitor data segment.) */
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movzwl %sp, %esp /* monitor stack is a 16 bit stack */
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push %ebp
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mov %esp, %ebp
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push %esi
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push %edi
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cmp $0, 4(%ebp) /* monitor return vector is */
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je noret /* nonzero if return possible */
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incl mon_return
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noret:
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movl %esp, mon_sp /* save stack pointer for later return */
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/* Copy the monitor global descriptor table to the address space of kernel and */
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/* switch over to it. Prot_init() can then update it with immediate effect. */
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sgdt gdt+GDT_SELECTOR /* get the monitor gdtr */
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movl gdt+GDT_SELECTOR+2, %esi /* absolute address of GDT */
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mov $gdt, %ebx /* address of kernel GDT */
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mov $8*8, %ecx /* copying eight descriptors */
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copygdt:
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movb %es:(%esi), %al
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movb %al, (%ebx)
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inc %esi
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inc %ebx
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loop copygdt
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movl gdt+DS_SELECTOR+2, %eax /* base of kernel data */
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and $0x00FFFFFF, %eax /* only 24 bits */
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add $gdt, %eax /* eax = vir2phys(gdt) */
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movl %eax, gdt+GDT_SELECTOR+2 /* set base of GDT */
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lgdt gdt+GDT_SELECTOR /* switch over to kernel GDT */
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/* Locate boot parameters, set up kernel segment registers and stack. */
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mov 8(%ebp), %ebx /* boot parameters offset */
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mov 12(%ebp), %edx /* boot parameters length */
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mov 16(%ebp), %eax /* address of a.out headers */
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movl %eax, aout
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mov %ds, %ax /* kernel data */
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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mov %ax, %ss
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mov $k_boot_stktop, %esp /* set sp to point to the top of kernel stack */
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/* Save boot parameters into these global variables for i386 code */
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movl %edx, params_size
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movl %ebx, params_offset
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movl $SS_SELECTOR, mon_ds
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/* Call C startup code to set up a proper environment to run main(). */
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push %edx
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push %ebx
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push $SS_SELECTOR
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push $DS_SELECTOR
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push $CS_SELECTOR
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call cstart /* cstart(cs, ds, mds, parmoff, parmlen) */
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add $5*4, %esp
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/* Reload gdtr, idtr and the segment registers to global descriptor table set */
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/* up by prot_init(). */
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lgdt gdt+GDT_SELECTOR
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lidt gdt+IDT_SELECTOR
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ljmp $CS_SELECTOR, $csinit
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csinit:
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movw $DS_SELECTOR, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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mov %ax, %ss
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movw $TSS_SELECTOR, %ax /* no other TSS is used */
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ltr %ax
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push $0 /* set flags to known good state */
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popf /* esp, clear nested task and int enable */
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jmp main /* main() */
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/*===========================================================================*/
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/* interrupt handlers */
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/* interrupt handlers for 386 32-bit protected mode */
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/*===========================================================================*/
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#define PIC_IRQ_HANDLER(irq) \
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push $irq ;\
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call irq_handle /* intr_handle(irq_handlers[irq]) */ ;\
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add $4, %esp ;
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/*===========================================================================*/
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/* hwint00 - 07 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_master(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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call cycles_accounting_stop ;\
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add $4, %esp ;\
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movl $0, %ebp /* for stack trace */ ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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jmp restart ;\
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\
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0: \
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pusha ;\
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call cycles_accounting_stop_idle ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_master macro */
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.balign 16
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hwint00:
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/* Interrupt routine for irq 0 (the clock). */
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hwint_master(0)
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.balign 16
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hwint01:
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/* Interrupt routine for irq 1 (keyboard) */
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hwint_master(1)
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.balign 16
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hwint02:
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/* Interrupt routine for irq 2 (cascade!) */
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hwint_master(2)
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.balign 16
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hwint03:
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/* Interrupt routine for irq 3 (second serial) */
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hwint_master(3)
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.balign 16
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hwint04:
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/* Interrupt routine for irq 4 (first serial) */
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hwint_master(4)
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.balign 16
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hwint05:
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/* Interrupt routine for irq 5 (XT winchester) */
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hwint_master(5)
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.balign 16
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hwint06:
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/* Interrupt routine for irq 6 (floppy) */
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hwint_master(6)
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.balign 16
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hwint07:
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/* Interrupt routine for irq 7 (printer) */
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hwint_master(7)
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/*===========================================================================*/
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/* hwint08 - 15 */
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/*===========================================================================*/
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_slave(irq) \
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TEST_INT_IN_KERNEL(4, 0f) ;\
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\
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SAVE_PROCESS_CTX(0) ;\
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push %ebp ;\
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call cycles_accounting_stop ;\
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add $4, %esp ;\
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movl $0, %ebp /* for stack trace */ ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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jmp restart ;\
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\
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0: \
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pusha ;\
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call cycles_accounting_stop_idle ;\
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PIC_IRQ_HANDLER(irq) ;\
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movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable interrupts in master pic */ ;\
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outb $INT2_CTL /* reenable slave 8259 */ ;\
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popa ;\
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iret ;
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/* Each of these entry points is an expansion of the hwint_slave macro */
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.balign 16
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hwint08:
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/* Interrupt routine for irq 8 (realtime clock) */
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hwint_slave(8)
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.balign 16
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hwint09:
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/* Interrupt routine for irq 9 (irq 2 redirected) */
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hwint_slave(9)
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.balign 16
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hwint10:
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/* Interrupt routine for irq 10 */
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hwint_slave(10)
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.balign 16
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hwint11:
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/* Interrupt routine for irq 11 */
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hwint_slave(11)
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.balign 16
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hwint12:
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/* Interrupt routine for irq 12 */
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hwint_slave(12)
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.balign 16
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hwint13:
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/* Interrupt routine for irq 13 (FPU exception) */
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hwint_slave(13)
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.balign 16
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hwint14:
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/* Interrupt routine for irq 14 (AT winchester) */
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hwint_slave(14)
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.balign 16
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hwint15:
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/* Interrupt routine for irq 15 */
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hwint_slave(15)
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/*
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* IPC is only from a process to kernel
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*/
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.balign 16
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.globl ipc_entry
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ipc_entry:
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %edx
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push %ebx
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push %eax
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push %ecx
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/* stop user process cycles */
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push %ebp
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call cycles_accounting_stop
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add $4, %esp
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/* for stack trace */
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movl $0, %ebp
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call do_ipc
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/* restore the current process pointer and save the return value */
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add $4 * 4, %esp
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pop %esi
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mov %eax, AXREG(%esi)
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jmp restart
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/*
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* kernel call is only from a process to kernel
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*/
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.balign 16
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.globl kernel_call_entry
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kernel_call_entry:
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SAVE_PROCESS_CTX(0)
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/* save the pointer to the current process */
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push %ebp
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/*
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* pass the syscall arguments from userspace to the handler.
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* SAVE_PROCESS_CTX() does not clobber these registers, they are still
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* set as the userspace have set them
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*/
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push %eax
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/* stop user process cycles */
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push %ebp
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call cycles_accounting_stop
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add $4, %esp
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/* for stack trace */
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movl $0, %ebp
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call kernel_call
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/* restore the current process pointer and save the return value */
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add $8, %esp
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jmp restart
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.balign 16
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/*
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* called by the exception interrupt vectors. If the exception does not push
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* errorcode, we assume that the vector handler pushed 0 instead. Next pushed
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* thing is the vector number. From this point on we can continue as if every
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* exception pushes an error code
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*/
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exception_entry:
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/*
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* check if it is a nested trap by comparing the saved code segment
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* descriptor with the kernel CS first
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*/
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TEST_INT_IN_KERNEL(12, exception_entry_nested)
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exception_entry_from_user:
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cld
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SAVE_PROCESS_CTX(8)
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/* stop user process cycles */
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push %ebp
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call cycles_accounting_stop
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add $4, %esp
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/* for stack trace clear %ebp */
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movl $0, %ebp
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/*
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* push a pointer to the interrupt state pushed by the cpu and the
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* vector number pushed by the vector handler just before calling
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* exception_entry and call the exception handler.
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*/
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push %esp
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push $0 /* it's not a nested exception */
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call exception_handler
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jmp restart
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exception_entry_nested:
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pusha
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mov %esp, %eax
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add $(8 * 4), %eax
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push %eax
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pushl $1 /* it's a nested exception */
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call exception_handler
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add $8, %esp
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popa
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/* clear the error code and the exception number */
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add $8, %esp
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/* resume execution at the point of exception */
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iret
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/*===========================================================================*/
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/* restart */
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/*===========================================================================*/
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restart:
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call schedcheck
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/* %eax is set by schedcheck() to the process to run */
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mov %eax, %ebp /* will assume P_STACKBASE == 0 */
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/* reconstruct the stack for iret */
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movl SSREG(%ebp), %eax
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push %eax
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movl SPREG(%ebp), %eax
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push %eax
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movl PSWREG(%ebp), %eax
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push %eax
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movl CSREG(%ebp), %eax
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push %eax
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movl PCREG(%ebp), %eax
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push %eax
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RESTORE_GP_REGS(%ebp)
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RESTORE_SEGS(%ebp)
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movl %ss:BPREG(%ebp), %ebp
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iret /* continue process */
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/*===========================================================================*/
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/* exception handlers */
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/*===========================================================================*/
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#define EXCEPTION_ERR_CODE(vector) \
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push $vector ;\
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|
jmp exception_entry
|
|
|
|
#define EXCEPTION_NO_ERR_CODE(vector) \
|
|
pushl $0 ;\
|
|
EXCEPTION_ERR_CODE(vector)
|
|
|
|
divide_error:
|
|
EXCEPTION_NO_ERR_CODE(DIVIDE_VECTOR)
|
|
|
|
single_step_exception:
|
|
EXCEPTION_NO_ERR_CODE(DEBUG_VECTOR)
|
|
|
|
nmi:
|
|
#ifndef CONFIG_WATCHDOG
|
|
EXCEPTION_NO_ERR_CODE(NMI_VECTOR)
|
|
#else
|
|
/*
|
|
* We have to be very careful as this interrupt can occur anytime. On
|
|
* the other hand, if it interrupts a user process, we will resume the
|
|
* same process which makes things a little simpler. We know that we are
|
|
* already on kernel stack whenever it happened and we can be
|
|
* conservative and save everything as we don't need to be extremely
|
|
* efficient as the interrupt is infrequent and some overhead is already
|
|
* expected.
|
|
*/
|
|
|
|
/*
|
|
* save the important registers. We don't save %cs and %ss and they are
|
|
* saved and restored by CPU
|
|
*/
|
|
pushw %ds
|
|
pushw %es
|
|
pushw %fs
|
|
pushw %gs
|
|
pusha
|
|
|
|
/*
|
|
* We cannot be sure about the state of the kernel segment register,
|
|
* however, we always set %ds and %es to the same as %ss
|
|
*/
|
|
mov %ss, %si
|
|
mov %si, %ds
|
|
mov %si, %es
|
|
|
|
push %esp
|
|
call nmi_watchdog_handler
|
|
add $4, %esp
|
|
|
|
/* restore all the important registers as they were before the trap */
|
|
popa
|
|
popw %gs
|
|
popw %fs
|
|
popw %es
|
|
popw %ds
|
|
|
|
iret
|
|
#endif
|
|
|
|
breakpoint_exception:
|
|
EXCEPTION_NO_ERR_CODE(BREAKPOINT_VECTOR)
|
|
|
|
overflow:
|
|
EXCEPTION_NO_ERR_CODE(OVERFLOW_VECTOR)
|
|
|
|
bounds_check:
|
|
EXCEPTION_NO_ERR_CODE(BOUNDS_VECTOR)
|
|
|
|
inval_opcode:
|
|
EXCEPTION_NO_ERR_CODE(INVAL_OP_VECTOR)
|
|
|
|
copr_not_available:
|
|
TEST_INT_IN_KERNEL(4, copr_not_available_in_kernel)
|
|
clts
|
|
cld /* set direction flag to a known value */
|
|
SAVE_PROCESS_CTX_NON_LAZY(0)
|
|
lea P_MISC_FLAGS(%ebp), %ebx
|
|
movw (%ebx), %cx
|
|
and $MF_FPU_INITIALIZED, %cx
|
|
jnz 0f /* jump if FPU is already initialized */
|
|
orw $MF_FPU_INITIALIZED, (%ebx)
|
|
fninit
|
|
/* stop user process cycles */
|
|
push %ebp
|
|
call cycles_accounting_stop
|
|
add $4, %esp
|
|
jmp copr_return
|
|
0: /* load FPU context for current process */
|
|
mov %ss:FP_SAVE_AREA_P(%ebp), %eax
|
|
cmp $0, osfxsr_feature
|
|
jz fp_l_no_fxsr /* FXSR is not avaible. */
|
|
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fxrstor (%eax)
|
|
jmp copr_return
|
|
fp_l_no_fxsr:
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
frstor (%eax)
|
|
copr_return:
|
|
orw $MF_USED_FPU, (%ebx) /* fpu was used during last execution */
|
|
jmp restart
|
|
|
|
copr_not_available_in_kernel:
|
|
movl $NO_NUM, 4(%esp)
|
|
movl $0, (%esp)
|
|
call minix_panic
|
|
|
|
double_fault:
|
|
EXCEPTION_ERR_CODE(DOUBLE_FAULT_VECTOR)
|
|
|
|
copr_seg_overrun:
|
|
EXCEPTION_NO_ERR_CODE(COPROC_SEG_VECTOR)
|
|
|
|
inval_tss:
|
|
EXCEPTION_ERR_CODE(INVAL_TSS_VECTOR)
|
|
|
|
segment_not_present:
|
|
EXCEPTION_ERR_CODE(SEG_NOT_VECTOR)
|
|
|
|
stack_exception:
|
|
EXCEPTION_ERR_CODE(STACK_FAULT_VECTOR)
|
|
|
|
general_protection:
|
|
EXCEPTION_ERR_CODE(PROTECTION_VECTOR)
|
|
|
|
page_fault:
|
|
EXCEPTION_ERR_CODE(PAGE_FAULT_VECTOR)
|
|
|
|
copr_error:
|
|
EXCEPTION_NO_ERR_CODE(COPROC_ERR_VECTOR)
|
|
|
|
alignment_check:
|
|
EXCEPTION_NO_ERR_CODE(ALIGNMENT_CHECK_VECTOR)
|
|
|
|
machine_check:
|
|
EXCEPTION_NO_ERR_CODE(MACHINE_CHECK_VECTOR)
|
|
|
|
simd_exception:
|
|
EXCEPTION_NO_ERR_CODE(SIMD_EXCEPTION_VECTOR)
|
|
|
|
/*===========================================================================*/
|
|
/* lazy_fpu */
|
|
/*===========================================================================*/
|
|
/* void lazy_fpu(struct proc *pptr)
|
|
* It's called, when we are on kernel stack.
|
|
* Actualy lazy code is just few lines, which check MF_USED_FPU,
|
|
* another part is save_init_fpu().
|
|
*/
|
|
lazy_fpu:
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
push %eax
|
|
push %ebx
|
|
push %ecx
|
|
cmp $0, fpu_presence /* Do we have FPU? */
|
|
jz no_fpu_available
|
|
mov 8(%ebp), %eax /* Get pptr */
|
|
lea P_MISC_FLAGS(%eax), %ebx
|
|
movw (%ebx), %cx
|
|
and $MF_USED_FPU, %cx
|
|
jz 0f /* Don't save FPU */
|
|
mov %ss:FP_SAVE_AREA_P(%eax), %eax
|
|
cmp $0, osfxsr_feature
|
|
jz fp_s_no_fxsr /* FXSR is not avaible. */
|
|
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fxsave (%eax)
|
|
fninit
|
|
jmp fp_saved
|
|
fp_s_no_fxsr:
|
|
/* DO NOT CHANGE THE OPERAND!!! gas2ack does not handle it yet */
|
|
fnsave (%eax)
|
|
fwait /* required for compatibility with processors prior pentium */
|
|
fp_saved:
|
|
andw $~MF_USED_FPU, (%ebx)
|
|
0: mov %cr0, %eax
|
|
or $0x00000008, %eax /* Set TS flag */
|
|
mov %eax, %cr0
|
|
no_fpu_available:
|
|
pop %ecx
|
|
pop %ebx
|
|
pop %eax
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* reload_cr3 */
|
|
/*===========================================================================*/
|
|
/* PUBLIC void reload_cr3(void); */
|
|
reload_cr3:
|
|
push %ebp
|
|
mov %esp, %ebp
|
|
movl $0, dirtypde
|
|
mov %cr3, %eax
|
|
mov %eax, %cr3
|
|
pop %ebp
|
|
ret
|
|
|
|
/*===========================================================================*/
|
|
/* data */
|
|
/*===========================================================================*/
|
|
|
|
#ifdef __ACK__
|
|
.rom /* Before the string table please */
|
|
#else
|
|
.data
|
|
#endif
|
|
.short 0x526F /* this must be the first data entry (magic #) */
|
|
|
|
.bss
|
|
/*
|
|
* this stack is used temporarily for booting only. We switch to a proper kernel
|
|
* stack after the first trap to kernel
|
|
*/
|
|
.globl k_boot_stktop
|
|
k_boot_stack:
|
|
.space 4096 /* kernel stack */ /* FIXME use macro here */
|
|
k_boot_stktop: /* top of kernel stack */
|