50e2064049
This commit removes all traces of Minix segments (the text/data/stack
memory map abstraction in the kernel) and significance of Intel segments
(hardware segments like CS, DS that add offsets to all addressing before
page table translation). This ultimately simplifies the memory layout
and addressing and makes the same layout possible on non-Intel
architectures.
There are only two types of addresses in the world now: virtual
and physical; even the kernel and processes have the same virtual
address space. Kernel and user processes can be distinguished at a
glance as processes won't use 0xF0000000 and above.
No static pre-allocated memory sizes exist any more.
Changes to booting:
. The pre_init.c leaves the kernel and modules exactly as
they were left by the bootloader in physical memory
. The kernel starts running using physical addressing,
loaded at a fixed location given in its linker script by the
bootloader. All code and data in this phase are linked to
this fixed low location.
. It makes a bootstrap pagetable to map itself to a
fixed high location (also in linker script) and jumps to
the high address. All code and data then use this high addressing.
. All code/data symbols linked at the low addresses is prefixed by
an objcopy step with __k_unpaged_*, so that that code cannot
reference highly-linked symbols (which aren't valid yet) or vice
versa (symbols that aren't valid any more).
. The two addressing modes are separated in the linker script by
collecting the unpaged_*.o objects and linking them with low
addresses, and linking the rest high. Some objects are linked
twice, once low and once high.
. The bootstrap phase passes a lot of information (e.g. free memory
list, physical location of the modules, etc.) using the kinfo
struct.
. After this bootstrap the low-linked part is freed.
. The kernel maps in VM into the bootstrap page table so that VM can
begin executing. Its first job is to make page tables for all other
boot processes. So VM runs before RS, and RS gets a fully dynamic,
VM-managed address space. VM gets its privilege info from RS as usual
but that happens after RS starts running.
. Both the kernel loading VM and VM organizing boot processes happen
using the libexec logic. This removes the last reason for VM to
still know much about exec() and vm/exec.c is gone.
Further Implementation:
. All segments are based at 0 and have a 4 GB limit.
. The kernel is mapped in at the top of the virtual address
space so as not to constrain the user processes.
. Processes do not use segments from the LDT at all; there are
no segments in the LDT any more, so no LLDT is needed.
. The Minix segments T/D/S are gone and so none of the
user-space or in-kernel copy functions use them. The copy
functions use a process endpoint of NONE to realize it's
a physical address, virtual otherwise.
. The umap call only makes sense to translate a virtual address
to a physical address now.
. Segments-related calls like newmap and alloc_segments are gone.
. All segments-related translation in VM is gone (vir2map etc).
. Initialization in VM is simpler as no moving around is necessary.
. VM and all other boot processes can be linked wherever they wish
and will be mapped in at the right location by the kernel and VM
respectively.
Other changes:
. The multiboot code is less special: it does not use mb_print
for its diagnostics any more but uses printf() as normal, saving
the output into the diagnostics buffer, only printing to the
screen using the direct print functions if a panic() occurs.
. The multiboot code uses the flexible 'free memory map list'
style to receive the list of free memory if available.
. The kernel determines the memory layout of the processes to
a degree: it tells VM where the kernel starts and ends and
where the kernel wants the top of the process to be. VM then
uses this entire range, i.e. the stack is right at the top,
and mmap()ped bits of memory are placed below that downwards,
and the break grows upwards.
Other Consequences:
. Every process gets its own page table as address spaces
can't be separated any more by segments.
. As all segments are 0-based, there is no distinction between
virtual and linear addresses, nor between userspace and
kernel addresses.
. Less work is done when context switching, leading to a net
performance increase. (8% faster on my machine for 'make servers'.)
. The layout and configuration of the GDT makes sysenter and syscall
possible.
154 lines
3.7 KiB
C
154 lines
3.7 KiB
C
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#include "kernel/kernel.h"
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#include <unistd.h>
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#include <ctype.h>
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#include <string.h>
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#include <machine/cmos.h>
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#include <machine/bios.h>
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#include <machine/cpu.h>
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#include <minix/portio.h>
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#include <minix/cpufeature.h>
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#include <assert.h>
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#include <signal.h>
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#include <machine/vm.h>
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#include <minix/u64.h>
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#include "archconst.h"
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#include "arch_proto.h"
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#include "serial.h"
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#include "oxpcie.h"
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#include "kernel/proc.h"
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#include "kernel/debug.h"
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#include "direct_utils.h"
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#include <machine/multiboot.h>
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#define KBCMDP 4 /* kbd controller port (O) */
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#define KBC_PULSE0 0xfe /* pulse output bit 0 */
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#define IO_KBD 0x060 /* 8042 Keyboard */
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int cpu_has_tsc;
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void
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reset(void)
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{
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uint8_t b;
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/*
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* The keyboard controller has 4 random output pins, one of which is
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* connected to the RESET pin on the CPU in many PCs. We tell the
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* keyboard controller to pulse this line a couple of times.
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*/
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outb(IO_KBD + KBCMDP, KBC_PULSE0);
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busy_delay_ms(100);
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outb(IO_KBD + KBCMDP, KBC_PULSE0);
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busy_delay_ms(100);
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/*
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* Attempt to force a reset via the Reset Control register at
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* I/O port 0xcf9. Bit 2 forces a system reset when it
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* transitions from 0 to 1. Bit 1 selects the type of reset
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* to attempt: 0 selects a "soft" reset, and 1 selects a
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* "hard" reset. We try a "hard" reset. The first write sets
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* bit 1 to select a "hard" reset and clears bit 2. The
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* second write forces a 0 -> 1 transition in bit 2 to trigger
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* a reset.
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*/
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outb(0xcf9, 0x2);
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outb(0xcf9, 0x6);
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busy_delay_ms(500); /* wait 0.5 sec to see if that did it */
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/*
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* Attempt to force a reset via the Fast A20 and Init register
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* at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
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* Bit 0 asserts INIT# when set to 1. We are careful to only
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* preserve bit 1 while setting bit 0. We also must clear bit
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* 0 before setting it if it isn't already clear.
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*/
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b = inb(0x92);
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if (b != 0xff) {
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if ((b & 0x1) != 0)
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outb(0x92, b & 0xfe);
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outb(0x92, b | 0x1);
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busy_delay_ms(500); /* wait 0.5 sec to see if that did it */
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}
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/* Triple fault */
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x86_triplefault();
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/* Give up on resetting */
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while(1) {
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;
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}
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}
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__dead void arch_shutdown(int how)
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{
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unsigned char unused_ch;
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/* Mask all interrupts, including the clock. */
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outb( INT_CTLMASK, ~0);
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/* Empty buffer */
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while(direct_read_char(&unused_ch))
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;
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if(kinfo.minix_panicing) {
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/* Printing is done synchronously over serial. */
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if (kinfo.do_serial_debug)
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reset();
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/* Print accumulated diagnostics buffer and reset. */
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direct_cls();
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direct_print("Minix panic. System diagnostics buffer:\n\n");
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direct_print(kmess.kmess_buf);
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direct_print("\nSystem has panicked, press any key to reboot");
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while (!direct_read_char(&unused_ch))
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;
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reset();
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}
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if (how == RBT_DEFAULT) {
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how = RBT_RESET;
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}
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switch (how) {
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case RBT_HALT:
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/* Stop */
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for (; ; ) halt_cpu();
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NOT_REACHABLE;
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default:
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case RBT_REBOOT:
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case RBT_RESET:
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/* Reset the system by forcing a processor shutdown.
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* First stop the BIOS memory test by setting a soft
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* reset flag.
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*/
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reset();
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NOT_REACHABLE;
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}
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NOT_REACHABLE;
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}
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#ifdef DEBUG_SERIAL
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void ser_putc(char c)
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{
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int i;
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int lsr, thr;
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#if CONFIG_OXPCIE
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oxpcie_putc(c);
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#else
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lsr= COM1_LSR;
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thr= COM1_THR;
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for (i= 0; i<100000; i++)
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{
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if (inb( lsr) & LSR_THRE)
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break;
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}
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outb( thr, c);
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#endif
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}
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#endif
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