b1c4ba4ab6
Due to the ABI we are using we have to use the earm architecture moniker for the build system to behave correctly. This involves then some headers to move around. There is also a few related Makefile updates as well as minor source code corrections.
21 lines
519 B
C
21 lines
519 B
C
#include <sys/types.h>
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void
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read_tsc(u32_t *hi, u32_t *lo)
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{
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/* Read Clock Cycle Counter (CCNT). Intel calls it Time Stamp Counter (TSC) */
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u32_t ccnt;
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/* Get value from the Performance Monitors Cycle Counter Register.
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* See ARM Architecture Reference Manual B5.1.113.
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*/
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asm volatile ("MRC p15, 0, %0, c9, c13, 0\t\n" : "=r" (ccnt) : : "%0");
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/* The ARMv7-A clock cycle counter is only 32-bits, but read_tsc is
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* expected to return a 64-bit value. hi is therefore always 0.
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*/
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*hi = 0;
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*lo = ccnt;
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}
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