62c666566e
- kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system
50 lines
787 B
Makefile
50 lines
787 B
Makefile
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# Makefile for arch-dependent kernel code
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.include <bsd.own.mk>
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.PATH: ${.CURDIR}/arch/${ARCH}
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SRCS+= arch_do_vmctl.c \
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breakpoints.c \
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arch_clock.c \
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debugreg.S \
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do_int86.c \
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do_iopenable.c \
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do_readbios.c \
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do_sdevio.c \
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exception.c \
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i8259.c \
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io_inb.S \
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io_inl.S \
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io_intr.S \
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io_inw.S \
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io_outb.S \
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io_outl.S \
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io_outw.S \
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klib.S \
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klib16.S \
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multiboot.S \
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memory.c \
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oxpcie.c \
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protect.c \
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arch_system.c \
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apic.c \
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apic_asm.S \
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arch_watchdog.c \
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pre_init.c \
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acpi.c
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.ifdef CONFIG_SMP
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SRCS += arch_smp.c trampoline.S
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.endif
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.if ${COMPILER_TYPE} == "ack"
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I86CPPFLAGS = -mi86
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I86LDFLAGS = -mi86
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CPPFLAGS.klib16.S = ${I86CPPFLAGS}
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LDFLAGS.klib16.S = ${I86LDFLAGS}
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CPPFLAGS.trampoline.S = ${I86CPPFLAGS}
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LDFLAGS.trampoline.S = ${I86LDFLAGS}
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.endif
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