f6aac1c3b5
Moving include/sys NetBSD headers to /sys/sys Moving include/arch/*/ NetBSD headers to /sys/arch/*/include Change-Id: Ia1a45d4e83ab806c84093ec2b61bdbea9bed65a0
107 lines
3.4 KiB
C
107 lines
3.4 KiB
C
/* $NetBSD: mutex.h,v 1.13 2012/09/25 05:24:00 matt Exp $ */
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/*-
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* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe and Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM_MUTEX_H_
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#define _ARM_MUTEX_H_
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/*
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* The ARM mutex implementation is troublesome, because pre-v6 ARM lacks a
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* compare-and-swap operation. However, there aren't any MP pre-v6 ARM
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* systems to speak of. We are mostly concerned with atomicity with respect
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* to interrupts.
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*
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* ARMv6, however, does have ldrex/strex, and can thus implement an MP-safe
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* compare-and-swap.
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*
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* So, what we have done is impement simple mutexes using a compare-and-swap.
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* We support pre-ARMv6 by implementing CAS as a restartable atomic sequence
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* that is checked by the IRQ vector. MP-safe ARMv6 support will be added later.
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*/
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#ifndef __MUTEX_PRIVATE
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struct kmutex {
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uintptr_t mtx_pad1;
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};
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#else /* __MUTEX_PRIVATE */
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struct kmutex {
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union {
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/* Adaptive mutex */
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volatile uintptr_t mtxa_owner; /* 0-3 */
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/* Spin mutex */
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struct {
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/*
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* Since the low bit of mtax_owner is used to flag this
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* mutex as a spin mutex, we can't use the first byte
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* or the last byte to store the ipl or lock values.
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*/
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volatile uint8_t mtxs_dummy;
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ipl_cookie_t mtxs_ipl;
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__cpu_simple_lock_t mtxs_lock;
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volatile uint8_t mtxs_unused;
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} s;
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} u;
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};
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#define mtx_owner u.mtxa_owner
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#define mtx_ipl u.s.mtxs_ipl
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#define mtx_lock u.s.mtxs_lock
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#if 0
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#define __HAVE_MUTEX_STUBS 1
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#define __HAVE_SPIN_MUTEX_STUBS 1
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#endif
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#define __HAVE_SIMPLE_MUTEXES 1
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/*
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* MUTEX_RECEIVE: no memory barrier required; we're synchronizing against
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* interrupts, not multiple processors.
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*/
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#define MUTEX_RECEIVE(mtx) /* nothing */
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/*
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* MUTEX_GIVE: no memory barrier required; same reason.
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*/
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#define MUTEX_GIVE(mtx) /* nothing */
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#define MUTEX_CAS(p, o, n) \
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(atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
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#ifdef MULTIPROCESSOR
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#define MUTEX_SMT_PAUSE() __asm __volatile("wfe")
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#define MUTEX_SMT_WAKE() __asm __volatile("sev")
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#endif
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#endif /* __MUTEX_PRIVATE */
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#endif /* _ARM_MUTEX_H_ */
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