80d671aea7
- the prototype changes to _cpuid(u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx) - this makes possible to use all the features of the cpuid instruction as described in the Intel specs
69 lines
1.5 KiB
C
69 lines
1.5 KiB
C
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#include <stdint.h>
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#include <minix/minlib.h>
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#include <minix/cpufeature.h>
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#include <sys/vm_i386.h>
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int _cpufeature(int cpufeature)
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{
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u32_t eax, ebx, ecx, edx;
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int proc;
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eax = ebx = ecx = edx = 0;
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proc = getprocessor();
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/* If processor supports CPUID and its CPUID supports enough
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* parameters, retrieve EDX feature flags to test against.
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*/
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if(proc >= 586) {
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eax = 0;
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_cpuid(&eax, &ebx, &ecx, &edx);
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if(eax > 0) {
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eax = 1;
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_cpuid(&eax, &ebx, &ecx, &edx);
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}
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}
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switch(cpufeature) {
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case _CPUF_I386_PSE:
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return edx & CPUID1_EDX_PSE;
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case _CPUF_I386_PGE:
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return edx & CPUID1_EDX_PGE;
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case _CPUF_I386_APIC_ON_CHIP:
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return edx & CPUID1_EDX_APIC_ON_CHIP;
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case _CPUF_I386_TSC:
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return edx & CPUID1_EDX_TSC;
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case _CPUF_I386_FPU:
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return edx & CPUID1_EDX_FPU;
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case _CPUF_I386_SSEx:
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return (edx & (CPUID1_EDX_FXSR |
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CPUID1_EDX_SSE |
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CPUID1_EDX_SSE2)) &&
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(ecx & (CPUID1_ECX_SSE3 |
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CPUID1_ECX_SSSE3 |
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CPUID1_ECX_SSE4_1 |
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CPUID1_ECX_SSE4_2));
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case _CPUF_I386_FXSR:
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return edx & CPUID1_EDX_FXSR;
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case _CPUF_I386_SSE:
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return edx & CPUID1_EDX_SSE;
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case _CPUF_I386_SSE2:
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return edx & CPUID1_EDX_SSE2;
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case _CPUF_I386_SSE3:
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return ecx & CPUID1_ECX_SSE3;
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case _CPUF_I386_SSSE3:
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return ecx & CPUID1_ECX_SSSE3;
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case _CPUF_I386_SSE4_1:
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return ecx & CPUID1_ECX_SSE4_1;
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case _CPUF_I386_SSE4_2:
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return ecx & CPUID1_ECX_SSE4_2;
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case _CPUF_I386_HTT:
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return edx & CPUID1_EDX_HTT;
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case _CPUF_I386_HTT_MAX_NUM:
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return (ebx >> 16) & 0xff;
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}
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return 0;
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}
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