166 lines
5 KiB
C
166 lines
5 KiB
C
/* $NetBSD: mcontext.h,v 1.11 2012/08/03 07:59:23 matt Exp $ */
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/*-
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* Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Klaus Klein and by Jason R. Thorpe of Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM_MCONTEXT_H_
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#define _ARM_MCONTEXT_H_
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/*
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* General register state
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*/
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#define _NGREG 17
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typedef unsigned int __greg_t;
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typedef __greg_t __gregset_t[_NGREG];
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#define _REG_R0 0
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#define _REG_R1 1
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#define _REG_R2 2
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#define _REG_R3 3
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#define _REG_R4 4
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#define _REG_R5 5
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#define _REG_R6 6
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#define _REG_R7 7
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#define _REG_R8 8
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#define _REG_R9 9
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#define _REG_R10 10
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#define _REG_R11 11
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#define _REG_R12 12
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#define _REG_R13 13
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#define _REG_R14 14
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#define _REG_R15 15
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#define _REG_CPSR 16
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/* Convenience synonyms */
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#define _REG_FP _REG_R11
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#define _REG_SP _REG_R13
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#define _REG_LR _REG_R14
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#define _REG_PC _REG_R15
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/*
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* Floating point register state
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*/
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/* Note: the storage layout of this structure must be identical to ARMFPE! */
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typedef struct {
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unsigned int __fp_fpsr;
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struct {
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unsigned int __fp_exponent;
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unsigned int __fp_mantissa_hi;
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unsigned int __fp_mantissa_lo;
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} __fp_fr[8];
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} __fpregset_t;
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typedef struct {
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unsigned int __vfp_fpscr;
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unsigned int __vfp_fstmx[33];
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unsigned int __vfp_fpsid;
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} __vfpregset_t;
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typedef struct {
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__gregset_t __gregs;
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union {
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__fpregset_t __fpregs;
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__vfpregset_t __vfpregs;
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} __fpu;
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__greg_t _mc_tlsbase;
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#ifdef __minix
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int mc_flags;
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int mc_magic;
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#endif
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} mcontext_t, mcontext32_t;
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/* Machine-dependent uc_flags */
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#define _UC_ARM_VFP 0x00010000 /* FPU field is VFP */
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/* used by signal delivery to indicate status of signal stack */
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#define _UC_SETSTACK 0x00020000
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#define _UC_CLRSTACK 0x00040000
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#define _UC_TLSBASE 0x00080000
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#define _UC_MACHINE_PAD 2 /* Padding appended to ucontext_t */
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#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP])
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#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
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#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R0])
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#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
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#ifdef __minix
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#define _UC_MACHINE_STACK(uc) ((uc)->uc_mcontext.__gregs[_REG_SP])
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#define _UC_MACHINE_SET_STACK(uc, sp) _UC_MACHINE_STACK(uc) = (sp)
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#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_FP])
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#define _UC_MACHINE_SET_FP(uc, fp) _UC_MACHINE_FP(uc) = (fp)
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#define _UC_MACHINE_LR(uc) ((uc)->uc_mcontext.__gregs[_REG_LR])
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#define _UC_MACHINE_SET_LR(uc, lr) _UC_MACHINE_LR(uc) = (lr)
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#define _UC_MACHINE_R0(uc) ((uc)->uc_mcontext.__gregs[_REG_R0])
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#define _UC_MACHINE_SET_R0(uc, setreg) _UC_MACHINE_R0(uc) = (setreg)
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#define _UC_MACHINE_R1(uc) ((uc)->uc_mcontext.__gregs[_REG_R1])
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#define _UC_MACHINE_SET_R1(uc, setreg) _UC_MACHINE_R1(uc) = (setreg)
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#define _UC_MACHINE_R2(uc) ((uc)->uc_mcontext.__gregs[_REG_R2])
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#define _UC_MACHINE_SET_R2(uc, setreg) _UC_MACHINE_R2(uc) = (setreg)
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#define _UC_MACHINE_R3(uc) ((uc)->uc_mcontext.__gregs[_REG_R3])
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#define _UC_MACHINE_SET_R3(uc, setreg) _UC_MACHINE_R3(uc) = (setreg)
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#define _UC_MACHINE_R4(uc) ((uc)->uc_mcontext.__gregs[_REG_R4])
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#define _UC_MACHINE_SET_R4(uc, setreg) _UC_MACHINE_R4(uc) = (setreg)
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#endif
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#define __UCONTEXT_SIZE 256
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static __inline void *
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__lwp_getprivate_fast(void)
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{
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extern void *_lwp_getprivate(void);
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void *rv;
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__asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv));
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if (__predict_true(rv))
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return rv;
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/*
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* Some ARM cores are broken and don't raise an undefined fault when an
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* unrecogized mrc instruction is encountered, but just return zero.
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* To do deal with that, if we get a zero we (re-)fetch the value using
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* syscall.
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*/
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return _lwp_getprivate();
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}
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#ifdef __minix
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int setmcontext(const mcontext_t *mcp);
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int getmcontext(mcontext_t *mcp);
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#define MCF_MAGIC 0xc0ffee
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#endif
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#endif /* !_ARM_MCONTEXT_H_ */
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