1cd76c7513
. primary purpose is to synchronize with <ieeefp.h> which expects a fp_prec from sys/arch/x86/include/ieeefp.h
82 lines
3 KiB
C
82 lines
3 KiB
C
/* $NetBSD: cputypes.h,v 1.3 2011/01/27 18:44:40 bouyer Exp $ */
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/*
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* Copyright (c) 1993 Christopher G. Demetriou
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Classes of Processor. CPU identification code depends on
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* this starting at 0, and having an increment of one.
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*/
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#define CPUCLASS_386 0
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#define CPUCLASS_486 1
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#define CPUCLASS_586 2
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#define CPUCLASS_686 3
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/*
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* Kinds of Processor. Only the first 7 are used, as they are processors
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* that might not have a cpuid instruction.
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*/
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#define CPU_386SX 0 /* Intel 80386SX */
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#define CPU_386 1 /* Intel 80386DX */
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#define CPU_486SX 2 /* Intel 80486SX */
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#define CPU_486 3 /* Intel 80486DX */
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#define CPU_486DLC 4 /* Cyrix 486DLC */
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#define CPU_6x86 5 /* Cyrix/IBM 6x86 */
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#define CPU_NX586 6 /* NexGen 586 */
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#define CPU_586 7 /* Intel P.....m (I hate lawyers; it's TM) */
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#define CPU_AM586 8 /* AMD Am486 and Am5x86 */
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#define CPU_K5 9 /* AMD K5 */
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#define CPU_K6 10 /* NexGen 686 aka AMD K6 */
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#define CPU_686 11 /* Intel Pentium Pro */
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#define CPU_C6 12 /* IDT WinChip C6 */
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#define CPU_TMX86 13 /* Transmeta TMx86 */
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/*
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* CPU vendors
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*/
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#define CPUVENDOR_UNKNOWN 0
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#define CPUVENDOR_INTEL 1
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#define CPUVENDOR_CYRIX 2
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#define CPUVENDOR_NEXGEN 3
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#define CPUVENDOR_AMD 4
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#define CPUVENDOR_IDT 5
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#define CPUVENDOR_TRANSMETA 6
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#define CPUVENDOR_VORTEX86 7
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/*
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* Some other defines, dealing with values returned by cpuid.
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*/
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#define CPU_MAXMODEL 15 /* Models within family range 0-15 */
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#define CPU_DEFMODEL 16 /* Value for unknown model -> default */
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#define CPU_MINFAMILY 4 /* Lowest that cpuid can return (486) */
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#define CPU_MAXFAMILY 7 /* Highest consecutive # we know (fake P4) */
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#define CPU_FAMILY_P4 15 /* Family number for Pentium 4 */
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