84d9c625bf
- Fix for possible unset uid/gid in toproto
- Fix for default mtree style
- Update libelf
- Importing libexecinfo
- Resynchronize GCC, mpc, gmp, mpfr
- build.sh: Replace params with show-params.
This has been done as the make target has been renamed in the same
way, while a new target named params has been added. This new
target generates a file containing all the parameters, instead of
printing it on the console.
- Update test48 with new etc/services (Fix by Ben Gras <ben@minix3.org)
get getservbyport() out of the inner loop
Change-Id: Ie6ad5226fa2621ff9f0dee8782ea48f9443d2091
515 lines
15 KiB
C
515 lines
15 KiB
C
/* $NetBSD: cpu.h,v 1.58 2013/12/01 01:05:16 christos Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)cpu.h 5.4 (Berkeley) 5/9/91
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*/
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#ifndef _X86_CPU_H_
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#define _X86_CPU_H_
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#if defined(_KERNEL) || defined(_STANDALONE)
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#include <sys/types.h>
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#else
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#include <stdbool.h>
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#endif /* _KERNEL || _STANDALONE */
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#if defined(_KERNEL) || defined(_KMEMUSER)
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#if defined(_KERNEL_OPT)
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#include "opt_xen.h"
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#ifdef i386
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#include "opt_user_ldt.h"
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#include "opt_vm86.h"
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#endif
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#endif
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/*
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* Definitions unique to x86 cpu support.
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*/
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#include <machine/frame.h>
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#include <machine/pte.h>
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#include <machine/segments.h>
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#include <machine/tss.h>
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#include <machine/intrdefs.h>
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#include <x86/cacheinfo.h>
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#include <sys/cpu_data.h>
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#include <sys/evcnt.h>
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#include <sys/device_if.h> /* for device_t */
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#ifdef XEN
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#include <xen/xen-public/xen.h>
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#include <xen/xen-public/event_channel.h>
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#include <sys/mutex.h>
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#endif /* XEN */
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struct intrsource;
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struct pmap;
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#ifdef __x86_64__
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#define i386tss x86_64_tss
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#endif
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#define NIOPORTS 1024 /* # of ports we allow to be mapped */
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#define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */
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/*
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* a bunch of this belongs in cpuvar.h; move it later..
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*/
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struct cpu_info {
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struct cpu_data ci_data; /* MI per-cpu data */
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device_t ci_dev; /* pointer to our device */
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struct cpu_info *ci_self; /* self-pointer */
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volatile struct vcpu_info *ci_vcpu; /* for XEN */
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void *ci_tlog_base; /* Trap log base */
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int32_t ci_tlog_offset; /* Trap log current offset */
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/*
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* Will be accessed by other CPUs.
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*/
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struct cpu_info *ci_next; /* next cpu */
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struct lwp *ci_curlwp; /* current owner of the processor */
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struct lwp *ci_fpcurlwp; /* current owner of the FPU */
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int ci_fpsaving; /* save in progress */
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int ci_fpused; /* XEN: FPU was used by curlwp */
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cpuid_t ci_cpuid; /* our CPU ID */
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int _unused;
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uint32_t ci_acpiid; /* our ACPI/MADT ID */
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uint32_t ci_initapicid; /* our intitial APIC ID */
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/*
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* Private members.
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*/
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struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */
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struct pmap *ci_pmap; /* current pmap */
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int ci_need_tlbwait; /* need to wait for TLB invalidations */
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int ci_want_pmapload; /* pmap_load() is needed */
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volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */
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#define TLBSTATE_VALID 0 /* all user tlbs are valid */
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#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */
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#define TLBSTATE_STALE 2 /* we might have stale user tlbs */
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int ci_curldt; /* current LDT descriptor */
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int ci_nintrhand; /* number of H/W interrupt handlers */
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uint64_t ci_scratch;
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uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)];
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#ifdef XEN
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struct iplsource *ci_isources[NIPL];
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u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */
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#else
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struct intrsource *ci_isources[MAX_INTR_SOURCES];
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#endif
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volatile int ci_mtx_count; /* Negative count of spin mutexes */
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volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */
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/* The following must be aligned for cmpxchg8b. */
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struct {
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uint32_t ipending;
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int ilevel;
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} ci_istate __aligned(8);
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#define ci_ipending ci_istate.ipending
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#define ci_ilevel ci_istate.ilevel
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int ci_idepth;
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void * ci_intrstack;
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uint32_t ci_imask[NIPL];
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uint32_t ci_iunmask[NIPL];
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uint32_t ci_flags; /* flags; see below */
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uint32_t ci_ipis; /* interprocessor interrupts pending */
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uint32_t sc_apic_version; /* local APIC version */
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uint32_t ci_signature; /* X86 cpuid type */
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uint32_t ci_vendor[4]; /* vendor string */
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uint32_t ci_cpu_serial[3]; /* PIII serial number */
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volatile uint32_t ci_lapic_counter;
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uint32_t ci_feat_val[5]; /* X86 CPUID feature bits
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* [0] basic features %edx
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* [1] basic features %ecx
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* [2] extended features %edx
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* [3] extended features %ecx
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* [4] VIA padlock features
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*/
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const struct cpu_functions *ci_func; /* start/stop functions */
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struct trapframe *ci_ddb_regs;
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u_int ci_cflush_lsize; /* CFLUSH insn line size */
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struct x86_cache_info ci_cinfo[CAI_COUNT];
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union descriptor *ci_gdt;
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#ifdef i386
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struct i386tss ci_doubleflt_tss;
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struct i386tss ci_ddbipi_tss;
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#endif
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#ifdef PAE
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uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */
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pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */
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#endif
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#if defined(XEN) && (defined(PAE) || defined(__x86_64__))
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/* Currently active user PGD (can't use rcr3() with Xen) */
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pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */
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paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */
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kmutex_t ci_kpm_mtx;
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#if defined(__x86_64__)
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/* per-cpu version of normal_pdes */
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pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */
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paddr_t ci_xen_current_user_pgd;
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#endif /* __x86_64__ */
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#endif /* XEN et.al */
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char *ci_doubleflt_stack;
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char *ci_ddbipi_stack;
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#ifndef XEN
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struct evcnt ci_ipi_events[X86_NIPI];
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#else /* XEN */
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struct evcnt ci_ipi_events[XEN_NIPIS];
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evtchn_port_t ci_ipi_evtchn;
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#endif /* XEN */
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device_t ci_frequency; /* Frequency scaling technology */
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device_t ci_padlock; /* VIA PadLock private storage */
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device_t ci_temperature; /* Intel coretemp(4) or equivalent */
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device_t ci_vm; /* Virtual machine guest driver */
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struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */
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char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */
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int ci_tss_sel; /* TSS selector of this cpu */
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/*
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* The following two are actually region_descriptors,
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* but that would pollute the namespace.
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*/
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uintptr_t ci_suspend_gdt;
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uint16_t ci_suspend_gdt_padding;
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uintptr_t ci_suspend_idt;
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uint16_t ci_suspend_idt_padding;
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uint16_t ci_suspend_tr;
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uint16_t ci_suspend_ldt;
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uintptr_t ci_suspend_fs;
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uintptr_t ci_suspend_gs;
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uintptr_t ci_suspend_kgs;
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uintptr_t ci_suspend_efer;
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uintptr_t ci_suspend_reg[12];
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uintptr_t ci_suspend_cr0;
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uintptr_t ci_suspend_cr2;
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uintptr_t ci_suspend_cr3;
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uintptr_t ci_suspend_cr4;
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uintptr_t ci_suspend_cr8;
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/* The following must be in a single cache line. */
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int ci_want_resched __aligned(64);
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int ci_padout __aligned(64);
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};
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/*
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* Macros to handle (some) trapframe registers for common x86 code.
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*/
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#ifdef __x86_64__
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#define X86_TF_RAX(tf) tf->tf_rax
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#define X86_TF_RDX(tf) tf->tf_rdx
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#define X86_TF_RSP(tf) tf->tf_rsp
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#define X86_TF_RIP(tf) tf->tf_rip
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#define X86_TF_RFLAGS(tf) tf->tf_rflags
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#else
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#define X86_TF_RAX(tf) tf->tf_eax
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#define X86_TF_RDX(tf) tf->tf_edx
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#define X86_TF_RSP(tf) tf->tf_esp
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#define X86_TF_RIP(tf) tf->tf_eip
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#define X86_TF_RFLAGS(tf) tf->tf_eflags
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#endif
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/*
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* Processor flag notes: The "primary" CPU has certain MI-defined
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* roles (mostly relating to hardclock handling); we distinguish
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* betwen the processor which booted us, and the processor currently
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* holding the "primary" role just to give us the flexibility later to
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* change primaries should we be sufficiently twisted.
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*/
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#define CPUF_BSP 0x0001 /* CPU is the original BSP */
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#define CPUF_AP 0x0002 /* CPU is an AP */
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#define CPUF_SP 0x0004 /* CPU is only processor */
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#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */
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#define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */
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#define CPUF_PRESENT 0x1000 /* CPU is present */
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#define CPUF_RUNNING 0x2000 /* CPU is running */
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#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */
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#define CPUF_GO 0x8000 /* CPU should start running */
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#endif /* _KERNEL || __KMEMUSER */
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#ifdef _KERNEL
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/*
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* We statically allocate the CPU info for the primary CPU (or,
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* the only CPU on uniprocessors), and the primary CPU is the
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* first CPU on the CPU info list.
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*/
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extern struct cpu_info cpu_info_primary;
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extern struct cpu_info *cpu_info_list;
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#define CPU_INFO_ITERATOR int __unused
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#define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \
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ci != NULL; ci = ci->ci_next
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#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target))
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#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
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#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
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#if !defined(__GNUC__) || defined(_MODULE)
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/* For non-GCC and modules */
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struct cpu_info *x86_curcpu(void);
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void cpu_set_curpri(int);
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# ifdef __GNUC__
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lwp_t *x86_curlwp(void) __attribute__ ((const));
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# else
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lwp_t *x86_curlwp(void);
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# endif
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#endif
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#define cpu_number() (cpu_index(curcpu()))
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#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
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#define X86_AST_GENERIC 0x01
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#define X86_AST_PREEMPT 0x02
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#define aston(l, why) ((l)->l_md.md_astpending |= (why))
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#define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT)
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void cpu_boot_secondary_processors(void);
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void cpu_init_idle_lwps(void);
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void cpu_init_msrs(struct cpu_info *, bool);
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void cpu_load_pmap(struct pmap *, struct pmap *);
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void cpu_broadcast_halt(void);
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void cpu_kick(struct cpu_info *);
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#define curcpu() x86_curcpu()
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#define curlwp x86_curlwp()
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#define curpcb ((struct pcb *)lwp_getpcb(curlwp))
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/*
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* Arguments to hardclock, softclock and statclock
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* encapsulate the previous machine state in an opaque
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* clockframe; for now, use generic intrframe.
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*/
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struct clockframe {
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struct intrframe cf_if;
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};
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/*
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* Give a profiling tick to the current process when the user profiling
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* buffer pages are invalid. On the i386, request an ast to send us
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* through trap(), marking the proc as needing a profiling tick.
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*/
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extern void cpu_need_proftick(struct lwp *l);
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/*
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* Notify the LWP l that it has a signal pending, process as soon as
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* possible.
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*/
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extern void cpu_signotify(struct lwp *);
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/*
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* We need a machine-independent name for this.
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*/
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extern void (*delay_func)(unsigned int);
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struct timeval;
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#define DELAY(x) (*delay_func)(x)
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#define delay(x) (*delay_func)(x)
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extern int biosbasemem;
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extern int biosextmem;
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extern int cputype;
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extern int cpuid_level;
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extern int cpu_class;
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extern char cpu_brand_string[];
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extern int use_pae;
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extern int i386_use_fxsave;
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extern int i386_has_sse;
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extern int i386_has_sse2;
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extern void (*x86_cpu_idle)(void);
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#define cpu_idle() (*x86_cpu_idle)()
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/* machdep.c */
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void dumpconf(void);
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void cpu_reset(void);
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void i386_proc0_tss_ldt_init(void);
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void dumpconf(void);
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void cpu_reset(void);
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void x86_64_proc0_tss_ldt_init(void);
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void x86_64_init_pcb_tss_ldt(struct cpu_info *);
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/* longrun.c */
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u_int tmx86_get_longrun_mode(void);
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void tmx86_get_longrun_status(u_int *, u_int *, u_int *);
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void tmx86_init_longrun(void);
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/* identcpu.c */
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void cpu_probe(struct cpu_info *);
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void cpu_identify(struct cpu_info *);
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/* cpu_topology.c */
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void x86_cpu_topology(struct cpu_info *);
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/* vm_machdep.c */
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void cpu_proc_fork(struct proc *, struct proc *);
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/* locore.s */
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struct region_descriptor;
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void lgdt(struct region_descriptor *);
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#ifdef XEN
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void lgdt_finish(void);
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#endif
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struct pcb;
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void savectx(struct pcb *);
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void lwp_trampoline(void);
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#ifdef XEN
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void startrtclock(void);
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void xen_delay(unsigned int);
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void xen_initclocks(void);
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void xen_suspendclocks(struct cpu_info *);
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void xen_resumeclocks(struct cpu_info *);
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#else
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/* clock.c */
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void initrtclock(u_long);
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void startrtclock(void);
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void i8254_delay(unsigned int);
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void i8254_microtime(struct timeval *);
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void i8254_initclocks(void);
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#endif
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/* cpu.c */
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void cpu_probe_features(struct cpu_info *);
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/* npx.c */
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void npxsave_lwp(struct lwp *, bool);
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void npxsave_cpu(bool);
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/* vm_machdep.c */
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paddr_t kvtop(void *);
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#ifdef USER_LDT
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/* sys_machdep.h */
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int x86_get_ldt(struct lwp *, void *, register_t *);
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int x86_set_ldt(struct lwp *, void *, register_t *);
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#endif
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/* isa_machdep.c */
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void isa_defaultirq(void);
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int isa_nmi(void);
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#ifdef VM86
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/* vm86.c */
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void vm86_gpfault(struct lwp *, int);
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#endif /* VM86 */
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/* consinit.c */
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void kgdb_port_init(void);
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/* bus_machdep.c */
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void x86_bus_space_init(void);
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void x86_bus_space_mallocok(void);
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#endif /* _KERNEL */
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#if defined(_KERNEL) || defined(_KMEMUSER)
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#include <machine/psl.h> /* Must be after struct cpu_info declaration */
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#endif /* _KERNEL || __KMEMUSER */
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/*
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* CTL_MACHDEP definitions.
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*/
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#define CPU_CONSDEV 1 /* dev_t: console terminal device */
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#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */
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#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */
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/* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */
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#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
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#define CPU_DISKINFO 6 /* struct disklist *:
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* disk geometry information */
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#define CPU_FPU_PRESENT 7 /* int: FPU is present */
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#define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */
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#define CPU_SSE 9 /* int: OS/CPU supports SSE */
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#define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */
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#define CPU_TMLR_MODE 11 /* int: longrun mode
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* 0: minimum frequency
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* 1: economy
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* 2: performance
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* 3: maximum frequency
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*/
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#define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
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#define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
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#define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
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#define CPU_MAXID 15 /* number of valid machdep ids */
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/*
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* Structure for CPU_DISKINFO sysctl call.
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* XXX this should be somewhere else.
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*/
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#define MAX_BIOSDISKS 16
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struct disklist {
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int dl_nbiosdisks; /* number of bios disks */
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struct biosdisk_info {
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int bi_dev; /* BIOS device # (0x80 ..) */
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int bi_cyl; /* cylinders on disk */
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int bi_head; /* heads per track */
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int bi_sec; /* sectors per track */
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uint64_t bi_lbasecs; /* total sec. (iff ext13) */
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#define BIFLAG_INVALID 0x01
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#define BIFLAG_EXTINT13 0x02
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int bi_flags;
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} dl_biosdisks[MAX_BIOSDISKS];
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int dl_nnativedisks; /* number of native disks */
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struct nativedisk_info {
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char ni_devname[16]; /* native device name */
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int ni_nmatches; /* # of matches w/ BIOS */
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int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
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} dl_nativedisks[1]; /* actually longer */
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};
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#endif /* !_X86_CPU_H_ */
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