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User-space networking!

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- RTL8139 driver moved to user-space;
- PCI code moved to user-space;
Fixed IRQ hook dump at IS server.
This commit is contained in:
Jorrit Herder 2005-05-11 09:02:00 +00:00
parent ab39ce451b
commit fbe1641bd3
27 changed files with 565 additions and 2017 deletions
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4
drivers/Makefile
View file

@ -14,10 +14,12 @@ usage:
build: all
all install clean:
cd ./libdriver && $(MAKE) $@
cd ./libpci && $(MAKE) $@
cd ./tty && $(MAKE) $@
cd ./memory && $(MAKE) $@
cd ./at_wini && $(MAKE) $@
cd ./floppy && $(MAKE) $@
cd ./printer && $(MAKE) $@
cd ./libdriver && $(MAKE) $@
cd ./rtl8139 && $(MAKE) $@

3
drivers/libdriver/Makefile
View file

@ -15,14 +15,13 @@ LIBS = -lsys -lutils
OBJECTS = driver.o drvlib.o
all build: $(OBJECTS)
all build install: $(OBJECTS)
# $(CC) -c $@ $(LDFLAGS) $(OBJ) $(LIBS)
clean:
rm -f *.o *.bak
install:
# Dependencies
a = $m/config.h $i/ansi.h $m/type.h $m/com.h $m/callnr.h $s/types.h \

35
drivers/libpci/Makefile Normal file
View file

@ -0,0 +1,35 @@
# Makefile for PCI bus library
# Directories
u = /usr
i = $u/include
s = $i/sys
b = $i/ibm
m = $i/minix
# Programs, flags, etc.
CC = exec cc
CFLAGS = -I$i
LDFLAGS = -i
LIBS = -lsys -lutils
OBJECTS = pci.o pci_table.o
all build install: $(OBJECTS)
# $(CC) -c $@ $(LDFLAGS) $(OBJ) $(LIBS)
clean:
rm -f *.o *.bak
# Dependencies
a = $m/config.h $i/ansi.h $m/type.h $m/com.h $m/callnr.h $s/types.h \
$m/const.h $m/syslib.h $m/utils.h \
$i/string.h $i/limits.h $i/stddef.h $i/errno.h \
$m/partition.h $m/u64.h
pci.o: $a
pci.o: pci.h
pci.o: pci_amd.h pci_intel.h pci_via.h pci_sis.h

147
drivers/libpci/pci.c
View file

@ -1,3 +1,4 @@
#define USER_SPACE 1
/*
pci.c
@ -6,16 +7,17 @@ Configure devices on the PCI bus
Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
*/
#include "../../kernel/kernel.h"
#include "../drivers.h"
#include <minix/com.h>
#include <minix/syslib.h>
#include "../../kernel/assert.h"
#include "pci.h"
#include "pci_amd.h"
#include "pci_intel.h"
#include "pci_sis.h"
#include "pci_via.h"
#if __minix_vmd
#include "../../kernel/config.h"
#include "config.h"
#endif
#if ENABLE_PCI
@ -25,10 +27,14 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
#define irq_mode_pci(irq) ((void)0)
#endif
INIT_ASSERT
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <minix/utils.h>
INIT_SERVER_ASSERT
#define NR_PCIBUS 2
#define NR_PCIDEV 20
#define NR_PCIDEV 40
#define PBT_INTEL 1
#define PBT_PCIBRIDGE 2
@ -96,6 +102,47 @@ FORWARD _PROTOTYPE( void pcii_wreg32, (int busind, int devind, int port,
FORWARD _PROTOTYPE( u16_t pcii_rsts, (int busind) );
FORWARD _PROTOTYPE( void pcii_wsts, (int busind, U16_t value) );
/*===========================================================================*
* helper functions for I/O *
*===========================================================================*/
PUBLIC unsigned pci_inb(U16_t port) {
U8_t value;
int s;
if ((s=sys_inb(port, &value)) !=OK)
printf("PCI: warning, sys_inb failed: %d\n", s);
return value;
}
PUBLIC unsigned pci_inw(U16_t port) {
U16_t value;
int s;
if ((s=sys_inw(port, &value)) !=OK)
printf("PCI: warning, sys_inw failed: %d\n", s);
return value;
}
PUBLIC unsigned pci_inl(U16_t port) {
U32_t value;
int s;
if ((s=sys_inl(port, &value)) !=OK)
printf("PCI: warning, sys_inl failed: %d\n", s);
return value;
}
PUBLIC void pci_outb(U16_t port, U8_t value) {
int s;
if ((s=sys_outb(port, value)) !=OK)
printf("PCI: warning, sys_outb failed: %d\n", s);
}
PUBLIC void pci_outw(U16_t port, U16_t value) {
int s;
if ((s=sys_outw(port, value)) !=OK)
printf("PCI: warning, sys_outw failed: %d\n", s);
}
PUBLIC void pci_outl(U16_t port, U32_t value) {
int s;
if ((s=sys_outl(port, value)) !=OK)
printf("PCI: warning, sys_outl failed: %d\n", s);
}
/*===========================================================================*
* pci_init *
*===========================================================================*/
@ -107,7 +154,7 @@ PUBLIC void pci_init()
return;
/* We don't expect to interrupted */
assert(first_time == 1);
server_assert(first_time == 1);
first_time= -1;
/* Only Intel (compatible) PCI controllers are supported at the
@ -201,8 +248,8 @@ u16_t *didp;
PUBLIC void pci_reserve(devind)
int devind;
{
assert(devind <= nr_pcidev);
assert(!pcidev[devind].pd_inuse);
server_assert(devind <= nr_pcidev);
server_assert(!pcidev[devind].pd_inuse);
pcidev[devind].pd_inuse= 1;
}
@ -215,7 +262,7 @@ int devind;
u16_t *vidp;
u16_t *didp;
{
assert(devind <= nr_pcidev);
server_assert(devind <= nr_pcidev);
*vidp= pcidev[devind].pd_vid;
*didp= pcidev[devind].pd_did;
}
@ -351,7 +398,7 @@ PRIVATE void pci_intel_init()
*/
u32_t bus, dev, func;
u16_t vid, did;
int i, r, busind;
int s, i, r, busind;
char *dstr;
bus= 0;
@ -360,7 +407,12 @@ PRIVATE void pci_intel_init()
vid= PCII_RREG16_(bus, dev, func, PCI_VID);
did= PCII_RREG16_(bus, dev, func, PCI_DID);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
if (vid == 0xffff && did == 0xffff)
return; /* Nothing here */
@ -383,7 +435,7 @@ PRIVATE void pci_intel_init()
}
if (nr_pcibus >= NR_PCIBUS)
panic("too many PCI busses", nr_pcibus);
server_panic("PCI","too many PCI busses", nr_pcibus);
busind= nr_pcibus;
nr_pcibus++;
pcibus[busind].pb_type= PBT_INTEL;
@ -445,7 +497,7 @@ int busind;
printf("probe_bus(%d)\n", busind);
#endif
if (nr_pcidev >= NR_PCIDEV)
panic("too many PCI devices", nr_pcidev);
server_panic("PCI","too many PCI devices", nr_pcidev);
devind= nr_pcidev;
for (dev= 0; dev<32; dev++)
@ -519,7 +571,7 @@ printf("probe_bus(%d)\n", busind);
pcidev[devind].pd_inuse= 0;
if (nr_pcidev >= NR_PCIDEV)
panic("too many PCI devices", nr_pcidev);
server_panic("PCI","too many PCI devices", nr_pcidev);
devind= nr_pcidev;
if (func == 0 && !(headt & PHT_MULTIFUNC))
@ -610,7 +662,7 @@ int busind;
r= do_sis_isabr(bridge_dev);
break;
default:
panic("unknown ISA bridge type", type);
server_panic("PCI","unknown ISA bridge type", type);
}
return r;
}
@ -671,7 +723,7 @@ int busind;
#endif
if (nr_pcibus >= NR_PCIBUS)
panic("too many PCI busses", nr_pcibus);
server_panic("PCI","too many PCI busses", nr_pcibus);
ind= nr_pcibus;
nr_pcibus++;
pcibus[ind].pb_type= PBT_PCIBRIDGE;
@ -695,7 +747,7 @@ int busind;
pcibus[ind].pb_wsts= pcibr_via_wsts;
break;
default:
panic("unknown PCI-PCI bridge type", type);
server_panic("PCI","unknown PCI-PCI bridge type", type);
}
probe_bus(ind);
@ -709,7 +761,7 @@ int busind;
PRIVATE int do_piix(devind)
int devind;
{
int i, dev, func, irqrc, irq;
int i, s, dev, func, irqrc, irq;
u16_t elcr1, elcr2, elcr;
#if DEBUG
@ -717,8 +769,15 @@ int devind;
#endif
dev= pcidev[devind].pd_dev;
func= pcidev[devind].pd_func;
#if USER_SPACE
if (OK != (s=sys_inb(PIIX_ELCR1, &elcr1)))
printf("Warning, sys_inb failed: %d\n", s);
if (OK != (s=sys_inb(PIIX_ELCR2, &elcr2)))
printf("Warning, sys_inb failed: %d\n", s);
#else
elcr1= inb(PIIX_ELCR1);
elcr2= inb(PIIX_ELCR2);
#endif
elcr= elcr1 | (elcr2 << 8);
for (i= 0; i<4; i++)
{
@ -737,7 +796,7 @@ int devind;
{
printf("IRQ %d is not level triggered\n",
irq);
panic(NULL, NO_NUM);
server_panic(NULL,NULL, NO_NUM);
}
irq_mode_pci(irq);
}
@ -762,7 +821,7 @@ int devind;
/* Fake a device with the required function */
if (nr_pcidev >= NR_PCIDEV)
panic("too many PCI devices", nr_pcidev);
server_panic("PCI","too many PCI devices", nr_pcidev);
xdevind= nr_pcidev;
pcidev[xdevind].pd_busind= bus;
pcidev[xdevind].pd_dev= dev;
@ -789,7 +848,7 @@ int devind;
{
printf("IRQ %d is not level triggered\n",
irq);
panic(NULL, NO_NUM);
server_panic(NULL, NULL, NO_NUM);
}
irq_mode_pci(irq);
}
@ -865,7 +924,7 @@ int devind;
irq= pci_attr_r8(devind, VIA_ISABR_IRQ_R1) >> 4;
break;
default:
assert(0);
server_assert(0);
}
irq &= 0xf;
if (!irq)
@ -881,7 +940,7 @@ int devind;
{
printf("IRQ %d is not level triggered\n",
irq);
panic(NULL, NO_NUM);
server_panic(NULL, NULL, NO_NUM);
}
irq_mode_pci(irq);
}
@ -1085,12 +1144,17 @@ int devind;
int port;
{
u8_t v;
int s;
v= PCII_RREG8_(pcibus[busind].pb_bus,
pcidev[devind].pd_dev, pcidev[devind].pd_func,
port);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
#if 0
printf("pcii_rreg8(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
busind, devind, port,
@ -1110,11 +1174,17 @@ int devind;
int port;
{
u16_t v;
int s;
v= PCII_RREG16_(pcibus[busind].pb_bus,
pcidev[devind].pd_dev, pcidev[devind].pd_func,
port);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n");
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
#if 0
printf("pcii_rreg16(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
busind, devind, port,
@ -1134,11 +1204,17 @@ int devind;
int port;
{
u32_t v;
int s;
v= PCII_RREG32_(pcibus[busind].pb_bus,
pcidev[devind].pd_dev, pcidev[devind].pd_func,
port);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
#if 0
printf("pcii_rreg32(%d, %d, 0x%X): %d.%d.%d= 0x%X\n",
busind, devind, port,
@ -1158,6 +1234,7 @@ int devind;
int port;
u16_t value;
{
int s;
#if 0
printf("pcii_wreg16(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
busind, devind, port, value,
@ -1167,7 +1244,12 @@ u16_t value;
PCII_WREG16_(pcibus[busind].pb_bus,
pcidev[devind].pd_dev, pcidev[devind].pd_func,
port, value);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
}
@ -1180,6 +1262,7 @@ int devind;
int port;
u32_t value;
{
int s;
#if 0
printf("pcii_wreg32(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
busind, devind, port, value,
@ -1189,7 +1272,12 @@ u32_t value;
PCII_WREG32_(pcibus[busind].pb_bus,
pcidev[devind].pd_dev, pcidev[devind].pd_func,
port, value);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n");
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
}
@ -1200,8 +1288,15 @@ PRIVATE u16_t pcii_rsts(busind)
int busind;
{
u16_t v;
int s;
v= PCII_RREG16_(pcibus[busind].pb_bus, 0, 0, PCI_PCISTS);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
return v;
}
@ -1213,8 +1308,14 @@ PRIVATE void pcii_wsts(busind, value)
int busind;
u16_t value;
{
int s;
PCII_WREG16_(pcibus[busind].pb_bus, 0, 0, PCI_PCISTS, value);
#if USER_SPACE
if (OK != (s=sys_outl(PCII_CONFADD, PCII_UNSEL)))
printf("PCI: warning, sys_outl failed: %d\n", s);
#else
outl(PCII_CONFADD, PCII_UNSEL);
#endif
}
#endif /* ENABLE_PCI */

29
drivers/libpci/pci.h
View file

@ -4,6 +4,35 @@ pci.h
Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
*/
#if ENABLE_PCI
/* tempory functions: to be replaced later (see pci_intel.h) */
_PROTOTYPE( unsigned pci_inb, (U16_t port) );
_PROTOTYPE( unsigned pci_inw, (U16_t port) );
_PROTOTYPE( unsigned pci_inl, (U16_t port) );
_PROTOTYPE( void pci_outb, (U16_t port, U8_t value) );
_PROTOTYPE( void pci_outw, (U16_t port, U16_t value) );
_PROTOTYPE( void pci_outl, (U16_t port, U32_t value) );
/* pci.c */
_PROTOTYPE( void pci_init, (void) );
_PROTOTYPE( int pci_find_dev, (U8_t bus, U8_t dev, U8_t func,
int *devindp) );
_PROTOTYPE( int pci_first_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( int pci_next_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( void pci_reserve, (int devind) );
_PROTOTYPE( void pci_ids, (int devind, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( char *pci_slot_name, (int devind) );
_PROTOTYPE( char *pci_dev_name, (U16_t vid, U16_t did) );
_PROTOTYPE( u8_t pci_attr_r8, (int devind, int port) );
_PROTOTYPE( u16_t pci_attr_r16, (int devind, int port) );
_PROTOTYPE( u32_t pci_attr_r32, (int devind, int port) );
_PROTOTYPE( void pci_attr_w16, (int devind, int port, U16_t value) );
_PROTOTYPE( void pci_attr_w32, (int devind, int port, u32_t value) );
#endif /* ENABLE_PCI */
#define PCI_VID 0x00 /* Vendor ID, 16-bit */
#define PCI_DID 0x02 /* Device ID, 16-bit */
#define PCI_CR 0x04 /* Command Register, 16-bit */

8
drivers/libpci/pci_intel.h
View file

@ -25,8 +25,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
#define PCII_UNSEL (0)
#define PCII_RREG8_(bus, dev, func, reg) \
(outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
inb(PCII_CONFDATA+((reg)&3)))
(pci_outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
pci_inb(PCII_CONFDATA+((reg)&3)))
#define PCII_RREG16_(bus, dev, func, reg) \
(PCII_RREG8_(bus, dev, func, reg) | \
(PCII_RREG8_(bus, dev, func, reg+1) << 8))
@ -35,8 +35,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
(PCII_RREG16_(bus, dev, func, reg+2) << 16))
#define PCII_WREG8_(bus, dev, func, reg, val) \
(outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
outb(PCII_CONFDATA+((reg)&3), (val)))
(pci_outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
pci_outb(PCII_CONFDATA+((reg)&3), (val)))
#define PCII_WREG16_(bus, dev, func, reg, val) \
(PCII_WREG8_(bus, dev, func, reg, (val)), \
(PCII_WREG8_(bus, dev, func, reg+1, (val) >> 8)))

15
drivers/libpci/pci_table.c
View file

@ -8,10 +8,15 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
See the Linux PCI ID Repository <http://pciids.sourceforge.net/>.
*/
#include "../../kernel/kernel.h"
/* Changes from original Minix 2.0.4 version (2003-09-05):
* 2003-11-30 (kjb) Minix 2.0.4 FIX.TAZ add D-Link RTL8139 (0x1186, 0x1300)
* 2004-08-08 (asw) add Intel 82371AB (0x8086, 0x7100)
*/
#include "../drivers.h"
#include "pci.h"
#if __minix_vmd
#include "../../kernel/config.h"
#include "config.h"
#endif
#if ENABLE_PCI
@ -104,6 +109,7 @@ struct pci_device pci_device_table[]=
{ 0x8086, 0x7000, "Intel 82371SB" },
{ 0x8086, 0x7010, "Intel 82371SB (IDE)" },
{ 0x8086, 0x7020, "Intel 82371SB (USB)" },
{ 0x8086, 0x7100, "Intel 82371AB" },
{ 0x8086, 0x7110, "Intel 82371AB (PIIX4)" },
{ 0x8086, 0x7111, "Intel 82371AB (IDE)" },
{ 0x8086, 0x7112, "Intel 82371AB (USB)" },
@ -205,9 +211,12 @@ struct pci_intel_ctrl pci_intel_ctrl[]=
{ 0x10B9, 0x1541, }, /* ALI M1541 */
{ 0x1106, 0x0305, }, /* VIA VT8363/8365 */
{ 0x1106, 0x3099, }, /* VIA VT8367 [KT266] */
{ 0x1106, 0x3188, }, /* VIA */
{ 0x1106, 0x0204, }, /* VIA VT8367 [KT266] */
{ 0x8086, 0x122D, }, /* Intel 82437FX */
{ 0x8086, 0x1237, }, /* Intel 82441FX */
{ 0x8086, 0x1250, }, /* Intel 82439HX */
{ 0x8086, 0x7100, }, /* Intel 82371AB */
{ 0x8086, 0x7190, }, /* Intel 82443BX */
{ 0x0000, 0x0000, },
};
@ -219,8 +228,10 @@ struct pci_isabridge pci_isabridge[]=
{ 0x10B9, 0x1533, 1, PCI_IB_PIIX, }, /* ALI M1533 */
{ 0x1106, 0x0686, 1, PCI_IB_VIA, }, /* VIA VT82C686 */
{ 0x1106, 0x3074, 1, PCI_IB_VIA, }, /* VIA VT8233 */
{ 0x1106, 0x3227, 1, PCI_IB_VIA, }, /* VIA */
{ 0x8086, 0x122E, 1, PCI_IB_PIIX, }, /* Intel 82371FB */
{ 0x8086, 0x7000, 1, PCI_IB_PIIX, }, /* Intel 82371SB */
{ 0x8086, 0x7100, 1, PCI_IB_PIIX, }, /* Intel 82371AB */
{ 0x8086, 0x7110, 1, PCI_IB_PIIX, }, /* Intel PIIX4 */
{ 0x0000, 0x0000, 0, 0, },
};

54
drivers/rtl8139/Makefile Normal file
View file

@ -0,0 +1,54 @@
# Makefile for the Realtek RTL8139 ethernet driver (RTL8139)
DRIVER = rtl8139
# directories
u = /usr
i = $u/include
s = $i/sys
m = $i/minix
b = $i/ibm
d = $u/src/drivers
# programs, flags, etc.
MAKE = exec make
CC = exec cc
CFLAGS = -I$i
LDFLAGS = -i
LIBS = -lsys -lutils -ltimers
OBJ = rtl8139.o
LIBPCI = $d/libpci/pci.o $d/libpci/pci_table.o
# build local binary
all build: $(DRIVER)
$(DRIVER): $(OBJ) $(PCI)
$(CC) -o $@ $(LDFLAGS) $(OBJ) $(LIBPCI) $(LIBS)
install -S 256w $(DRIVER)
$(PCI):
cd $d/libpci && $(MAKE)
# install with other drivers
install: /usr/sbin/drivers/$(DRIVER)
/usr/sbin/drivers/$(DRIVER): $(DRIVER)
install -o root -cs $? $@
# clean up local files
clean:
rm -f $(DRIVER) *.o *.bak
# dependencies
a = $d/drivers.h $b/interrupt.h $b/bios.h \
$i/ansi.h $i/string.h $i/limits.h $i/stddef.h $i/errno.h \
$m/config.h $m/type.h $m/com.h $m/callnr.h $m/const.h $s/types.h \
$m/syslib.h $s/types.h \
$m/utils.h $m/serverassert.h $m/devio.h
l = $d/libpci/pci.h $d/libpci/pci.c $d/libpci/pci_table.c
rtl8139.o: $a $l
$(LIBPCI): $a $l

488
kernel/rtl8139.c → drivers/rtl8139/rtl8139.c
View file

@ -46,7 +46,7 @@
*
*/
#include "kernel.h"
#include "../drivers.h"
#include <stdlib.h>
#include <stdio.h>
@ -81,8 +81,7 @@
#error PCI support not enabled
#endif
#include "pci.h"
#include "proc.h"
#include "../libpci/pci.h"
#include "rtl8139.h"
INIT_SERVER_ASSERT
@ -136,7 +135,6 @@ PRIVATE struct pcitab
{ 0x0000, 0x0000, 0 }
};
typedef struct re
{
port_t re_base_port;
@ -175,7 +173,7 @@ typedef struct re
u8_t re_pcifunc;
/* 'large' items */
irq_hook_t re_hook;
int re_hook_id; /* IRQ hook id at kernel */
eth_stat_t re_stat;
ether_addr_t re_address;
message re_rx_mess;
@ -208,12 +206,55 @@ static int rl_tasknr;
static u16_t eth_ign_proto;
static tmra_ut rl_watchdog;
#define rl_inb(port, offset) (inb((port) + (offset)))
#define rl_inw(port, offset) (inw((port) + (offset)))
#define rl_inl(port, offset) (inl((port) + (offset)))
#define rl_outb(port, offset, value) (outb((port) + (offset), (value)))
#define rl_outw(port, offset, value) (outw((port) + (offset), (value)))
#define rl_outl(port, offset, value) (outl((port) + (offset), (value)))
FORWARD _PROTOTYPE( unsigned my_inb, (U16_t port) );
FORWARD _PROTOTYPE( unsigned my_inw, (U16_t port) );
FORWARD _PROTOTYPE( unsigned my_inl, (U16_t port) );
static unsigned my_inb(U16_t port) {
U8_t value;
int s;
if ((s=sys_inb(port, &value)) !=OK)
printf("RTL8139: warning, sys_inb failed: %d\n", s);
return value;
}
static unsigned my_inw(U16_t port) {
U16_t value;
int s;
if ((s=sys_inw(port, &value)) !=OK)
printf("RTL8139: warning, sys_inw failed: %d\n", s);
return value;
}
static unsigned my_inl(U16_t port) {
U32_t value;
int s;
if ((s=sys_inl(port, &value)) !=OK)
printf("RTL8139: warning, sys_inl failed: %d\n", s);
return value;
}
#define rl_inb(port, offset) (my_inb((port) + (offset)))
#define rl_inw(port, offset) (my_inw((port) + (offset)))
#define rl_inl(port, offset) (my_inl((port) + (offset)))
FORWARD _PROTOTYPE( void my_outb, (U16_t port, U8_t value) );
FORWARD _PROTOTYPE( void my_outw, (U16_t port, U16_t value) );
FORWARD _PROTOTYPE( void my_outl, (U16_t port, U32_t value) );
static void my_outb(U16_t port, U8_t value) {
int s;
if ((s=sys_outb(port, value)) !=OK)
printf("RTL8139: warning, sys_outb failed: %d\n", s);
}
static void my_outw(U16_t port, U16_t value) {
int s;
if ((s=sys_outw(port, value)) !=OK)
printf("RTL8139: warning, sys_outw failed: %d\n", s);
}
static void my_outl(U16_t port, U32_t value) {
int s;
if ((s=sys_outl(port, value)) !=OK)
printf("RTL8139: warning, sys_outl failed: %d\n", s);
}
#define rl_outb(port, offset, value) (my_outb((port) + (offset), (value)))
#define rl_outw(port, offset, value) (my_outw((port) + (offset), (value)))
#define rl_outl(port, offset, value) (my_outl((port) + (offset), (value)))
_PROTOTYPE( static void rl_init, (message *mp) );
_PROTOTYPE( static void rl_pci_conf, (void) );
@ -241,11 +282,13 @@ _PROTOTYPE( static void mess_reply, (message *req, message *reply) );
_PROTOTYPE( static void put_userdata, (int user_proc,
vir_bytes user_addr, vir_bytes count, void *loc_addr) );
_PROTOTYPE( static void rtl8139_stop, (void) );
_PROTOTYPE( static void check_int_events, (void) );
_PROTOTYPE( static int do_hard_int, (void) );
_PROTOTYPE( static void rtl8139_dump, (message *m) );
#if 0
_PROTOTYPE( static void dump_phy, (re_t *rep) );
#endif
_PROTOTYPE( static int rl_handler, (irq_hook_t *hookp) );
_PROTOTYPE( static int rl_handler, (re_t *rep) );
#if __minix_vmd
_PROTOTYPE( static void rl_watchdog_f, (tmra_ut *tp, tmr_arg_ut arg) );
#else
@ -256,11 +299,12 @@ _PROTOTYPE( static void rl_watchdog_f, (timer_t *tp) );
* can change its message type to fake a HARD_INT message.
*/
PRIVATE message m;
PRIVATE int int_event_check; /* set to TRUE if events arrived */
/*===========================================================================*
* rtl8139_task *
*===========================================================================*/
void rtl8139_task()
void main(void)
{
int i, r;
re_t *rep;
@ -314,11 +358,29 @@ void rtl8139_task()
* HARD_INT in rl_watchdog_f when needed, so that this
* case falls through.
*/
rl_watchdog_f(NULL); /* possibly changes m_type */
if (m.m_type != HARD_INT) /* to HARD_INT if further */
break; /* handling is needed */
#endif /* fall through */
rl_watchdog_f(NULL);
#if DEAD_CODE /* now directly done */
if (m.m_type != HARD_INT)
#endif
break;
#endif
case HARD_INT:
do_hard_int();
if (int_event_check)
check_int_events();
break ;
case FKEY_PRESSED: rtl8139_dump(&m); break;
case HARD_STOP: rtl8139_stop(); break;
default:
server_panic("rtl8139","illegal message", m.m_type);
}
}
}
static void check_int_events(void)
{
int i;
re_t *rep;
for (i= 0, rep= &re_table[0]; i<RE_PORT_NR; i++, rep++)
{
if (rep->re_mode != REM_ENABLED)
@ -329,13 +391,6 @@ void rtl8139_task()
server_assert(rep->re_flags & REF_ENABLED);
rl_check_ints(rep);
}
break ;
case FKEY_PRESSED: rtl8139_dump(&m); break;
case HARD_STOP: rtl8139_stop(); break;
default:
server_panic("rtl8139","illegal message", m.m_type);
}
}
}
/*===========================================================================*
@ -352,7 +407,7 @@ static void rtl8139_stop()
continue;
rl_outb(rep->re_base_port, RL_CR, 0);
}
printf("RTL8139 driver stopped.\n", NO_ARG);
sys_exit(0);
}
/*===========================================================================*
@ -614,11 +669,8 @@ re_t *rep;
dname= pci_dev_name(vid, did);
if (!dname)
dname= "unknown device";
kprintf("%s: ", (karg_t) rep->re_name);
kprintf("%s ", (karg_t) dname);
kprintf("(%x/", (karg_t) vid);
kprintf("%x) ", (karg_t) did);
kprintf("at %s\n", (karg_t) pci_slot_name(devind));
printf("%s: ", rep->re_name);
printf("%s (%x/%x) at %s\n", dname, vid, did, pci_slot_name(devind));
pci_reserve(devind);
/* printf("cr = 0x%x\n", pci_attr_r16(devind, PCI_CR)); */
bar= pci_attr_r32(devind, PCI_BAR) & 0xffffffe0;
@ -708,7 +760,7 @@ re_t *rep;
static void rl_init_hw(rep)
re_t *rep;
{
int i;
int s, i;
#if __minix_vmd
rl_init_buf(rep);
@ -718,15 +770,17 @@ re_t *rep;
rep->re_flags |= REF_ENABLED;
/* set the interrupt handler */
put_irq_handler(&rep->re_hook, rep->re_irq, rl_handler);
/* only send HARD_INT notifications */
if ((s=sys_irqsetpolicy(rep->re_irq, 0, &rep->re_hook_id)) != OK)
printf("RTL8139: error, couldn't set IRQ policy: %d\n", s);
rl_reset_hw(rep);
enable_irq(&rep->re_hook);
if ((s=sys_irqenable(&rep->re_hook_id)) != OK)
printf("RTL8139: error, couldn't enable interrupts: %d\n", s);
if (rep->re_mode) {
kprintf("%s: ", (karg_t) rep->re_name);
kprintf("model %s\n", (karg_t) rep->re_model);
printf("%s: model %s\n", rep->re_name, rep->re_model);
} else
{
printf("%s: unknown model 0x%08x\n",
@ -948,6 +1002,7 @@ int vectored;
u32_t l, rxstat;
re_t *rep;
iovec_t *iovp;
int cps;
dl_port = mp->DL_PORT;
count = mp->DL_COUNT;
@ -989,8 +1044,8 @@ int vectored;
amount= d_end+RX_BUFSIZE - d_start;
src_phys= rep->re_rx_buf + d_start;
dst_phys= vir2phys(&rxstat);
phys_copy(src_phys, dst_phys, sizeof(rxstat));
cps = sys_physcopy(NONE, PHYS_SEG, src_phys, SELF, D, (vir_bytes) &rxstat, sizeof(rxstat));
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
if (rep->re_clear_rx)
{
@ -1038,10 +1093,9 @@ int vectored;
if (vectored)
{
iov_src = numap_local(re_client, (vir_bytes)mp->DL_ADDR,
count * sizeof(rep->re_iovec[0]));
if (!iov_src)
server_panic("rtl8139","umap_local failed", NO_NUM);
if ((cps = sys_umap(re_client, D, (vir_bytes) mp->DL_ADDR,
count * sizeof(rep->re_iovec[0]), &iov_src)) != OK)
printf("sys_umap failed: %d\n", cps);
size= 0;
o= d_start+4;
@ -1052,8 +1106,9 @@ int vectored;
n= IOVEC_NR;
if (i+n > count)
n= count-i;
phys_copy(iov_src, vir2phys(rep->re_iovec),
cps = sys_physcopy(NONE, PHYS_SEG, iov_src, SELF, D, (vir_bytes) rep->re_iovec,
n * sizeof(rep->re_iovec[0]));
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
for (j= 0, iovp= rep->re_iovec; j<n; j++, iovp++)
{
@ -1064,10 +1119,8 @@ int vectored;
s= packlen-size;
}
dst_phys = numap_local(re_client, iovp->iov_addr, s);
if (!dst_phys)
server_panic("rtl8139","umap_local failed\n",
NO_NUM);
if (sys_umap(re_client, D, iovp->iov_addr, s, &dst_phys) != OK)
server_panic("rtl8139","umap_local failed\n", NO_NUM);
if (o >= RX_BUFSIZE)
{
@ -1080,12 +1133,15 @@ int vectored;
server_assert(o<RX_BUFSIZE);
s1= RX_BUFSIZE-o;
phys_copy(src_phys+o, dst_phys, s1);
phys_copy(src_phys, dst_phys+s1, s-s1);
cps = sys_abscopy(src_phys+o, dst_phys, s1);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
cps = sys_abscopy(src_phys, dst_phys+s1, s-s1);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
}
else
{
phys_copy(src_phys+o, dst_phys, s);
cps = sys_abscopy(src_phys+o, dst_phys, s);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
}
size += s;
@ -1108,136 +1164,137 @@ int vectored;
size= mp->DL_COUNT;
if (size < ETH_MIN_PACK_SIZE || size > ETH_MAX_PACK_SIZE_TAGGED)
server_panic("rtl8139","invalid packet size", size);
phys_user = numap_local(re_client, (vir_bytes)mp->DL_ADDR, size);
if (!phys_user)
if (OK != sys_umap(re_client, D, (vir_bytes)mp->DL_ADDR, size, &phys_user))
server_panic("rtl8139","umap_local failed", NO_NUM);
p= rep->re_tx[tx_head].ret_buf;
phys_copy(phys_user, p, size);
#endif
}
cps = sys_abscopy(phys_user, p, size);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
#endif
}
if (rep->re_clear_rx)
{
/* For some reason the receiver FIFO is not stopped when
* the buffer is full.
*/
#if 0
printf("rl_readv: later buffer overflow\n");
#endif
goto suspend; /* Buffer overflow */
}
rep->re_stat.ets_packetR++;
rep->re_read_s= packlen;
rep->re_flags= (rep->re_flags & ~REF_READING) | REF_PACK_RECV;
/* Avoid overflow in 16-bit computations */
l= d_start;
l += totlen+4;
l= (l+3) & ~3; /* align */
if (l >= RX_BUFSIZE)
{
l -= RX_BUFSIZE;
server_assert(l < RX_BUFSIZE);
}
rl_outw(port, RL_CAPR, l-RL_CAPR_DATA_OFF);
if (!from_int)
reply(rep, OK, FALSE);
return;
suspend:
if (from_int)
{
server_assert(rep->re_flags & REF_READING);
/* No need to store any state */
return;
}
rep->re_rx_mess= *mp;
server_assert(!(rep->re_flags & REF_READING));
rep->re_flags |= REF_READING;
reply(rep, OK, FALSE);
}
/*===========================================================================*
* rl_writev *
*===========================================================================*/
static void rl_writev(mp, from_int, vectored)
message *mp;
int from_int;
int vectored;
{
phys_bytes p, iov_src, phys_user;
int i, j, n, s, port, count, size;
int tx_head, re_client;
re_t *rep;
iovec_t *iovp;
port = mp->DL_PORT;
count = mp->DL_COUNT;
if (port < 0 || port >= RE_PORT_NR)
server_panic("rtl8139","illegal port", port);
rep= &re_table[port];
re_client= mp->DL_PROC;
rep->re_client= re_client;
server_assert(rep->re_mode == REM_ENABLED);
server_assert(rep->re_flags & REF_ENABLED);
if (from_int)
{
server_assert(rep->re_flags & REF_SEND_AVAIL);
rep->re_flags &= ~REF_SEND_AVAIL;
rep->re_send_int= FALSE;
rep->re_tx_alive= TRUE;
}
tx_head= rep->re_tx_head;
if (rep->re_tx[tx_head].ret_busy)
{
server_assert(!(rep->re_flags & REF_SEND_AVAIL));
rep->re_flags |= REF_SEND_AVAIL;
if (rep->re_tx[tx_head].ret_busy)
goto suspend;
/* Race condition, the interrupt handler may clear re_busy
* before we got a chance to set REF_SEND_AVAIL. Checking
* ret_busy twice should be sufficient.
*/
#if 0
printf("rl_writev: race detected\n");
#endif
rep->re_flags &= ~REF_SEND_AVAIL;
rep->re_send_int= FALSE;
}
server_assert(!(rep->re_flags & REF_SEND_AVAIL));
server_assert(!(rep->re_flags & REF_PACK_SENT));
if (vectored)
{
iov_src = numap_local(re_client, (vir_bytes)mp->DL_ADDR,
count * sizeof(rep->re_iovec[0]));
if (!iov_src)
server_panic("rtl8139","umap_local failed", NO_NUM);
size= 0;
p= rep->re_tx[tx_head].ret_buf;
for (i= 0; i<count; i += IOVEC_NR,
iov_src += IOVEC_NR * sizeof(rep->re_iovec[0]))
if (rep->re_clear_rx)
{
n= IOVEC_NR;
if (i+n > count)
n= count-i;
phys_copy(iov_src, vir2phys(rep->re_iovec),
n * sizeof(rep->re_iovec[0]));
/* For some reason the receiver FIFO is not stopped when
* the buffer is full.
*/
#if 0
printf("rl_readv: later buffer overflow\n");
#endif
goto suspend; /* Buffer overflow */
}
rep->re_stat.ets_packetR++;
rep->re_read_s= packlen;
rep->re_flags= (rep->re_flags & ~REF_READING) | REF_PACK_RECV;
/* Avoid overflow in 16-bit computations */
l= d_start;
l += totlen+4;
l= (l+3) & ~3; /* align */
if (l >= RX_BUFSIZE)
{
l -= RX_BUFSIZE;
server_assert(l < RX_BUFSIZE);
}
rl_outw(port, RL_CAPR, l-RL_CAPR_DATA_OFF);
if (!from_int)
reply(rep, OK, FALSE);
return;
suspend:
if (from_int)
{
server_assert(rep->re_flags & REF_READING);
/* No need to store any state */
return;
}
rep->re_rx_mess= *mp;
server_assert(!(rep->re_flags & REF_READING));
rep->re_flags |= REF_READING;
reply(rep, OK, FALSE);
}
/*===========================================================================*
* rl_writev *
*===========================================================================*/
static void rl_writev(mp, from_int, vectored)
message *mp;
int from_int;
int vectored;
{
phys_bytes p, iov_src, phys_user;
int i, j, n, s, port, count, size;
int tx_head, re_client;
re_t *rep;
iovec_t *iovp;
int cps;
port = mp->DL_PORT;
count = mp->DL_COUNT;
if (port < 0 || port >= RE_PORT_NR)
server_panic("rtl8139","illegal port", port);
rep= &re_table[port];
re_client= mp->DL_PROC;
rep->re_client= re_client;
server_assert(rep->re_mode == REM_ENABLED);
server_assert(rep->re_flags & REF_ENABLED);
if (from_int)
{
server_assert(rep->re_flags & REF_SEND_AVAIL);
rep->re_flags &= ~REF_SEND_AVAIL;
rep->re_send_int= FALSE;
rep->re_tx_alive= TRUE;
}
tx_head= rep->re_tx_head;
if (rep->re_tx[tx_head].ret_busy)
{
server_assert(!(rep->re_flags & REF_SEND_AVAIL));
rep->re_flags |= REF_SEND_AVAIL;
if (rep->re_tx[tx_head].ret_busy)
goto suspend;
/* Race condition, the interrupt handler may clear re_busy
* before we got a chance to set REF_SEND_AVAIL. Checking
* ret_busy twice should be sufficient.
*/
#if 0
printf("rl_writev: race detected\n");
#endif
rep->re_flags &= ~REF_SEND_AVAIL;
rep->re_send_int= FALSE;
}
server_assert(!(rep->re_flags & REF_SEND_AVAIL));
server_assert(!(rep->re_flags & REF_PACK_SENT));
if (vectored)
{
if (OK != sys_umap(re_client, D, (vir_bytes)mp->DL_ADDR,
count * sizeof(rep->re_iovec[0]), &iov_src))
server_panic("rtl8139","umap_local failed", NO_NUM);
size= 0;
p= rep->re_tx[tx_head].ret_buf;
for (i= 0; i<count; i += IOVEC_NR,
iov_src += IOVEC_NR * sizeof(rep->re_iovec[0]))
{
n= IOVEC_NR;
if (i+n > count)
n= count-i;
cps = sys_physcopy(NONE, PHYS_SEG, iov_src, SELF, D, (vir_bytes) rep->re_iovec,
n * sizeof(rep->re_iovec[0]));
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
for (j= 0, iovp= rep->re_iovec; j<n; j++, iovp++)
{
@ -1248,11 +1305,11 @@ int vectored;
NO_NUM);
}
phys_user = numap_local(re_client, iovp->iov_addr, s);
if (!phys_user)
server_panic("rtl8139","umap_local failed\n",
NO_NUM);
phys_copy(phys_user, p, s);
if (OK != sys_umap(re_client, D, iovp->iov_addr, s, &phys_user))
server_panic("rtl8139","umap_local failed\n", NO_NUM);
cps = sys_abscopy(phys_user, p, s);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
size += s;
p += s;
}
@ -1265,12 +1322,12 @@ int vectored;
size= mp->DL_COUNT;
if (size < ETH_MIN_PACK_SIZE || size > ETH_MAX_PACK_SIZE_TAGGED)
server_panic("rtl8139","invalid packet size", size);
phys_user = numap_local(re_client, (vir_bytes)mp->DL_ADDR, size);
if (!phys_user)
if (OK != sys_umap(re_client, D, (vir_bytes)mp->DL_ADDR, size, &phys_user))
server_panic("rtl8139","umap_local failed\n", NO_NUM);
p= rep->re_tx[tx_head].ret_buf;
phys_copy(phys_user, p, size);
cps = sys_abscopy(phys_user, p, size);
if (cps != OK) printf("RTL8139: warning, sys_abscopy failed: %d\n", cps);
}
rl_outl(rep->re_base_port, RL_TSD0+tx_head*4,
@ -1422,7 +1479,7 @@ re_t *rep;
rep->re_link_up= link_up;
if (!link_up)
{
kprintf("%s: link down\n", (karg_t) rep->re_name);
printf("%s: link down\n", rep->re_name);
return;
}
@ -1491,7 +1548,7 @@ re_t *rep;
rep->re_name);
}
if (!(mii_status & MII_STATUS_LS))
kprintf("%s: link down\n", (karg_t) rep->re_name);
printf("%s: link down\n", rep->re_name);
if (mii_status & MII_STATUS_JD)
printf("%s: jabber condition detected\n", rep->re_name);
if (!(mii_status & MII_STATUS_EC))
@ -1520,9 +1577,9 @@ re_t *rep;
printf("\n");
resspeed:
kprintf("%s: ", (karg_t) rep->re_name);
kprintf("link up at %d Mbps, ", (msr & RL_MSR_SPEED_10) ? 10 : 100);
kprintf("%s duplex\n", (karg_t) ((mii_ctrl & MII_CTRL_DM) ? "full" : "half"));
printf("%s: ", rep->re_name);
printf("link up at %d Mbps, ", (msr & RL_MSR_SPEED_10) ? 10 : 100);
printf("%s duplex\n", ((mii_ctrl & MII_CTRL_DM) ? "full" : "half"));
}
@ -1779,9 +1836,7 @@ message *mp;
server_assert(rep->re_mode == REM_ENABLED);
server_assert(rep->re_flags & REF_ENABLED);
lock(); /* Interrupt handler updates stats */
stats= rep->re_stat;
unlock();
put_userdata(mp->DL_PROC, (vir_bytes) mp->DL_ADDR,
(vir_bytes) sizeof(stats), &stats);
@ -1854,13 +1909,9 @@ vir_bytes user_addr;
vir_bytes count;
void *loc_addr;
{
phys_bytes dst;
dst = numap_local(user_proc, user_addr, count);
if (!dst)
server_panic("rtl8139","umap_local failed", NO_NUM);
phys_copy(vir2phys(loc_addr), dst, (phys_bytes) count);
int cps;
cps = sys_datacopy(SELF, (vir_bytes) loc_addr, user_proc, user_addr, count);
if (cps != OK) printf("RTL8139: warning, scopy failed: %d\n", cps);
}
#if 0
@ -1959,12 +2010,27 @@ re_t *rep;
}
#endif
static int do_hard_int(void)
{
int i,s;
for (i=0; i < RE_PORT_NR; i ++) {
/* Run interrupt handler at driver level. */
rl_handler( &re_table[i]);
/* Reenable interrupts for this hook. */
if ((s=sys_irqenable(&re_table[i].re_hook_id)) != OK)
printf("RTL8139: error, couldn't enable interrupts: %d\n", s);
}
}
/*===========================================================================*
* rl_handler *
*===========================================================================*/
static int rl_handler(hookp)
irq_hook_t *hookp;
static int rl_handler(rep)
re_t *rep;
{
int i, port, tx_head, tx_tail, link_up;
u16_t isr, tsad;
@ -1972,12 +2038,12 @@ irq_hook_t *hookp;
#if 0
u8_t cr;
#endif
re_t *rep;
static int timeout; /* must be static if not cancelled */
int_event_check = FALSE; /* disable check by default */
RAND_UPDATE
rep= structof(re_t, re_hook, hookp);
port= rep->re_base_port;
@ -2004,7 +2070,7 @@ irq_hook_t *hookp;
{
rep->re_report_link= TRUE;
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
}
}
if (isr & RL_IMR_RXOVW)
@ -2014,7 +2080,7 @@ irq_hook_t *hookp;
/* Clear the receive buffer */
rep->re_clear_rx= TRUE;
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
}
if (isr & (RL_ISR_RER | RL_ISR_ROK))
@ -2024,7 +2090,7 @@ irq_hook_t *hookp;
if (!rep->re_got_int && (rep->re_flags & REF_READING))
{
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
}
}
#if 0
@ -2061,7 +2127,7 @@ irq_hook_t *hookp;
/* Just reset the whole chip */
rep->re_need_reset= TRUE;
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
#elif 0
/* Reset transmitter */
rep->re_stat.ets_transAb++;
@ -2093,7 +2159,7 @@ irq_hook_t *hookp;
printf("rl_handler: REF_SEND_AVAIL\n");
rep->re_send_int= TRUE;
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
}
for (i= 0; i< N_TX_BUF; i++)
rep->re_tx[i].ret_busy= FALSE;
@ -2226,7 +2292,7 @@ irq_hook_t *hookp;
if (!rep->re_got_int)
{
rep->re_got_int= TRUE;
notify(rl_tasknr, HARD_INT);
int_event_check = TRUE;
}
}
}
@ -2296,14 +2362,22 @@ timer_t *tp;
rep->re_need_reset= TRUE;
rep->re_got_int= TRUE;
#if __minix_vmd
notify(rl_tasknr, HARD_INT);
#if DEAD_CODE
notify(rl_tasknr, HARD_INT);
#else
check_int_events();
#endif
#else
/* Under MINIX, we got here via a synchronous alarm call.
* Change the message type to HARD_INT to fake an interrupt.
* The switch in the main loop 'falls through' if it sees
* the HARD_INT message type.
*/
#if DEAD_CODE
m.m_type = HARD_INT;
#else
check_int_events();
#endif
#endif
}
}

0
kernel/rtl8139.h → drivers/rtl8139/rtl8139.h
View file

10
include/minix/com.h
View file

@ -32,14 +32,13 @@
*/
/* Kernel tasks. These all run in the same address space. */
#define RTL8139 IDLE - ENABLE_RTL8139 /* networking */
#define IDLE -4 /* runs when no one else can run */
#define CLOCK -3 /* alarms and other clock functions */
#define SYSTASK -2 /* request system functionality */
#define HARDWARE -1 /* used as source on notify() messages */
/* Number of tasks. Note that NR_PROCS is defined in <minix/config.h>. */
#define NR_TASKS (4 + ENABLE_RTL8139)
#define NR_TASKS 4
/* Magic numbers for controllers. Device driver mapping is dynamic. */
#define CTRLR(n) (NONE + (n))
@ -53,15 +52,16 @@
#define AT_WINI (MEMORY + ENABLE_AT_WINI) /* AT Winchester */
#define FLOPPY (AT_WINI + ENABLE_FLOPPY) /* floppy disk */
#define PRINTER (FLOPPY + ENABLE_PRINTER) /* Centronics */
#define INIT_PROC_NR (PRINTER + 1) /* init -- goes multiuser */
#define USR8139 (PRINTER + ENABLE_RTL8139) /* Realtek RTL8139 */
#define INIT_PROC_NR (USR8139 + 1) /* init -- goes multiuser */
/* Number of first user process not part of the operating system. */
#define LOW_USER INIT_PROC_NR
/* The number of processes that are contained in the system image. */
/* Number of processes contained in the system image. */
#define IMAGE_SIZE (NR_TASKS + \
5 + ENABLE_AT_WINI + ENABLE_FLOPPY + \
ENABLE_PRINTER + 1 )
ENABLE_PRINTER + ENABLE_RTL8139 + 1 )
/*===========================================================================*

3
include/minix/devio.h
View file

@ -12,6 +12,9 @@
#include <minix/config.h> /* needed to include <minix/type.h> */
#include <sys/types.h> /* u8_t, u16_t, u32_t needed */
typedef u16_t port_t;
typedef U16_t Port_t;
/* We have different granularities of port I/O: 8, 16, 32 bits.
* Also see <ibm/portio.h>, which has functions for bytes, words,
* and longs. Hence, we need different (port,value)-pair types.

25
kernel/Makefile
View file

@ -22,8 +22,7 @@ HEAD = mpx.o
OBJS = start.o protect.o klibc.o klib.o table.o main.o proc.o \
i8259.o exception.o system.o clock.o misc.o \
dummy.o \
rtl8139.o pci.o pci_table.o
dummy.o
SYS = system/system.a
@ -136,28 +135,6 @@ table.o: proc.h
table.o: sendmask.h
table.o: $b/int86.h
rtl8139.o: $a
rtl8139.o: $h/com.h
rtl8139.o: $n/hton.h
rtl8139.o: $g/ether.h
rtl8139.o: $g/eth_io.h
rtl8139.o: $i/stddef.h
rtl8139.o: assert.h
rtl8139.o: pci.h
rtl8139.o: proc.h
rtl8139.o: rtl8139.h
pci.o: $a
pci.o: assert.h
pci.o: pci.h
pci.o: pci_amd.h
pci.o: pci_intel.h
pci.o: pci_via.h
pci.o: pci_sis.h
pci_table.o: $a
pci_table.o: pci.h
dummy.o: $a
system/system.a: $a $h/devio.h $h/com.h

1227
kernel/pci.c
View file

File diff suppressed because it is too large Load diff

97
kernel/pci.h
View file

@ -1,97 +0,0 @@
/*
pci.h
Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
*/
#define PCI_VID 0x00 /* Vendor ID, 16-bit */
#define PCI_DID 0x02 /* Device ID, 16-bit */
#define PCI_CR 0x04 /* Command Register, 16-bit */
#define PCI_PCISTS 0x06 /* PCI status, 16-bit */
#define PSR_SSE 0x4000 /* Signaled System Error */
#define PSR_RMAS 0x2000 /* Received Master Abort Status */
#define PSR_RTAS 0x1000 /* Received Target Abort Status */
#define PCI_PIFR 0x09 /* Prog. Interface Register */
#define PCI_SCR 0x0A /* Sub-Class Register */
#define PCI_BCR 0x0B /* Base-Class Register */
#define PCI_HEADT 0x0E /* Header type, 8-bit */
#define PHT_MULTIFUNC 0x80 /* Multiple functions */
#define PCI_BAR 0x10 /* Base Address Register */
#define PCI_ILR 0x3C /* Interrupt Line Register */
#define PCI_IPR 0x3D /* Interrupt Pin Register */
/* PCI bridge devices (AGP) */
#define PPB_SBUSN 0x19 /* Secondary Bus Number */
/* Intel compatible PCI bridge devices (AGP) */
#define PPB_SSTS 0x1E /* Secondary PCI-to-PCI Status Register */
#define NO_VID 0xffff /* No PCI card present */
struct pci_vendor
{
u16_t vid;
char *name;
};
struct pci_device
{
u16_t vid;
u16_t did;
char *name;
};
struct pci_baseclass
{
u8_t baseclass;
char *name;
};
struct pci_subclass
{
u8_t baseclass;
u8_t subclass;
u16_t infclass;
char *name;
};
struct pci_intel_ctrl
{
u16_t vid;
u16_t did;
};
struct pci_isabridge
{
u16_t vid;
u16_t did;
int checkclass;
int type;
};
struct pci_pcibridge
{
u16_t vid;
u16_t did;
int type;
};
#define PCI_IB_PIIX 1 /* Intel PIIX compatible ISA bridge */
#define PCI_IB_VIA 2 /* VIA compatible ISA bridge */
#define PCI_IB_AMD 3 /* AMD compatible ISA bridge */
#define PCI_IB_SIS 4 /* SIS compatible ISA bridge */
#define PCI_AGPB_INTEL 1 /* Intel compatible AGP bridge */
#define PCI_AGPB_VIA 2 /* VIA compatible AGP bridge */
extern struct pci_vendor pci_vendor_table[];
extern struct pci_device pci_device_table[];
extern struct pci_baseclass pci_baseclass_table[];
extern struct pci_subclass pci_subclass_table[];
extern struct pci_intel_ctrl pci_intel_ctrl[];
extern struct pci_isabridge pci_isabridge[];
extern struct pci_pcibridge pci_pcibridge[];
/*
* $PchId: pci.h,v 1.4 2001/12/06 20:21:22 philip Exp $
*/

21
kernel/pci_amd.h
View file

@ -1,21 +0,0 @@
/*
pci_amd.h
Created: Nov 2001 by Philip Homburg <philip@cs.vu.nl>
*/
#define AMD_ISABR_FUNC 3 /* Registers are in function 3 */
#define AMD_ISABR_PCIIRQ_LEV 0x54
#define AMD_PCILEV_INTA 0x1
#define AMD_PCILEV_INTB 0x2
#define AMD_PCILEV_INTC 4x2
#define AMD_PCILEV_INTD 4x8
#define AMD_ISABR_PCIIRQ_ROUTE 0x56
#define AMD_PCIIRQ_INTA_MASK 0x000F
#define AMD_PCIIRQ_INTB_MASK 0x00F0
#define AMD_PCIIRQ_INTC_MASK 0x0F00
#define AMD_PCIIRQ_INTD_MASK 0xF000
/*
* $PchId: pci_amd.h,v 1.1 2001/11/09 19:57:37 philip Exp $
*/

58
kernel/pci_intel.h
View file

@ -1,58 +0,0 @@
/*
pci_intel.h
Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
*/
#define PCII_CONFADD 0xCF8
#define PCIIC_CODE 0x80000000
#define PCIIC_BUSNUM_MASK 0xff0000
#define PCIIC_BUSNUM_SHIFT 16
#define PCIIC_DEVNUM_MASK 0xf800
#define PCIIC_DEVNUM_SHIFT 11
#define PCIIC_FUNCNUM_MASK 0x700
#define PCIIC_FUNCNUM_SHIFT 8
#define PCIIC_REGNUM_MASK 0xfc
#define PCIIC_REGNUM_SHIFT 2
#define PCII_CONFDATA 0xCFC
#define PCII_SELREG_(bus, dev, func, reg) \
(PCIIC_CODE | \
(((bus) << PCIIC_BUSNUM_SHIFT) & PCIIC_BUSNUM_MASK) | \
(((dev) << PCIIC_DEVNUM_SHIFT) & PCIIC_DEVNUM_MASK) | \
(((func) << PCIIC_FUNCNUM_SHIFT) & PCIIC_FUNCNUM_MASK) | \
((((reg)/4) << PCIIC_REGNUM_SHIFT) & PCIIC_REGNUM_MASK))
#define PCII_UNSEL (0)
#define PCII_RREG8_(bus, dev, func, reg) \
(outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
inb(PCII_CONFDATA+((reg)&3)))
#define PCII_RREG16_(bus, dev, func, reg) \
(PCII_RREG8_(bus, dev, func, reg) | \
(PCII_RREG8_(bus, dev, func, reg+1) << 8))
#define PCII_RREG32_(bus, dev, func, reg) \
(PCII_RREG16_(bus, dev, func, reg) | \
(PCII_RREG16_(bus, dev, func, reg+2) << 16))
#define PCII_WREG8_(bus, dev, func, reg, val) \
(outl(PCII_CONFADD, PCII_SELREG_(bus, dev, func, reg)), \
outb(PCII_CONFDATA+((reg)&3), (val)))
#define PCII_WREG16_(bus, dev, func, reg, val) \
(PCII_WREG8_(bus, dev, func, reg, (val)), \
(PCII_WREG8_(bus, dev, func, reg+1, (val) >> 8)))
#define PCII_WREG32_(bus, dev, func, reg, val) \
(PCII_WREG16_(bus, dev, func, reg, (val)), \
(PCII_WREG16_(bus, dev, func, reg+2, (val) >> 16)))
/* PIIX configuration registers */
#define PIIX_PIRQRCA 0x60
#define PIIX_IRQ_DI 0x80
#define PIIX_IRQ_MASK 0x0F
/* PIIX extensions to the PIC */
#define PIIX_ELCR1 0x4D0
#define PIIX_ELCR2 0x4D1
/*
* $PchId: pci_intel.h,v 1.1 2000/08/12 11:20:17 philip Exp $
*/

17
kernel/pci_sis.h
View file

@ -1,17 +0,0 @@
/*
pci_sis.h
Created: Nov 2001 by Philip Homburg <philip@cs.vu.nl>
*/
/* Constants are taken from pci-irq.c in the Linux kernel source */
#define SIS_ISABR_IRQ_A 0x41 /* IRQA routing */
#define SIS_ISABR_IRQ_B 0x42 /* IRQB routing */
#define SIS_ISABR_IRQ_C 0x43 /* IRQC routing */
#define SIS_ISABR_IRQ_D 0x44 /* IRQD routing */
#define SIS_IRQ_DISABLED 0x80
#define SIS_IRQ_MASK 0x0F
/*
* $PchId: pci_sis.h,v 1.1 2001/12/06 20:22:52 philip Exp $
*/

251
kernel/pci_table.c
View file

@ -1,251 +0,0 @@
/*
pci_table.c
Tables with PCI vendor and device identifiers
Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
See the Linux PCI ID Repository <http://pciids.sourceforge.net/>.
*/
/* Changes from original Minix 2.0.4 version (2003-09-05):
* 2003-11-30 (kjb) Minix 2.0.4 FIX.TAZ add D-Link RTL8139 (0x1186, 0x1300)
* 2004-08-08 (asw) add Intel 82371AB (0x8086, 0x7100)
*/
#include "kernel.h"
#include "pci.h"
#if __minix_vmd
#include "config.h"
#endif
#if ENABLE_PCI
struct pci_vendor pci_vendor_table[]=
{
{ 0x1000, "NCR" },
{ 0x1002, "ATI Technologies" },
{ 0x100B, "National Semiconductor Corporation" },
{ 0x1013, "Cirrus Logic" },
{ 0x1022, "Advanced Micro Devices" },
{ 0x102B, "Matrox Graphics, Inc." },
{ 0x1039, "Silicon Integrated Systems (SiS)" },
{ 0x104C, "Texas Instruments" },
{ 0x105A, "Promise Technology" },
{ 0x10B7, "3Com Corporation" },
{ 0x10B9, "AcerLabs (ALI)" },
{ 0x10DE, "nVidia Corporation" },
{ 0x10EC, "Realtek" },
{ 0x1106, "VIA" },
{ 0x110A, "Siemens Nixdorf AG" },
{ 0x125D, "ESS Technology" },
{ 0x1274, "Ensoniq" },
{ 0x5333, "S3" },
{ 0x8086, "Intel" },
{ 0x9004, "Adaptec" },
{ 0x9005, "Adaptec" },
{ 0x0000, NULL }
};
struct pci_device pci_device_table[]=
{
{ 0x1000, 0x0001, "NCR 53C810" },
{ 0x1000, 0x000F, "NCR 53C875" },
{ 0x1002, 0x4752, "ATI Rage XL PCI" },
{ 0x100B, 0xD001, "Nat. Semi. 87410" },
{ 0x1013, 0x00B8, "Cirrus Logic GD 5446" },
{ 0x1013, 0x6003, "Cirrus Logic CS4614/22/24 CrystalClear" },
{ 0x1022, 0x700C, "AMD-762 CPU to PCI Bridge (SMP chipset)" },
{ 0x1022, 0x700D, "AMD-762 CPU to PCI Bridge (AGP 4x)" },
{ 0x1022, 0x7410, "AMD-766 PCI to ISA/LPC Bridge" },
{ 0x1022, 0x7411, "AMD-766 EIDE Controller" },
{ 0x102B, 0x051B, "Matrox MGA 2164W [Millennium II]" },
{ 0x102B, 0x0525, "Matrox MGA G400 AGP" },
{ 0x1039, 0x0008, "SiS 85C503/5513" },
{ 0x1039, 0x0200, "SiS 5597/5598 VGA" },
{ 0x1039, 0x0406, "SiS 85C501/2" },
{ 0x1039, 0x5597, "SiS 5582" },
{ 0x104C, 0xAC1C, "TI PCI1225" },
{ 0x105A, 0x0D30, "Promise Technology 20265" },
{ 0x10B7, 0x9058, "3Com 3c905B-Combo" },
{ 0x10B7, 0x9805, "3Com 3c980-TX Python-T" },
{ 0x10B9, 0x1533, "ALI M1533 ISA-bridge [Aladdin IV]" },
{ 0x10B9, 0x1541, "ALI M1541" },
{ 0x10B9, 0x5229, "ALI M5229 (IDE)" },
{ 0x10B9, 0x5243, "ALI M5243" },
{ 0x10B9, 0x7101, "ALI M7101 PMU" },
{ 0x10DE, 0x0020, "nVidia Riva TnT [NV04]" },
{ 0x10DE, 0x0110, "nVidia GeForce2 MX [NV11]" },
{ 0x10EC, 0x8029, "Realtek RTL8029" },
{ 0x10EC, 0x8139, "Realtek RTL8139" },
{ 0x1106, 0x0305, "VIA VT8363/8365 [KT133/KM133]" },
{ 0x1106, 0x0571, "VIA IDE controller" },
{ 0x1106, 0x0686, "VIA VT82C686 (Apollo South Bridge)" },
{ 0x1106, 0x3038, "VT83C572 PCI USB Controller" },
{ 0x1106, 0x3057, "VT82C686A ACPI Power Management Controller" },
{ 0x1106, 0x3058, "VIA AC97 Audio Controller" },
{ 0x1106, 0x3059, "VIA AC97 Audio Controller" },
{ 0x1106, 0x3074, "VIA VT8233" },
{ 0x1106, 0x3099, "VIA VT8367 [KT266]" },
{ 0x1106, 0x8305, "VIA VT8365 [KM133 AGP]" },
{ 0x1106, 0xB099, "VIA VT8367 [KT266 AGP]" },
{ 0x110A, 0x0005, "Siemens Nixdorf Tulip Cntlr., Power Management" },
{ 0x1186, 0x1300, "D-Link RTL8139" },
{ 0x125D, 0x1969, "ESS ES1969 Solo-1 Audiodrive" },
{ 0x1274, 0x1371, "Ensoniq ES1371 [AudioPCI-97]" },
{ 0x1274, 0x5000, "Ensoniq ES1370" },
{ 0x1274, 0x5880, "Ensoniq CT5880 [AudioPCI]" },
{ 0x5333, 0x8811, "S3 86c764/765 [Trio32/64/64V+]" },
{ 0x5333, 0x883d, "S3 Virge/VX" },
{ 0x5333, 0x88d0, "S3 Vision 964 vers 0" },
{ 0x5333, 0x8a01, "S3 Virge/DX or /GX" },
{ 0x8086, 0x1004, "Intel 82543GC Gigabit Ethernet Controller" },
{ 0x8086, 0x1229, "Intel 82557" },
{ 0x8086, 0x122D, "Intel 82437FX" },
{ 0x8086, 0x122E, "Intel 82371FB (PIIX)" },
{ 0x8086, 0x1230, "Intel 82371FB (IDE)" },
{ 0x8086, 0x1237, "Intel 82441FX (440FX)" },
{ 0x8086, 0x1250, "Intel 82439HX" },
{ 0x8086, 0x7000, "Intel 82371SB" },
{ 0x8086, 0x7010, "Intel 82371SB (IDE)" },
{ 0x8086, 0x7020, "Intel 82371SB (USB)" },
{ 0x8086, 0x7100, "Intel 82371AB" },
{ 0x8086, 0x7110, "Intel 82371AB (PIIX4)" },
{ 0x8086, 0x7111, "Intel 82371AB (IDE)" },
{ 0x8086, 0x7112, "Intel 82371AB (USB)" },
{ 0x8086, 0x7113, "Intel 82371AB (Power)" },
{ 0x8086, 0x7190, "Intel 82443BX" },
{ 0x8086, 0x7191, "Intel 82443BX (AGP bridge)" },
{ 0x9004, 0x8178, "Adaptec AHA-2940U/2940UW Ultra/Ultra-Wide SCSI Ctrlr" },
{ 0x9005, 0x0080, "Adaptec AIC-7892A Ultra160/m PCI SCSI Controller" },
{ 0x0000, 0x0000, NULL }
};
struct pci_baseclass pci_baseclass_table[]=
{
{ 0x00, "No device class" },
{ 0x01, "Mass storage controller" },
{ 0x02, "Network controller" },
{ 0x03, "Display controller" },
{ 0x04, "Multimedia device" },
{ 0x05, "Memory controller" },
{ 0x06, "Bridge device" },
{ 0x07, "Simple comm. controller" },
{ 0x08, "Base system peripheral" },
{ 0x09, "Input device" },
{ 0x0A, "Docking station" },
{ 0x0B, "Processor" },
{ 0x0C, "Serial bus controller" },
{ 0x0d, "Wireless controller" },
{ 0x0e, "Intelligent I/O controller" },
{ 0x0f, "Satellite comm. controller" },
{ 0x10, "Encryption/decryption controller" },
{ 0x11, "Data acquisition controller" },
{ 0xff, "Misc. device" },
{ 0x00, NULL }
};
/* -1 in the infclass field is a wildcard for infclass */
struct pci_subclass pci_subclass_table[]=
{
{ 0x00, 0x01, 0x00, "VGA-compatible device" },
{ 0x01, 0x00, 0x00, "SCSI bus controller" },
{ 0x01, 0x01, -1, "IDE controller" },
{ 0x01, 0x02, 0x00, "Floppy disk controller" },
{ 0x01, 0x03, 0x00, "IPI controller" },
{ 0x01, 0x04, 0x00, "RAID controller" },
{ 0x01, 0x80, 0x00, "Other mass storage controller" },
{ 0x02, 0x00, 0x00, "Ethernet controller" },
{ 0x02, 0x01, 0x00, "Token Ring controller" },
{ 0x02, 0x02, 0x00, "FDDI controller" },
{ 0x02, 0x03, 0x00, "ATM controller" },
{ 0x02, 0x04, 0x00, "ISDN controller" },
{ 0x02, 0x80, 0x00, "Other network controller" },
{ 0x03, 0x00, 0x00, "VGA-compatible controller" },
{ 0x03, 0x00, 0x01, "8514-compatible controller" },
{ 0x03, 0x01, 0x00, "XGA controller" },
{ 0x03, 0x02, 0x00, "3D controller" },
{ 0x03, 0x80, 0x00, "Other display controller" },
{ 0x04, 0x00, 0x00, "Video device" },
{ 0x04, 0x01, 0x00, "Audio device" },
{ 0x04, 0x02, 0x00, "Computer telephony device" },
{ 0x04, 0x80, 0x00, "Other multimedia device" },
{ 0x06, 0x00, 0x00, "Host bridge" },
{ 0x06, 0x01, 0x00, "ISA bridge" },
{ 0x06, 0x02, 0x00, "EISA bridge" },
{ 0x06, 0x03, 0x00, "MCA bridge" },
{ 0x06, 0x04, 0x00, "PCI-to-PCI bridge" },
{ 0x06, 0x04, 0x01, "Subtractive decode PCI-to-PCI bridge" },
{ 0x06, 0x05, 0x00, "PCMCIA bridge" },
{ 0x06, 0x06, 0x00, "NuBus bridge" },
{ 0x06, 0x07, 0x00, "CardBus bridge" },
{ 0x06, 0x08, -1, "RACEway bridge" },
{ 0x06, 0x09, -1, "Semi-transparent PCI-to-PCI bridge" },
{ 0x06, 0x80, 0x00, "Other bridge device" },
{ 0x0C, 0x00, 0x00, "IEEE 1394 (FireWire)" },
{ 0x0C, 0x00, 0x10, "IEEE 1394 (OpenHCI)" },
{ 0x0C, 0x01, 0x00, "ACCESS bus" },
{ 0x0C, 0x02, 0x00, "SSA" },
{ 0x0C, 0x03, 0x00, "USB (with UHC)" },
{ 0x0C, 0x03, 0x10, "USB (with OHC)" },
{ 0x0C, 0x03, 0x80, "USB (other host inf.)" },
{ 0x0C, 0x03, 0xFE, "USB device" },
{ 0x0C, 0x04, 0x00, "Fibre Channel" },
{ 0x0C, 0x05, 0x00, "SMBus" },
{ 0x00, 0x00, 0x00, NULL }
};
struct pci_intel_ctrl pci_intel_ctrl[]=
{
{ 0x1022, 0x700C, }, /* AMD-762 */
{ 0x1039, 0x0406, }, /* SiS 85C501/2 */
{ 0x1039, 0x5597, }, /* SiS 5582 */
{ 0x10B9, 0x1541, }, /* ALI M1541 */
{ 0x1106, 0x0305, }, /* VIA VT8363/8365 */
{ 0x1106, 0x3099, }, /* VIA VT8367 [KT266] */
{ 0x1106, 0x3188, }, /* VIA */
{ 0x1106, 0x0204, }, /* VIA VT8367 [KT266] */
{ 0x8086, 0x122D, }, /* Intel 82437FX */
{ 0x8086, 0x1237, }, /* Intel 82441FX */
{ 0x8086, 0x1250, }, /* Intel 82439HX */
{ 0x8086, 0x7100, }, /* Intel 82371AB */
{ 0x8086, 0x7190, }, /* Intel 82443BX */
{ 0x0000, 0x0000, },
};
struct pci_isabridge pci_isabridge[]=
{
{ 0x1022, 0x7410, 1, PCI_IB_AMD, }, /* AMD-766 */
{ 0x1039, 0x0008, 1, PCI_IB_SIS, }, /* SiS 85C503/5513 */
{ 0x10B9, 0x1533, 1, PCI_IB_PIIX, }, /* ALI M1533 */
{ 0x1106, 0x0686, 1, PCI_IB_VIA, }, /* VIA VT82C686 */
{ 0x1106, 0x3074, 1, PCI_IB_VIA, }, /* VIA VT8233 */
{ 0x1106, 0x3227, 1, PCI_IB_VIA, }, /* VIA */
{ 0x8086, 0x122E, 1, PCI_IB_PIIX, }, /* Intel 82371FB */
{ 0x8086, 0x7000, 1, PCI_IB_PIIX, }, /* Intel 82371SB */
{ 0x8086, 0x7100, 1, PCI_IB_PIIX, }, /* Intel 82371AB */
{ 0x8086, 0x7110, 1, PCI_IB_PIIX, }, /* Intel PIIX4 */
{ 0x0000, 0x0000, 0, 0, },
};
struct pci_pcibridge pci_pcibridge[]=
{
{ 0x8086, 0x7191, PCI_AGPB_INTEL, }, /* Intel 82443BX (AGP bridge) */
{ 0x1022, 0x700D, PCI_AGPB_INTEL, }, /* AMD-762 (AGP 4x) */
{ 0x10B9, 0x5243, PCI_AGPB_INTEL, }, /* ALI M5243 */
{ 0x1106, 0x8305, PCI_AGPB_VIA, }, /* VIA VT8365 [KM133 AGP] */
{ 0x0000, 0x0000, 0, },
};
#endif /* ENABLE_PCI */
/*
* $PchId: pci_table.c,v 1.7 2003/09/05 10:53:22 philip Exp $
*/

27
kernel/pci_via.h
View file

@ -1,27 +0,0 @@
/*
pci_via.h
Created: Jun 2001 by Philip Homburg <philip@cs.vu.nl>
*/
#define VIA_ISABR_EL 0x54 /* Edge or level triggered */
#define VIA_ISABR_EL_INTA 0x08 /* Edge (1) or level (0) */
#define VIA_ISABR_EL_INTB 0x04
#define VIA_ISABR_EL_INTC 0x02
#define VIA_ISABR_EL_INTD 0x01
#define VIA_ISABR_IRQ_R1 0x55 /* IRQ routing 1 */
#define VIA_ISABR_IRQ_INTD 0xf0 /* routing for INTD */
#define VIA_ISABR_IRQ_INT0 0x0f /* routing for INT0 */
#define VIA_ISABR_IRQ_R2 0x56 /* IRQ routing 2 */
#define VIA_ISABR_IRQ_INTA 0xf0 /* routing for INTA */
#define VIA_ISABR_IRQ_INTB 0x0f /* routing for INTB */
#define VIA_ISABR_IRQ_R3 0x57 /* IRQ routing 3 */
#define VIA_ISABR_IRQ_INTC 0xf0 /* routing for INTC */
#define VIA_ISABR_IRQ_INT1 0x0f /* routing for INT1 */
#define VIA_ISABR_IRQ_R4 0x58 /* IRQ routing 4 */
#define VIA_ISABR_IRQ_INT2 0x0f /* routing for INT2 */
/*
* $PchId: pci_via.h,v 1.1 2001/06/20 15:50:25 philip Exp $
*/

40
kernel/proto.h
View file

@ -4,9 +4,6 @@
#define PROTO_H
/* Struct declarations. */
#if TEMP_CODE
struct dpeth;
#endif
struct proc;
struct time_info;
struct timer;
@ -46,32 +43,6 @@ _PROTOTYPE( void stop_sequence, (struct timer *tp) );
/* misc.c */
_PROTOTYPE( void panic, (_CONST char *s, int n) );
#if TEMP_CODE
#if ENABLE_PCI
/* pci.c */
_PROTOTYPE( void pci_init, (void) );
_PROTOTYPE( int pci_find_dev, (U8_t bus, U8_t dev, U8_t func,
int *devindp) );
_PROTOTYPE( int pci_first_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( int pci_next_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( void pci_reserve, (int devind) );
_PROTOTYPE( void pci_ids, (int devind, u16_t *vidp, u16_t *didp) );
_PROTOTYPE( char *pci_slot_name, (int devind) );
_PROTOTYPE( char *pci_dev_name, (U16_t vid, U16_t did) );
_PROTOTYPE( u8_t pci_attr_r8, (int devind, int port) );
_PROTOTYPE( u16_t pci_attr_r16, (int devind, int port) );
_PROTOTYPE( u32_t pci_attr_r32, (int devind, int port) );
_PROTOTYPE( void pci_attr_w16, (int devind, int port, U16_t value) );
_PROTOTYPE( void pci_attr_w32, (int devind, int port, u32_t value) );
/* rtl8029.c */
_PROTOTYPE( int rtl_probe, (struct dpeth *dep) );
#endif /* ENABLE_PCI */
/* rtl8139.c */
_PROTOTYPE( void rtl8139_task, (void) );
#endif /* TEMP_CODE */
/* proc.c */
_PROTOTYPE( int sys_call, (int function, int src_dest, message *m_ptr) );
_PROTOTYPE( void notify, (int proc_nr, int notify_type) );
@ -102,9 +73,6 @@ _PROTOTYPE( phys_bytes umap_bios, (struct proc *rp, vir_bytes vir_addr,
vir_bytes bytes) );
_PROTOTYPE( int generic_handler, (irq_hook_t *hook) );
/* table.c */
_PROTOTYPE( void mapdrivers, (void) );
#if (CHIP == INTEL)
/* exception.c */
@ -124,10 +92,10 @@ _PROTOTYPE( int disable_irq, (irq_hook_t *hook) );
_PROTOTYPE( u16_t mem_rdw, (U16_t segm, vir_bytes offset) );
_PROTOTYPE( void phys_copy, (phys_bytes source, phys_bytes dest,
phys_bytes count) );
_PROTOTYPE( void phys_insb, (Port_t port, phys_bytes buf, size_t count) );
_PROTOTYPE( void phys_insw, (Port_t port, phys_bytes buf, size_t count) );
_PROTOTYPE( void phys_outsb, (Port_t port, phys_bytes buf, size_t count));
_PROTOTYPE( void phys_outsw, (Port_t port, phys_bytes buf, size_t count));
_PROTOTYPE( void phys_insb, (U16_t port, phys_bytes buf, size_t count) );
_PROTOTYPE( void phys_insw, (U16_t port, phys_bytes buf, size_t count) );
_PROTOTYPE( void phys_outsb, (U16_t port, phys_bytes buf, size_t count));
_PROTOTYPE( void phys_outsw, (U16_t port, phys_bytes buf, size_t count));
_PROTOTYPE( void reset, (void) );
_PROTOTYPE( void level0, (void (*func)(void)) );
_PROTOTYPE( void monitor, (void) );

6
kernel/sendmask.h
View file

@ -54,11 +54,7 @@
allow_all_mask
#define RTL8139_SENDMASK \
deny_all_mask \
allow(1, USER_PROC_NR) /* inet server starts as user process */ \
allow(1, TTY) /* need to register function key */ \
allow(1, SYSTASK) /* need system functionality */ \
allow(1, CLOCK) /* need clock functionality */
allow_all_mask
#define IDLE_SENDMASK \
deny_all_mask

2
kernel/system/sysctl.c
View file

@ -99,7 +99,7 @@ message *m_ptr; /* pointer to request message */
case SYSSENDMASK: {
rp->p_type = P_SERVER;
rp->p_sendmask = ALLOW_ALL_MASK;
send_mask_allow(proc_addr(RTL8139)->p_sendmask, proc_nr);
send_mask_allow(proc_addr(USR8139)->p_sendmask, proc_nr);
send_mask_allow(proc_addr(PM_PROC_NR)->p_sendmask, proc_nr);
send_mask_allow(proc_addr(FS_PROC_NR)->p_sendmask, proc_nr);
send_mask_allow(proc_addr(IS_PROC_NR)->p_sendmask, proc_nr);

10
kernel/table.c
View file

@ -47,11 +47,9 @@
#define HARDWARE_STACK NO_STACK /* dummy task, uses kernel stack */
#define SYS_STACK SMALL_STACK
#define CLOCK_STACK SMALL_STACK
#define RTL8139_STACK (2 * SMALL_STACK * ENABLE_RTL8139)
/* Stack space for all the task stacks. Declared as (char *) to align it. */
#define TOT_STACK_SPACE (IDLE_STACK + HARDWARE_STACK + CLOCK_STACK + SYS_STACK \
+ RTL8139_STACK )
#define TOT_STACK_SPACE (IDLE_STACK+HARDWARE_STACK+CLOCK_STACK+SYS_STACK )
PUBLIC char *t_stack[TOT_STACK_SPACE / sizeof(char *)];
@ -63,9 +61,6 @@ PUBLIC char *t_stack[TOT_STACK_SPACE / sizeof(char *)];
* routine and stack size is also provided.
*/
PUBLIC struct system_image image[] = {
#if ENABLE_RTL8139
{ RTL8139, rtl8139_task, P_TASK, PPRI_TASK, RTL8139_STACK, RTL8139_SENDMASK, "RTL8139" },
#endif
{ IDLE, idle_task, P_IDLE, PPRI_IDLE, IDLE_STACK, IDLE_SENDMASK, "IDLE" },
{ CLOCK, clock_task, P_TASK, PPRI_TASK, CLOCK_STACK, CLOCK_SENDMASK, "CLOCK" },
{ SYSTASK, sys_task, P_TASK, PPRI_TASK, SYS_STACK, SYSTEM_SENDMASK, "SYS" },
@ -83,6 +78,9 @@ PUBLIC struct system_image image[] = {
#endif
#if ENABLE_PRINTER
{ PRINTER, 0, P_DRIVER, PPRI_NORMAL, 0, PRN_SENDMASK, "PRINTER" },
#endif
#if ENABLE_RTL8139
{ USR8139, 0, P_DRIVER, PPRI_HIGH, 0, RTL8139_SENDMASK, "RTL8139" },
#endif
{ INIT_PROC_NR, 0, P_USER, PPRI_USER, 0, INIT_SENDMASK, "INIT" },
};

2
kernel/type.h
View file

@ -28,8 +28,6 @@ struct memory {
#if (CHIP == INTEL)
typedef u16_t port_t;
typedef U16_t Port_t;
typedef unsigned reg_t; /* machine register */
/* The stack frame layout is determined by the software, but for efficiency

2
servers/is/dmp.c
View file

@ -203,7 +203,7 @@ PRIVATE void irqtab_dmp()
continue;
}
printf("%10d ", e->proc_nr);
printf(" %9.9s (%02d) ", irq[i], i);
printf(" %9.9s (%02d) ", irq[e->irq], e->irq);
printf(" %s\n", (e->policy & IRQ_REENABLE) ? "reenable" : "-");
}
printf("\n");

1
tools/Makefile
View file

@ -16,6 +16,7 @@ PROGRAMS= ../kernel/kernel \
../drivers/at_wini/at_wini \
../drivers/floppy/floppy \
../drivers/printer/printer \
../drivers/rtl8139/rtl8139 \
../servers/init/init \
#bootfs.img