Many changes for cardbus support, automatic detection of PCI bridges,
resource allocation, and tracking.
This commit is contained in:
Philip Homburg
parent
ac7f7f3022
commit
e44aaf4c37
|
|
@ -6,6 +6,16 @@ main.c
|
|||
|
||||
#include <ibm/pci.h>
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#define NR_DRIVERS 16
|
||||
|
||||
PRIVATE struct name
|
||||
{
|
||||
char name[M3_STRING];
|
||||
int tasknr;
|
||||
} names[NR_DRIVERS];
|
||||
|
||||
FORWARD _PROTOTYPE( void do_init, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_first_dev, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_next_dev, (message *mp) );
|
||||
|
|
@ -15,18 +25,23 @@ FORWARD _PROTOTYPE( void do_dev_name, (message *mp) );
|
|||
FORWARD _PROTOTYPE( void do_slot_name, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_reserve, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_r8, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_r16, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_r32, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_w8, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_w16, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_attr_w32, (message *mp) );
|
||||
FORWARD _PROTOTYPE( void do_rescan_bus, (message *mp) );
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int r;
|
||||
int i, r;
|
||||
message m;
|
||||
|
||||
printf("PCI says: hello world\n");
|
||||
|
||||
pci_init();
|
||||
|
||||
for (i= 0; i<NR_DRIVERS; i++)
|
||||
names[i].tasknr= ANY;
|
||||
|
||||
for(;;)
|
||||
{
|
||||
r= receive(ANY, &m);
|
||||
|
|
@ -46,10 +61,14 @@ int main(void)
|
|||
case BUSC_PCI_SLOT_NAME: do_slot_name(&m); break;
|
||||
case BUSC_PCI_RESERVE: do_reserve(&m); break;
|
||||
case BUSC_PCI_ATTR_R8: do_attr_r8(&m); break;
|
||||
case BUSC_PCI_ATTR_R16: do_attr_r16(&m); break;
|
||||
case BUSC_PCI_ATTR_R32: do_attr_r32(&m); break;
|
||||
case BUSC_PCI_ATTR_W8: do_attr_w8(&m); break;
|
||||
case BUSC_PCI_ATTR_W16: do_attr_w16(&m); break;
|
||||
case BUSC_PCI_ATTR_W32: do_attr_w32(&m); break;
|
||||
case BUSC_PCI_RESCAN: do_rescan_bus(&m); break;
|
||||
default:
|
||||
printf("got message from %d, type %d\n",
|
||||
printf("PCI: got message from %d, type %d\n",
|
||||
m.m_source, m.m_type);
|
||||
break;
|
||||
}
|
||||
|
|
@ -61,9 +80,25 @@ int main(void)
|
|||
PRIVATE void do_init(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r;
|
||||
int i, r, empty;
|
||||
|
||||
/* NOP for the moment */
|
||||
printf("pci_init: called by '%s'\n", mp->m3_ca1);
|
||||
empty= -1;
|
||||
for (i= 0; i<NR_DRIVERS; i++)
|
||||
{
|
||||
if (empty == -1 && names[i].tasknr == ANY)
|
||||
empty= i;
|
||||
if (strcmp(names[i].name, mp->m3_ca1) == 0)
|
||||
break;
|
||||
}
|
||||
if (i < NR_DRIVERS)
|
||||
pci_release(names[i].name);
|
||||
else
|
||||
{
|
||||
i= empty;
|
||||
strcpy(names[i].name, mp->m3_ca1);
|
||||
}
|
||||
names[i].tasknr= mp->m_source;
|
||||
|
||||
mp->m_type= 0;
|
||||
r= send(mp->m_source, mp);
|
||||
|
|
@ -225,11 +260,24 @@ message *mp;
|
|||
PRIVATE void do_reserve(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r, devind;
|
||||
int i, r, devind;
|
||||
|
||||
/* Find the name of the caller */
|
||||
for (i= 0; i<NR_DRIVERS; i++)
|
||||
{
|
||||
if (names[i].tasknr == mp->m_source)
|
||||
break;
|
||||
}
|
||||
if (i >= NR_DRIVERS)
|
||||
{
|
||||
printf("pci`do_reserve: task %d did not call pci_init\n",
|
||||
mp->m_source);
|
||||
return;
|
||||
}
|
||||
|
||||
devind= mp->m1_i1;
|
||||
|
||||
pci_reserve(devind);
|
||||
pci_reserve2(devind, names[i].name);
|
||||
mp->m_type= OK;
|
||||
r= send(mp->m_source, mp);
|
||||
if (r != 0)
|
||||
|
|
@ -259,6 +307,26 @@ message *mp;
|
|||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_attr_r16(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r, devind, port;
|
||||
u32_t v;
|
||||
|
||||
devind= mp->m2_i1;
|
||||
port= mp->m2_i2;
|
||||
|
||||
v= pci_attr_r16(devind, port);
|
||||
mp->m2_l1= v;
|
||||
mp->m_type= OK;
|
||||
r= send(mp->m_source, mp);
|
||||
if (r != 0)
|
||||
{
|
||||
printf("do_attr_r16: unable to send to %d: %d\n",
|
||||
mp->m_source, r);
|
||||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_attr_r32(mp)
|
||||
message *mp;
|
||||
{
|
||||
|
|
@ -279,6 +347,46 @@ message *mp;
|
|||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_attr_w8(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r, devind, port;
|
||||
u8_t v;
|
||||
|
||||
devind= mp->m2_i1;
|
||||
port= mp->m2_i2;
|
||||
v= mp->m2_l1;
|
||||
|
||||
pci_attr_w8(devind, port, v);
|
||||
mp->m_type= OK;
|
||||
r= send(mp->m_source, mp);
|
||||
if (r != 0)
|
||||
{
|
||||
printf("do_attr_w8: unable to send to %d: %d\n",
|
||||
mp->m_source, r);
|
||||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_attr_w16(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r, devind, port;
|
||||
u16_t v;
|
||||
|
||||
devind= mp->m2_i1;
|
||||
port= mp->m2_i2;
|
||||
v= mp->m2_l1;
|
||||
|
||||
pci_attr_w16(devind, port, v);
|
||||
mp->m_type= OK;
|
||||
r= send(mp->m_source, mp);
|
||||
if (r != 0)
|
||||
{
|
||||
printf("do_attr_w16: unable to send to %d: %d\n",
|
||||
mp->m_source, r);
|
||||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_attr_w32(mp)
|
||||
message *mp;
|
||||
{
|
||||
|
|
@ -299,3 +407,20 @@ message *mp;
|
|||
}
|
||||
}
|
||||
|
||||
PRIVATE void do_rescan_bus(mp)
|
||||
message *mp;
|
||||
{
|
||||
int r, busnr;
|
||||
|
||||
busnr= mp->m2_i1;
|
||||
|
||||
pci_rescan_bus(busnr);
|
||||
mp->m_type= OK;
|
||||
r= send(mp->m_source, mp);
|
||||
if (r != 0)
|
||||
{
|
||||
printf("do_rescan_bus: unable to send to %d: %d\n",
|
||||
mp->m_source, r);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -13,39 +13,6 @@ _PROTOTYPE( void pci_outb, (U16_t port, U8_t value) );
|
|||
_PROTOTYPE( void pci_outw, (U16_t port, U16_t value) );
|
||||
_PROTOTYPE( void pci_outl, (U16_t port, U32_t value) );
|
||||
|
||||
|
||||
#define PCI_VID 0x00 /* Vendor ID, 16-bit */
|
||||
#define PCI_DID 0x02 /* Device ID, 16-bit */
|
||||
#define PCI_CR 0x04 /* Command Register, 16-bit */
|
||||
#define PCI_PCISTS 0x06 /* PCI status, 16-bit */
|
||||
#define PSR_SSE 0x4000 /* Signaled System Error */
|
||||
#define PSR_RMAS 0x2000 /* Received Master Abort Status */
|
||||
#define PSR_RTAS 0x1000 /* Received Target Abort Status */
|
||||
#define PCI_REV 0x08 /* Revision ID */
|
||||
#define PCI_PIFR 0x09 /* Prog. Interface Register */
|
||||
#define PCI_SCR 0x0A /* Sub-Class Register */
|
||||
#define PCI_BCR 0x0B /* Base-Class Register */
|
||||
#define PCI_HEADT 0x0E /* Header type, 8-bit */
|
||||
#define PHT_MULTIFUNC 0x80 /* Multiple functions */
|
||||
#define PCI_BAR 0x10 /* Base Address Register */
|
||||
#define PCI_BAR_2 0x14 /* Base Address Register */
|
||||
#define PCI_BAR_3 0x18 /* Base Address Register */
|
||||
#define PCI_BAR_4 0x1C /* Base Address Register */
|
||||
#define PCI_ILR 0x3C /* Interrupt Line Register */
|
||||
#define PCI_IPR 0x3D /* Interrupt Pin Register */
|
||||
|
||||
/* Device type values as ([PCI_BCR] << 16) | ([PCI_SCR] << 8) | [PCI_PIFR] */
|
||||
#define PCI_T3_PCI2PCI 0x060400 /* PCI-to-PCI Bridge device */
|
||||
#define PCI_T3_PCI2PCI_SUBTR 0x060401 /* Subtr. PCI-to-PCI Bridge */
|
||||
|
||||
/* PCI bridge devices (AGP) */
|
||||
#define PPB_SBUSN 0x19 /* Secondary Bus Number */
|
||||
|
||||
/* Intel compatible PCI bridge devices (AGP) */
|
||||
#define PPB_SSTS 0x1E /* Secondary PCI-to-PCI Status Register */
|
||||
|
||||
#define NO_VID 0xffff /* No PCI card present */
|
||||
|
||||
struct pci_vendor
|
||||
{
|
||||
u16_t vid;
|
||||
|
|
@ -99,8 +66,9 @@ struct pci_pcibridge
|
|||
#define PCI_IB_AMD 3 /* AMD compatible ISA bridge */
|
||||
#define PCI_IB_SIS 4 /* SIS compatible ISA bridge */
|
||||
|
||||
#define PCI_PCIB_INTEL 1 /* Intel compatible PCI bridge */
|
||||
#define PCI_AGPB_INTEL 2 /* Intel compatible AGP bridge */
|
||||
#define PCI_PPB_STD 1 /* Standard PCI-to-PCI bridge */
|
||||
#define PCI_PPB_CB 2 /* Cardbus bridge */
|
||||
/* Still needed? */
|
||||
#define PCI_AGPB_VIA 3 /* VIA compatible AGP bridge */
|
||||
|
||||
extern struct pci_vendor pci_vendor_table[];
|
||||
|
|
@ -111,6 +79,10 @@ extern struct pci_intel_ctrl pci_intel_ctrl[];
|
|||
extern struct pci_isabridge pci_isabridge[];
|
||||
extern struct pci_pcibridge pci_pcibridge[];
|
||||
|
||||
/* Utility functions */
|
||||
_PROTOTYPE( void pci_reserve2, (int devind, char name[M3_STRING]) );
|
||||
_PROTOTYPE( void pci_release, (char name[M3_STRING]) );
|
||||
|
||||
/*
|
||||
* $PchId: pci.h,v 1.4 2001/12/06 20:21:22 philip Exp $
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@ struct pci_vendor pci_vendor_table[]=
|
|||
{ 0x105A, "Promise Technology" },
|
||||
{ 0x10B7, "3Com Corporation" },
|
||||
{ 0x10B9, "AcerLabs (ALI)" },
|
||||
{ 0x10C8, "Neomagic Corporation" },
|
||||
{ 0x10DE, "nVidia Corporation" },
|
||||
{ 0x10EC, "Realtek" },
|
||||
{ 0x1106, "VIA" },
|
||||
|
|
@ -77,6 +78,8 @@ struct pci_device pci_device_table[]=
|
|||
{ 0x10B9, 0x5229, "ALI M5229 (IDE)" },
|
||||
{ 0x10B9, 0x5243, "ALI M5243" },
|
||||
{ 0x10B9, 0x7101, "ALI M7101 PMU" },
|
||||
{ 0x10C8, 0x0005, "Neomagic NM2200 Magic Graph 256AV" },
|
||||
{ 0x10C8, 0x8005, "Neomagic NM2200 Magic Graph 256AV Audio" },
|
||||
{ 0x10DE, 0x0020, "nVidia Riva TnT [NV04]" },
|
||||
{ 0x10DE, 0x0110, "nVidia GeForce2 MX [NV11]" },
|
||||
{ 0x10EC, 0x8029, "Realtek RTL8029" },
|
||||
|
|
@ -274,15 +277,17 @@ struct pci_isabridge pci_isabridge[]=
|
|||
|
||||
struct pci_pcibridge pci_pcibridge[]=
|
||||
{
|
||||
{ 0x8086, 0x1A31, PCI_AGPB_INTEL, }, /* Intel 82845B/A AGP Bridge */
|
||||
#if 0
|
||||
{ 0x8086, 0x1A31, PCI_PCIB_INTEL, }, /* Intel 82845B/A AGP Bridge */
|
||||
{ 0x8086, 0x2448, PCI_PCIB_INTEL, }, /* Intel 82801 Mobile */
|
||||
{ 0x8086, 0x244e, PCI_PCIB_INTEL, }, /* Intel 82801 PCI Bridge */
|
||||
{ 0x8086, 0x2561, PCI_AGPB_INTEL, }, /* Intel 82845 AGP Bridge */
|
||||
{ 0x8086, 0x7191, PCI_AGPB_INTEL, }, /* Intel 82443BX (AGP bridge) */
|
||||
{ 0x1022, 0x700D, PCI_AGPB_INTEL, }, /* AMD-762 (AGP 4x) */
|
||||
{ 0x10B9, 0x5243, PCI_AGPB_INTEL, }, /* ALI M5243 */
|
||||
{ 0x8086, 0x2561, PCI_PCIB_INTEL, }, /* Intel 82845 AGP Bridge */
|
||||
{ 0x8086, 0x7191, PCI_PCIB_INTEL, }, /* Intel 82443BX (AGP bridge) */
|
||||
{ 0x1022, 0x700D, PCI_PCIB_INTEL, }, /* AMD-762 (AGP 4x) */
|
||||
{ 0x10B9, 0x5243, PCI_PCIB_INTEL, }, /* ALI M5243 */
|
||||
{ 0x1106, 0x8305, PCI_AGPB_VIA, }, /* VIA VT8365 [KM133 AGP] */
|
||||
{ 0x1106, 0xB188, PCI_AGPB_VIA, }, /* VT8237 PCI bridge */
|
||||
#endif
|
||||
{ 0x0000, 0x0000, 0, },
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue