From de57a53027e3fcbfc06e98a02c3ac6f6a62be000 Mon Sep 17 00:00:00 2001 From: Ben Gras Date: Mon, 11 Feb 2013 02:02:08 +0100 Subject: [PATCH] __aeabi_ldivmod: fix sign logic . signed 64-bit divide incorrectly tested for sign compensation bits in the NEG (R5) register, causing the signedness of the quotient and modulus to be wrong for negative numerators. Fixes test45 on ARM. Change-Id: Id0df8fd97ea67cd0722db8cdd70a07e01b3d7870 --- common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S b/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S index 041ce8558..259ff63fe 100644 --- a/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S +++ b/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S @@ -80,9 +80,9 @@ ENTRY(__aeabi_ldivmod) pop {r2, r3} tst NEG, #2 /* does remainder need to be negative? */ - bleq .Lnegate_b + blne .Lnegate_b tst NEG, #1 /* does quotient need to be negative? */ - bleq .Lnegate_a + blne .Lnegate_a pop {r4-r5, sl, lr} RET