Support for VMWare Workstation 6.x
VMWare Workstation 6.x would previously die when running MINIX 3 with an IOSPACE assertion and several error messages about multiply registered I/O ports. The assertion is triggered when we probe for BAR sizes in record_bar(). The solution: The PCI driver now disables I/O and mem access before probing for BAR sizes. Bumped up NR_PCIDEV and NR_PCIBUS, since Workstation 6.x virtualizes more PCI buses and devices.
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2 changed files with 21 additions and 5 deletions
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@ -33,8 +33,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
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#include <string.h>
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#include <minix/sysutil.h>
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#define NR_PCIBUS 10
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#define NR_PCIDEV 40
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#define NR_PCIBUS 40
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#define NR_PCIDEV 50
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#define PBT_INTEL_HOST 1
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#define PBT_PCIBRIDGE 2
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@ -1135,16 +1135,24 @@ int bar_nr;
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{
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int reg, prefetch, type, dev_bar_nr;
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u32_t bar, bar2;
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u16_t cmd;
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reg= PCI_BAR+4*bar_nr;
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bar= pci_attr_r32_u(devind, reg);
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if (bar & PCI_BAR_IO)
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{
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/* Size register */
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/* Disable I/O access before probing for BAR's size */
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cmd = pci_attr_r16(devind, PCI_CR);
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pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_IO_EN);
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/* Probe BAR's size */
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pci_attr_w32(devind, reg, 0xffffffff);
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bar2= pci_attr_r32_u(devind, reg);
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/* Restore original state */
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pci_attr_w32(devind, reg, bar);
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pci_attr_w16(devind, PCI_CR, cmd);
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bar &= ~(u32_t)3; /* Clear non-address bits */
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bar2 &= ~(u32_t)3;
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@ -1168,10 +1176,17 @@ int bar_nr;
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}
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else
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{
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/* Size register */
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/* Disable mem access before probing for BAR's size */
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cmd = pci_attr_r16(devind, PCI_CR);
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pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_MEM_EN);
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/* Probe BAR's size */
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pci_attr_w32(devind, reg, 0xffffffff);
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bar2= pci_attr_r32_u(devind, reg);
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/* Restore original values */
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pci_attr_w32(devind, reg, bar);
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pci_attr_w16(devind, PCI_CR, cmd);
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if (bar2 == 0)
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return; /* Reg. is not implemented */
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@ -2398,7 +2413,7 @@ u32_t value;
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#if 0
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printf("pcii_wreg32(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
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busind, devind, port, value,
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pcibus[busind].pb_bus, pcidev[devind].pd_dev,
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pcibus[busind].pb_busnr, pcidev[devind].pd_dev,
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pcidev[devind].pd_func);
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#endif
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PCII_WREG32_(pcibus[busind].pb_busnr,
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@ -9,6 +9,7 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
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#define PCI_DID 0x02 /* Device ID, 16-bit */
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#define PCI_CR 0x04 /* Command Register, 16-bit */
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#define PCI_CR_MAST_EN 0x0004 /* Enable Busmaster Access */
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#define PCI_CR_MEM_EN 0x0002 /* Enable Mem Cycles */
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#define PCI_CR_IO_EN 0x0001 /* Enable I/O Cycles */
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#define PCI_SR 0x06 /* PCI status, 16-bit */
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#define PSR_SSE 0x4000 /* Signaled System Error */
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