Support for ethernet in QEMU.

This commit is contained in:
Philip Homburg 2005-08-09 11:23:41 +00:00
parent 4d17271298
commit c1dd29ba0c
2 changed files with 41 additions and 22 deletions

View file

@ -119,12 +119,10 @@ struct dpeth *dep;
pci_reserve(devind); pci_reserve(devind);
/* printf("cr = 0x%x\n", pci_attr_r16(devind, PCI_CR)); */ /* printf("cr = 0x%x\n", pci_attr_r16(devind, PCI_CR)); */
bar= pci_attr_r32(devind, PCI_BAR) & 0xffffffe0; bar= pci_attr_r32(devind, PCI_BAR) & 0xffffffe0;
if ((bar & 0x3ff) >= 0x100-32 || bar < 0x400)
{ if (bar < 0x400)
printf("rtl8029: ignoring bad base address 0x%x for QEMU\n", panic("", "base address is not properly configured", NO_NUM);
bar);
/* panic("", "base address is not properly configured", NO_NUM); */
}
dep->de_base_port= bar; dep->de_base_port= bar;
ilr= pci_attr_r8(devind, PCI_ILR); ilr= pci_attr_r8(devind, PCI_ILR);

View file

@ -24,7 +24,6 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
#if !__minix_vmd #if !__minix_vmd
#define debug 0
#define irq_mode_pci(irq) ((void)0) #define irq_mode_pci(irq) ((void)0)
#endif #endif
@ -39,6 +38,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
#define PBT_INTEL 1 #define PBT_INTEL 1
#define PBT_PCIBRIDGE 2 #define PBT_PCIBRIDGE 2
PRIVATE int debug= 0;
PRIVATE struct pcibus PRIVATE struct pcibus
{ {
int pb_type; int pb_type;
@ -71,6 +72,9 @@ PRIVATE struct pcidev
} pcidev[NR_PCIDEV]; } pcidev[NR_PCIDEV];
PRIVATE int nr_pcidev= 0; PRIVATE int nr_pcidev= 0;
/* Work around the limitation of the PCI emulation in QEMU 0.7.1 */
PRIVATE int qemu_pci= 0;
FORWARD _PROTOTYPE( void pci_intel_init, (void) ); FORWARD _PROTOTYPE( void pci_intel_init, (void) );
FORWARD _PROTOTYPE( void probe_bus, (int busind) ); FORWARD _PROTOTYPE( void probe_bus, (int busind) );
FORWARD _PROTOTYPE( int do_isabridge, (int busind) ); FORWARD _PROTOTYPE( int do_isabridge, (int busind) );
@ -150,9 +154,20 @@ PUBLIC void pci_init()
{ {
static int first_time= 1; static int first_time= 1;
long v;
if (!first_time) if (!first_time)
return; return;
v= 0;
env_parse("qemu_pci", "d", 0, &v, 0, 1);
qemu_pci= v;
v= 0;
env_parse("pci_debug", "d", 0, &v, 0, 1);
debug= v;
/* We don't expect to interrupted */ /* We don't expect to interrupted */
assert(first_time == 1); assert(first_time == 1);
first_time= -1; first_time= -1;
@ -514,21 +529,20 @@ printf("probe_bus(%d)\n", busind);
did= pci_attr_r16(devind, PCI_DID); did= pci_attr_r16(devind, PCI_DID);
headt= pci_attr_r8(devind, PCI_HEADT); headt= pci_attr_r8(devind, PCI_HEADT);
sts= pci_attr_rsts(devind); sts= pci_attr_rsts(devind);
if (vid == NO_VID)
break; /* Nothing here */
if (sts & (PSR_SSE|PSR_RMAS|PSR_RTAS)) if (sts & (PSR_SSE|PSR_RMAS|PSR_RTAS))
{ {
#if 0 if (qemu_pci)
printf( {
printf(
"pci: ignoring bad value 0x%x in sts for QEMU\n", "pci: ignoring bad value 0x%x in sts for QEMU\n",
sts & (PSR_SSE|PSR_RMAS|PSR_RTAS)); sts & (PSR_SSE|PSR_RMAS|PSR_RTAS));
#endif }
break; else
} break;
if (vid == NO_VID)
{
/* Some bridge implementations do support
* pci_attr_rsts.
*/
break;
} }
dstr= pci_dev_name(vid, did); dstr= pci_dev_name(vid, did);
@ -800,10 +814,17 @@ int devind;
printf("INT%c: %d\n", 'A'+i, irq); printf("INT%c: %d\n", 'A'+i, irq);
if (!(elcr & (1 << irq))) if (!(elcr & (1 << irq)))
{ {
printf("IRQ %d is not level triggered\n", if (qemu_pci)
irq); {
printf("(ignored for QEMU)\n"); printf(
/* panic(NULL,NULL, NO_NUM); */ "IRQ is not level triggered (ignored for QEMU)\n");
}
else
{
panic("PCI",
"IRQ is not level triggered\n",
NO_NUM);
}
} }
irq_mode_pci(irq); irq_mode_pci(irq);
} }