Separate pci driver

include/ibm/pci.h

@@ -0,0 +1,41 @@
+/*
+pci.h
+
+Created:	Jan 2000 by Philip Homburg <philip@cs.vu.nl>
+*/
+
+#define PCI_VID		0x00	/* Vendor ID, 16-bit */
+#define PCI_DID		0x02	/* Device ID, 16-bit */
+#define PCI_CR		0x04	/* Command Register, 16-bit */
+#define PCI_PCISTS	0x06	/* PCI status, 16-bit */
+#define		 PSR_SSE	0x4000	/* Signaled System Error */
+#define		 PSR_RMAS	0x2000	/* Received Master Abort Status */
+#define		 PSR_RTAS	0x1000	/* Received Target Abort Status */
+#define PCI_REV		0x08	/* Revision ID */
+#define PCI_PIFR	0x09	/* Prog. Interface Register */
+#define PCI_SCR		0x0A	/* Sub-Class Register */
+#define PCI_BCR		0x0B	/* Base-Class Register */
+#define PCI_HEADT	0x0E	/* Header type, 8-bit */
+#define		PHT_MULTIFUNC	0x80	/* Multiple functions */
+#define PCI_BAR		0x10	/* Base Address Register */
+#define PCI_BAR_2	0x14	/* Base Address Register */
+#define PCI_BAR_3	0x18	/* Base Address Register */
+#define PCI_BAR_4	0x1C	/* Base Address Register */
+#define PCI_ILR		0x3C	/* Interrupt Line Register */
+#define PCI_IPR		0x3D	/* Interrupt Pin Register */
+
+/* Device type values as ([PCI_BCR] << 16) | ([PCI_SCR] << 8) | [PCI_PIFR] */
+#define	PCI_T3_PCI2PCI		0x060400	/* PCI-to-PCI Bridge device */
+#define	PCI_T3_PCI2PCI_SUBTR	0x060401	/* Subtr. PCI-to-PCI Bridge */
+
+/* PCI bridge devices (AGP) */
+#define PPB_SBUSN	0x19	/* Secondary Bus Number */
+
+/* Intel compatible PCI bridge devices (AGP) */
+#define PPB_SSTS	0x1E	/* Secondary PCI-to-PCI Status Register */
+
+#define NO_VID		0xffff	/* No PCI card present */
+
+/*
+ * $PchId: pci.h,v 1.4 2001/12/06 20:21:22 philip Exp $
+ */

include/minix/com.h

@@ -39,7 +39,8 @@
 #define TTY_PROC_NR	  5	/* terminal (TTY) driver */
 #define DRVR_PROC_NR      6	/* device driver for boot medium */
 #define DS_PROC_NR	  7    	/* data store server */
-#define INIT_PROC_NR	  8    	/* init -- goes multiuser */
+#define PCI_PROC_NR       8	/* driver for PCI controllers */
+#define INIT_PROC_NR	  9    	/* init -- goes multiuser */
 
 /* Number of processes contained in the system image. */
 #define NR_BOOT_PROCS 	(NR_TASKS + INIT_PROC_NR + 1)
@@ -70,6 +71,56 @@
 #define NOTIFY_TIMESTAMP	m2_l2
 #define NOTIFY_FLAGS		m2_i1
 
+/*===========================================================================*
+ *                Messages for BUS controller drivers 			     *
+ *===========================================================================*/
+#define BUSC_RQ_BASE	0x300	/* base for request types */
+#define BUSC_RS_BASE	0x380	/* base for response types */
+
+#define BUSC_PCI_INIT		(BUSC_RQ_BASE + 0)	/* First message to
+							 * PCI driver
+							 */
+#define BUSC_PCI_FIRST_DEV	(BUSC_RQ_BASE + 1)	/* Get index (and
+							 * vid/did) of the
+							 * first PCI device
+							 */
+#define BUSC_PCI_NEXT_DEV	(BUSC_RQ_BASE + 2)	/* Get index (and
+							 * vid/did) of the
+							 * next PCI device
+							 */
+#define BUSC_PCI_FIND_DEV	(BUSC_RQ_BASE + 3)	/* Get index of a
+							 * PCI device based on
+							 * bus/dev/function
+							 */
+#define BUSC_PCI_IDS		(BUSC_RQ_BASE + 4)	/* Get vid/did from an
+							 * index
+							 */
+#define BUSC_PCI_DEV_NAME	(BUSC_RQ_BASE + 5)	/* Get the name of a
+							 * PCI device
+							 */
+#define BUSC_PCI_SLOT_NAME	(BUSC_RQ_BASE + 6)	/* Get the name of a
+							 * PCI slot
+							 */
+#define BUSC_PCI_RESERVE	(BUSC_RQ_BASE + 7)	/* Reserve a PCI dev */
+#define BUSC_PCI_ATTR_R8	(BUSC_RQ_BASE + 8)	/* Read 8-bit
+							 * attribute value
+							 */
+#define BUSC_PCI_ATTR_R16	(BUSC_RQ_BASE + 9)	/* Read 16-bit
+							 * attribute value
+							 */
+#define BUSC_PCI_ATTR_R32	(BUSC_RQ_BASE + 10)	/* Read 32-bit
+							 * attribute value
+							 */
+#define BUSC_PCI_ATTR_W8	(BUSC_RQ_BASE + 11)	/* Write 8-bit
+							 * attribute value
+							 */
+#define BUSC_PCI_ATTR_W16	(BUSC_RQ_BASE + 12)	/* Write 16-bit
+							 * attribute value
+							 */
+#define BUSC_PCI_ATTR_W32	(BUSC_RQ_BASE + 13)	/* Write 32-bit
+							 * attribute value
+							 */
+
 /*===========================================================================*
  *                Messages for BLOCK and CHARACTER device drivers	     *
  *===========================================================================*/

include/minix/syslib.h

@@ -148,9 +148,25 @@ _PROTOTYPE(int sys_out, (int port, unsigned long value, int type)	);
 
 /* Shorthands for sys_in() system call. */
 #define sys_inb(p,v)	sys_in((p), (v), DIO_BYTE)
-#define sys_inw(p,v)	sys_in((p), (unsigned long*) (v), DIO_WORD)
+#define sys_inw(p,v)	sys_in((p), (v), DIO_WORD)
-#define sys_inl(p,v)	sys_in((p), (unsigned long*) (v), DIO_LONG)
+#define sys_inl(p,v)	sys_in((p), (v), DIO_LONG)
 _PROTOTYPE(int sys_in, (int port, unsigned long *value, int type)	);
 
+/* pci.c */
+_PROTOTYPE( void pci_init, (void)					);
+_PROTOTYPE( int pci_first_dev, (int *devindp, u16_t *vidp, u16_t *didp)	);
+_PROTOTYPE( int pci_next_dev, (int *devindp, u16_t *vidp, u16_t *didp)	);
+_PROTOTYPE( int pci_find_dev, (U8_t bus, U8_t dev, U8_t func,
+							int *devindp)	);
+_PROTOTYPE( void pci_reserve, (int devind)				);
+_PROTOTYPE( void pci_ids, (int devind, u16_t *vidp, u16_t *didp)	);
+_PROTOTYPE( u8_t pci_attr_r8, (int devind, int port)			);
+_PROTOTYPE( u16_t pci_attr_r16, (int devind, int port)			);
+_PROTOTYPE( u32_t pci_attr_r32, (int devind, int port)			);
+_PROTOTYPE( void pci_attr_w16, (int devind, int port, U16_t value)	);
+_PROTOTYPE( void pci_attr_w32, (int devind, int port, u32_t value)	);
+_PROTOTYPE( char *pci_dev_name, (U16_t vid, U16_t did)			);
+_PROTOTYPE( char *pci_slot_name, (int devind)				);
+
 #endif /* _SYSLIB_H */