Added debug output for unsupported PCI-to-PCI bridges.
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@ -692,7 +692,8 @@ int busind;
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int devind, i;
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int devind, i;
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int ind, type;
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int ind, type;
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u16_t vid, did;
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u16_t vid, did;
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u8_t sbusn;
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u8_t sbusn, baseclass, subclass, infclass;
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u32_t t3;
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vid= did= 0; /* lint */
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vid= did= 0; /* lint */
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for (devind= 0; devind< nr_pcidev; devind++)
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for (devind= 0; devind< nr_pcidev; devind++)
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@ -711,7 +712,27 @@ int busind;
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break;
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break;
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}
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}
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if (pci_pcibridge[i].vid == 0)
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if (pci_pcibridge[i].vid == 0)
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{
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if (debug)
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{
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/* Report unsupported bridges */
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baseclass= pci_attr_r8(devind, PCI_BCR);
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subclass= pci_attr_r8(devind, PCI_SCR);
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infclass= pci_attr_r8(devind, PCI_PIFR);
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t3= ((baseclass << 16) | (subclass << 8) |
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infclass);
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if (t3 != PCI_T3_PCI2PCI &&
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t3 != PCI_T3_PCI2PCI_SUBTR)
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{
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/* No a PCI-to-PCI bridge */
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continue;
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continue;
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}
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printf(
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"Ignoring unknown PCI-to-PCI bridge: %04X/%04X\n",
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vid, did);
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}
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continue;
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}
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type= pci_pcibridge[i].type;
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type= pci_pcibridge[i].type;
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if (debug)
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if (debug)
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@ -49,6 +49,10 @@ _PROTOTYPE( void pci_attr_w32, (int devind, int port, u32_t value) );
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#define PCI_ILR 0x3C /* Interrupt Line Register */
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#define PCI_ILR 0x3C /* Interrupt Line Register */
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#define PCI_IPR 0x3D /* Interrupt Pin Register */
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#define PCI_IPR 0x3D /* Interrupt Pin Register */
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/* Device type values as ([PCI_BCR] << 16) | ([PCI_SCR] << 8) | [PCI_PIFR] */
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#define PCI_T3_PCI2PCI 0x060400 /* PCI-to-PCI Bridge device */
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#define PCI_T3_PCI2PCI_SUBTR 0x060401 /* Subtr. PCI-to-PCI Bridge */
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/* PCI bridge devices (AGP) */
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/* PCI bridge devices (AGP) */
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#define PPB_SBUSN 0x19 /* Secondary Bus Number */
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#define PPB_SBUSN 0x19 /* Secondary Bus Number */
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