Resolution of some currently fixable TODOs
This commit is contained in:
Wojciech Zajac
Lionel Sambuc
parent
310904bf12
commit
9f2204a8ad
7 changed files with 49 additions and 27 deletions
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@ -17,3 +17,5 @@ created march-june 2014, JPEmbedded (info@jpembedded.eu)
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- URBs are enqueued in DDEKit but not in USBD itself
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- DDEKit way of handling interface numbers is not explicitly defined, bitmask
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formatting for it, is therefore hardcoded into USBD
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- Waiting for USB0 clock to leave IDLEST.Disable state, by nanosleep, was
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removed, as this should be implemented for all clocks in clkconf_set
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@ -202,7 +202,8 @@ hcd_enumerate(hcd_device_state * this_device)
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return EXIT_FAILURE;
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}
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/* TODO: dynamic device address when more devices are available */
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/* TODO: Dynamic device addressing should be added here, when more
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* than one device can be handled at a time */
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/* Set address */
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if (EXIT_SUCCESS != hcd_set_address(this_device, HCD_ATTACHED_ADDR)) {
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@ -219,9 +220,12 @@ hcd_enumerate(hcd_device_state * this_device)
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return EXIT_FAILURE;
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}
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/* TODO: always first configuration */
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/* TODO: Always use first configuration, as there is no support for
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* multiple configurations in DDEKit/devman and devices rarely have
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* more than one anyway */
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/* Set configuration */
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if (EXIT_SUCCESS != hcd_set_configuration(this_device, 0x01)) {
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if (EXIT_SUCCESS != hcd_set_configuration(this_device,
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HCD_SET_CONFIG_NUM(HCD_DEFAULT_CONFIG))) {
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USB_MSG("Failed to set configuration");
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return EXIT_FAILURE;
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}
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@ -346,12 +350,12 @@ hcd_get_descriptor_tree(hcd_device_state * this_device)
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completed = 0;
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do {
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/* TODO: configuration 0 is hard-coded
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/* TODO: Default configuration is hard-coded
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* but others are rarely used anyway */
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/* TODO: magic numbers, no header for these */
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setup.bRequestType = 0x80; /* IN */
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setup.bRequest = 0x06; /* Get descriptor */
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setup.wValue = 0x0200; /* Configuration 0 */
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setup.wValue = 0x0200 | HCD_DEFAULT_CONFIG;
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setup.wIndex = 0x0000;
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setup.wLength = buffer_length;
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@ -712,8 +716,9 @@ hcd_setup_packet(hcd_device_state * this_device, hcd_ctrlrequest * setup)
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}
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} else {
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/* TODO: unimplemented */
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USB_MSG("Illegal non-zero length OUT setup packet");
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/* TODO: Unimplemented OUT DATA stage */
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d->out_data_stage(d->private_data);
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return EXIT_FAILURE;
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}
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}
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@ -179,8 +179,9 @@ hcd_os_nanosleep(int nanosec)
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nanotm.tv_nsec = nanosec;
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}
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/* TODO: since it is not likely to be ever interrupted, we do not try
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/* TODO: Since it is not likely to be ever interrupted, we do not try
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* to sleep for a remaining time in case of signal handling */
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/* Signal handling will most likely end up with termination anyway */
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USB_ASSERT(EXIT_SUCCESS == nanosleep(&nanotm, NULL),
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"Calling nanosleep() failed");
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}
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@ -225,7 +226,8 @@ hcd_disconnect_device(hcd_device_state * this_device)
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hcd_tree_cleanup(&(this_device->config_tree));
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/* TODO: spilled resources */
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/* TODO: Spilled resources */
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/* DDEKit does no resource deallocation, when terminating thread */
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ddekit_thread_terminate(this_device->thread);
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ddekit_sem_deinit(this_device->lock);
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@ -11,7 +11,9 @@
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#include "musb_core.h"
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/* TODO: BeagleBone white uses USB0 for PC connection as peripheral */
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/* TODO: BeagleBone white uses USB0 for PC connection as peripheral,
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* so this is disabled by default */
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/* Should USB0 ever be used on BBB/BBW, one can change it to '#define': */
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#undef AM335X_USE_USB0
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@ -197,8 +199,7 @@
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* AM335x clocking register defines *
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*===========================================================================*/
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/* Clock module registers offsets */
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#define AM335X_CM_PER_BASE_OFFSET 0x00u
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#define AM335X_REG_CM_PER_USB0_CLKCTRL (AM335X_CM_PER_BASE_OFFSET + 28u)
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#define AM335X_REG_CM_PER_USB0_CLKCTRL_OFFSET 0x1Cu
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/* Possible values to be set */
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#define AM335X_VAL_CM_PER_USB0_CLKCTRL_MODULEMODE_ENABLE 0x2u
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@ -267,7 +268,7 @@ static int musb_am335x_internal_init(void);
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static void musb_am335x_internal_deinit(void);
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/* Interrupt related */
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static void musb_am335x_irq_init(void *); /* TODO: required by DDEKit */
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static void musb_am335x_irq_init(void *);
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static void musb_am335x_usbss_isr(void *);
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static void musb_am335x_usbx_isr(void *);
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static int musb_am335x_irqstat0_to_ep(int);
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@ -420,15 +421,11 @@ musb_am335x_internal_init(void)
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DEBUG_DUMP;
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/* Configure clocking */
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if (hcd_os_clkconf(AM335X_REG_CM_PER_USB0_CLKCTRL,
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if (hcd_os_clkconf(AM335X_REG_CM_PER_USB0_CLKCTRL_OFFSET,
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AM335X_VAL_CM_PER_USB0_CLKCTRL_MODULEMODE_ENABLE,
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AM335X_CLKCONF_FULL_VAL))
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return EXIT_FAILURE;
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/* TODO: time to stabilize? */
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/* Sleep 25msec */
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hcd_os_nanosleep(HCD_NANOSLEEP_MSEC(25));
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/* Read and dump revision register */
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USB_MSG("MUSB revision (REVREG): %08X",
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(unsigned int)HCD_RD4(am335x.ss.regs, AM335X_REG_REVREG));
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@ -493,6 +490,11 @@ static void
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musb_am335x_irq_init(void * UNUSED(unused))
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{
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DEBUG_DUMP;
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/* TODO: This function does nothing and is not needed by MUSB but
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* is still required by DDEKit for initialization, as NULL pointer
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* cannot be passed to ddekit_interrupt_attach */
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return;
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}
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@ -541,7 +543,8 @@ musb_am335x_usbx_isr(void * data)
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irqstat0 = HCD_RD4(r, AM335X_REG_USBXIRQSTAT0);
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irqstat1 = HCD_RD4(r, AM335X_REG_USBXIRQSTAT1);
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/* TODO: priority of interrupts */
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/* Interrupts, seem to appear one at a time
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* Check which bit is set to resolve event */
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if (irqstat1 & AM335X_VAL_USBXIRQSTAT1_DRVVBUS) {
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USB_DBG("DRVVBUS level changed");
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CLEAR_IRQ1(AM335X_VAL_USBXIRQSTAT1_DRVVBUS);
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@ -325,7 +325,8 @@ musb_core_stop(void * cfg)
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r = ((musb_core_config *)cfg)->regs;
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/* TODO: add hardware interrupt disable */
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/* Disable all interrupts */
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HCD_WR1(r, MUSB_REG_INTRUSBE, MUSB_VAL_INTRUSBE_NONE);
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/* Stop session */
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devctl = HCD_RD1(r, MUSB_REG_DEVCTL);
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@ -695,8 +696,9 @@ musb_out_data_stage(void * cfg)
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/* Set EP and device address to be used in this command */
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musb_set_state((musb_core_config *)cfg);
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/* TODO: not needed for enumeration but may be needed later */
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USB_MSG("Setup packet's 'DATA OUT' stage not implemented");
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/* TODO: Not needed for enumeration but may be needed later, if
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* additional control transfers are implemented */
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USB_ASSERT(0, "Setup packet's 'DATA OUT' stage not implemented");
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}
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@ -101,6 +101,7 @@
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#define MUSB_VAL_INTRUSBE_DISCON HCD_BIT(5)
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#define MUSB_VAL_INTRUSBE_SESSREQ HCD_BIT(6)
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#define MUSB_VAL_INTRUSBE_VBUSERR HCD_BIT(7)
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#define MUSB_VAL_INTRUSBE_NONE 0x00u
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/* HOST_TYPE0 */
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#define MUSB_VAL_HOST_TYPE0_MASK (HCD_BIT(6) | HCD_BIT(7))
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@ -141,7 +142,9 @@
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HCD_BIT(3))
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/* HOST_RXINTERVAL/HOST_TXINTERVAL */
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/* TODO: Default NAK limit */
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/* Default NAK limit for non-control transfer
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* When too big this may cause driver to wait for
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* quite long in case of NAK error */
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#define MUSB_VAL_HOST_XXINTERVAL_DEFAULT 0x10u
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/* HOST_RXCSR */
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@ -13,6 +13,8 @@
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#include <minix/usb.h> /* for setup structures */
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#include <minix/usb_ch9.h> /* for descriptor structures */
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#include <sys/cdefs.h> /* for __aligned() */
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/*===========================================================================*
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* USB register handling defines *
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@ -143,9 +145,8 @@ typedef struct hcd_device_state {
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/* Number of bytes received/transmitted in last transfer */
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int data_len;
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/* TODO: forcefully align buffer to make things clear? */
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/* Buffer for each device to hold transfered data */
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hcd_reg1 buffer[MAX_WTOTALLENGTH];
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/* Word aligned buffer for each device to hold transfered data */
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hcd_reg1 buffer[MAX_WTOTALLENGTH] __aligned(sizeof(hcd_reg4));
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}
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hcd_device_state;
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@ -219,10 +220,14 @@ typedef struct hcd_datarequest hcd_datarequest;
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/* Default USB communication parameters */
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#define HCD_DEFAULT_EP 0x00
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#define HCD_DEFAULT_ADDR 0x00
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#define HCD_DEFAULT_CONFIG 0x00
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/* TODO: one device */
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/* TODO: One device only */
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#define HCD_ATTACHED_ADDR 0x01
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/* Translates configuration number for 'set configuration' */
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#define HCD_SET_CONFIG_NUM(num) ((num)+0x01u)
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/*===========================================================================*
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* Operating system specific *
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