_cpuid() - full cpuid instruction wrapper
- the prototype changes to _cpuid(u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx) - this makes possible to use all the features of the cpuid instruction as described in the Intel specs
This commit is contained in:
Tomas Hruby
parent
45eabea285
commit
80d671aea7
5 changed files with 50 additions and 45 deletions
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@ -18,6 +18,9 @@
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#define _CPUF_I386_SSE4_1 11
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#define _CPUF_I386_SSE4_2 12
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#define _CPUF_I386_HTT 13 /* Supports HTT */
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#define _CPUF_I386_HTT_MAX_NUM 14 /* Maximal num of threads */
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_PROTOTYPE(int _cpufeature, (int featureno));
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#endif
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@ -15,7 +15,7 @@ _PROTOTYPE(void std_err, (char *_s));
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_PROTOTYPE(void prints, (const char *_s, ...));
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_PROTOTYPE(int fsversion, (char *_dev, char *_prog));
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_PROTOTYPE(int getprocessor, (void));
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_PROTOTYPE(void _cpuid, (u32_t eax_in, u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx));
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_PROTOTYPE(void _cpuid, (u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx));
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_PROTOTYPE(int load_mtab, (char *_prog_name));
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_PROTOTYPE(int rewrite_mtab, (char *_prog_name));
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_PROTOTYPE(int get_mtab_entry, (char *_s1, char *_s2, char *_s3, char *_s4));
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@ -75,6 +75,7 @@ sys/vm_i386.h
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#define CPUID1_EDX_PGE (1L << 13) /* Page Global (bit) Enable */
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#define CPUID1_EDX_APIC_ON_CHIP (1L << 9) /* APIC is present on the chip */
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#define CPUID1_EDX_TSC (1L << 4) /* Timestamp counter present */
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#define CPUID1_EDX_HTT (1L << 28) /* Supports HTT */
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#define CPUID1_EDX_FXSR (1L << 24)
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#define CPUID1_EDX_SSE (1L << 25)
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#define CPUID1_EDX_SSE2 (1L << 26)
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@ -6,57 +6,61 @@
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int _cpufeature(int cpufeature)
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{
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u32_t cpuid_feature_edx = 0;
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u32_t cpuid_feature_ecx = 0;
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u32_t eax, ebx, ecx, edx;
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int proc;
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eax = ebx = ecx = edx = 0;
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proc = getprocessor();
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/* If processor supports CPUID and its CPUID supports enough
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* parameters, retrieve EDX feature flags to test against.
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*/
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if(proc >= 586) {
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u32_t params, a, b, c, d;
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_cpuid(0, ¶ms, &b, &c, &d);
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if(params > 0) {
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_cpuid(1, &a, &b, &cpuid_feature_ecx,
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&cpuid_feature_edx);
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eax = 0;
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_cpuid(&eax, &ebx, &ecx, &edx);
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if(eax > 0) {
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eax = 1;
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_cpuid(&eax, &ebx, &ecx, &edx);
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}
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}
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switch(cpufeature) {
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case _CPUF_I386_PSE:
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return cpuid_feature_edx & CPUID1_EDX_PSE;
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return edx & CPUID1_EDX_PSE;
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case _CPUF_I386_PGE:
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return cpuid_feature_edx & CPUID1_EDX_PGE;
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return edx & CPUID1_EDX_PGE;
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case _CPUF_I386_APIC_ON_CHIP:
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return cpuid_feature_edx & CPUID1_EDX_APIC_ON_CHIP;
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return edx & CPUID1_EDX_APIC_ON_CHIP;
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case _CPUF_I386_TSC:
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return cpuid_feature_edx & CPUID1_EDX_TSC;
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return edx & CPUID1_EDX_TSC;
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case _CPUF_I386_FPU:
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return cpuid_feature_edx & CPUID1_EDX_FPU;
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return edx & CPUID1_EDX_FPU;
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case _CPUF_I386_SSEx:
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return (cpuid_feature_edx & (CPUID1_EDX_FXSR |
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return (edx & (CPUID1_EDX_FXSR |
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CPUID1_EDX_SSE |
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CPUID1_EDX_SSE2)) &&
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(cpuid_feature_ecx & (CPUID1_ECX_SSE3 |
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(ecx & (CPUID1_ECX_SSE3 |
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CPUID1_ECX_SSSE3 |
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CPUID1_ECX_SSE4_1 |
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CPUID1_ECX_SSE4_2));
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case _CPUF_I386_FXSR:
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return cpuid_feature_edx & CPUID1_EDX_FXSR;
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return edx & CPUID1_EDX_FXSR;
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case _CPUF_I386_SSE:
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return cpuid_feature_edx & CPUID1_EDX_SSE;
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return edx & CPUID1_EDX_SSE;
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case _CPUF_I386_SSE2:
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return cpuid_feature_edx & CPUID1_EDX_SSE2;
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return edx & CPUID1_EDX_SSE2;
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case _CPUF_I386_SSE3:
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return cpuid_feature_ecx & CPUID1_ECX_SSE3;
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return ecx & CPUID1_ECX_SSE3;
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case _CPUF_I386_SSSE3:
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return cpuid_feature_ecx & CPUID1_ECX_SSSE3;
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return ecx & CPUID1_ECX_SSSE3;
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case _CPUF_I386_SSE4_1:
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return cpuid_feature_ecx & CPUID1_ECX_SSE4_1;
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return ecx & CPUID1_ECX_SSE4_1;
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case _CPUF_I386_SSE4_2:
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return cpuid_feature_ecx & CPUID1_ECX_SSE4_2;
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return ecx & CPUID1_ECX_SSE4_2;
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case _CPUF_I386_HTT:
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return edx & CPUID1_EDX_HTT;
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case _CPUF_I386_HTT_MAX_NUM:
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return (ebx >> 16) & 0xff;
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}
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return 0;
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@ -3,41 +3,38 @@
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.sect .text; .sect .rom; .sect .data; .sect .bss
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.sect .text
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! void _cpuid(u32_t eax, u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx);
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! void _cpuid(u32_t *eax, u32_t *ebx, u32_t *ecx, u32_t *edx);
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.define __cpuid
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__cpuid:
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! save registers
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push ebp
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mov ebp, esp
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! save work registers
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push eax
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push ebx
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push ecx
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push edx
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! set eax parameter to cpuid and execute cpuid
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mov eax, 24(esp)
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! set parameters to cpuid and execute cpuid
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mov ebp, 12(esp)
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mov eax, (ebp)
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mov ebp, 16(esp)
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mov ebx, (ebp)
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mov ebp, 20(esp)
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mov ecx, (ebp)
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mov ebp, 24(esp)
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mov edx, (ebp)
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.data1 0x0F, 0xA2 ! CPUID
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! store results in pointer arguments
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mov ebp, 28(esp)
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mov ebp, 12(esp)
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mov (ebp), eax
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mov ebp, 32(esp)
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mov ebp, 16(esp)
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mov (ebp), ebx
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mov ebp, 36(esp)
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mov ebp, 20(esp)
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mov (ebp), ecx
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mov ebp, 40(esp)
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mov ebp, 24(esp)
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mov (ebp), edx
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! restore registers
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pop edx
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pop ecx
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pop ebx
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pop eax
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pop ebp
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ret
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