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arm:indenting

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Change-Id: I2f8f664fa4c66649db8981e58e6bb7a6f533df5a
This commit is contained in:
Kees Jongenburger 2013-12-17 16:20:37 +01:00
parent 96f71be5a6
commit 502bc37a61
13 changed files with 312 additions and 295 deletions
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5
kernel/arch/earm/arch_clock.c
View file

@ -1,4 +1,3 @@
/* ARM-specific clock functions. */
#include "kernel/kernel.h"
@ -30,9 +29,9 @@ int init_local_timer(unsigned freq)
omap3_timer_init(freq);
omap3_frclock_init();
if (BOARD_IS_BBXM(machine.board_id)){
if (BOARD_IS_BBXM(machine.board_id)) {
tsc_per_ms[0] = 16250;
} else if (BOARD_IS_BB(machine.board_id)){
} else if (BOARD_IS_BB(machine.board_id)) {
tsc_per_ms[0] = 15000;
} else {
panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id);

2
kernel/arch/earm/arch_do_vmctl.c
View file

@ -51,8 +51,6 @@ struct proc *p;
}
}
printf("arch_do_vmctl: strange param %d\n", m_ptr->SVMCTL_PARAM);
return EINVAL;
}

4
kernel/arch/earm/arch_reset.c
View file

@ -1,4 +1,3 @@
#include "kernel/kernel.h"
#include <unistd.h>
@ -52,8 +51,7 @@ poweroff(void)
* The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
* At this point PM should have already signaled readclock to set the alarm.
*/
if (BOARD_IS_BB(machine.board_id)){
if (BOARD_IS_BB(machine.board_id)) {
/* Powers down the SoC within 3 seconds */
direct_print("PMIC Power-Off in 3 Seconds\n");

5
kernel/arch/earm/arch_system.c
View file

@ -46,10 +46,11 @@ void arch_proc_reset(struct proc *pr)
/* Clear process state. */
memset(&pr->p_reg, 0, sizeof(pr->p_reg));
if(iskerneln(pr->p_nr))
if(iskerneln(pr->p_nr)) {
pr->p_reg.psr = INIT_TASK_PSR;
else
} else {
pr->p_reg.psr = INIT_PSR;
}
}
void arch_proc_setcontext(struct proc *p, struct stackframe_s *state,

5
kernel/arch/earm/omap_intr.c
View file

@ -22,9 +22,9 @@ static kern_phys_map intr_phys_map;
int intr_init(const int auto_eoi)
{
if (BOARD_IS_BBXM(machine.board_id)){
if (BOARD_IS_BBXM(machine.board_id)) {
omap_intr.base = OMAP3_DM37XX_INTR_BASE;
} else if (BOARD_IS_BB(machine.board_id)){
} else if (BOARD_IS_BB(machine.board_id)) {
omap_intr.base = OMAP3_AM335X_INTR_BASE;
} else {
panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id);
@ -45,7 +45,6 @@ void omap3_irq_handle(void) {
irq_handle(irq);
/* re-enable. this should not trigger interrupts due to current cpsr state */
mmio_write(omap_intr.base + OMAP3_INTCPS_CONTROL,OMAP3_INTR_NEWIRQAGR);
}
void omap3_irq_unmask(int irq)

6
kernel/arch/earm/omap_padconf.c
View file

@ -24,7 +24,7 @@ struct omap_padconf
};
struct omap_padconf omap_padconfs[] = {
static struct omap_padconf omap_padconfs[] = {
{
.base = PADCONF_DM37XX_REGISTERS_BASE,
.offset = PADCONF_DM37XX_REGISTERS_OFFSET,
@ -66,8 +66,8 @@ arch_padconf_init(void)
int x;
omap_padconf = NULL;
/* find the correct padconf */
for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++){
if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value){
for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++) {
if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value) {
omap_padconf = &omap_padconfs[x];
break;
}

9
kernel/arch/earm/omap_reset.c
View file

@ -37,11 +37,10 @@ static kern_phys_map reset_phys_map;
void
omap3_reset_init(void)
{
if(BOARD_IS_BBXM(machine.board_id)){
if(BOARD_IS_BBXM(machine.board_id)) {
omap_reset.base = DM37XX_CM_BASE;
omap_reset.size = DM37XX_CM_SIZE;
} else if(BOARD_IS_BB(machine.board_id)){
} else if(BOARD_IS_BB(machine.board_id)) {
omap_reset.base = AM335X_CM_BASE;
omap_reset.size = AM335X_CM_SIZE;
}
@ -53,9 +52,9 @@ omap3_reset_init(void)
void
omap3_reset(void)
{
if(BOARD_IS_BBXM(machine.board_id)){
if(BOARD_IS_BBXM(machine.board_id)) {
mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG), (1 << DM37XX_RST_DPLL3_BIT));
} else if(BOARD_IS_BB(machine.board_id)){
} else if(BOARD_IS_BB(machine.board_id)) {
mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET + AM335X_PRM_RSTCTRL_REG), (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
}
}

4
kernel/arch/earm/omap_rtc.c
View file

@ -40,7 +40,7 @@ static kern_phys_map rtc_phys_map;
void
omap3_rtc_init(void)
{
if (BOARD_IS_BB(machine.board_id)){
if (BOARD_IS_BB(machine.board_id)) {
kern_phys_map_ptr(omap_rtc.base, omap_rtc.size, &rtc_phys_map,
(vir_bytes) &omap_rtc.base);
}
@ -49,7 +49,7 @@ omap3_rtc_init(void)
void
omap3_rtc_run(void)
{
if (BOARD_IS_BB(machine.board_id)){
if (BOARD_IS_BB(machine.board_id)) {
/* Setting the stop bit starts the RTC running */
mmio_set((omap_rtc.base + RTC_CTRL_REG), (1 << RTC_CTRL_RTC_STOP_BIT));
}

20
kernel/arch/earm/omap_serial.c
View file

@ -44,14 +44,13 @@ static kern_phys_map serial_phys_map;
*/
void omap3_ser_init()
{
if(BOARD_IS_BBXM(machine.board_id)){
if(BOARD_IS_BBXM(machine.board_id)) {
omap_serial.base = OMAP3_DM37XX_DEBUG_UART_BASE;
} else if (BOARD_IS_BB(machine.board_id)){
} else if (BOARD_IS_BB(machine.board_id)) {
omap_serial.base = OMAP3_AM335X_DEBUG_UART_BASE;
}
omap_serial.size = 0x1000 ; /* 4k */
kern_phys_map_ptr(omap_serial.base,omap_serial.size,
&serial_phys_map, (vir_bytes) &omap_serial.base);
assert(omap_serial.base);
@ -59,20 +58,23 @@ void omap3_ser_init()
void omap3_ser_putc(char c)
{
int i;
assert(omap_serial.base);
int i;
/* Wait until FIFO's empty */
for (i = 0; i < 100000; i++)
if (mmio_read(omap_serial.base + OMAP3_LSR) & OMAP3_LSR_THRE)
for (i = 0; i < 100000; i++) {
if (mmio_read(omap_serial.base + OMAP3_LSR) & OMAP3_LSR_THRE) {
break;
}
}
/* Write character */
mmio_write(omap_serial.base + OMAP3_THR, c);
/* And wait again until FIFO's empty to prevent TTY from overwriting */
for (i = 0; i < 100000; i++)
if (mmio_read(omap_serial.base + OMAP3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT))
for (i = 0; i < 100000; i++) {
if (mmio_read(omap_serial.base + OMAP3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT)) {
break;
}
}
}

26
kernel/arch/earm/omap_timer.c
View file

@ -12,7 +12,8 @@
#include "omap_timer.h"
#include "omap_intr.h"
static irq_hook_t omap3_timer_hook; /* interrupt handler hook */
/* interrupt handler hook */
static irq_hook_t omap3_timer_hook;
static u64_t high_frc;
struct omap_timer_registers;
@ -151,7 +152,7 @@ void omap3_frclock_init(void)
u32_t tisr;
/* enable the clock */
if(BOARD_IS_BBXM(machine.board_id)){
if(BOARD_IS_BBXM(machine.board_id)) {
fr_timer = &dm37xx_fr_timer;
kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base);
@ -165,7 +166,7 @@ void omap3_frclock_init(void)
/* The scale is computed as 2^(PTV+1). So if PTV == 2, we get 2^3 = 8.
*/
mmio_set(fr_timer->base + fr_timer->regs->TCLR, (2 << OMAP3_TCLR_PTV));
} else if(BOARD_IS_BB(machine.board_id)){
} else if(BOARD_IS_BB(machine.board_id)) {
fr_timer = &am335x_fr_timer;
kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base);
/* Disable the module and wait for the module to be disabled */
@ -195,7 +196,8 @@ void omap3_frclock_init(void)
/* Set up overflow interrupt */
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
OMAP3_TISR_TCAR_IT_FLAG;
mmio_write(fr_timer->base + fr_timer->regs->TISR, tisr); /* Clear interrupt status */
/* Clear interrupt status */
mmio_write(fr_timer->base + fr_timer->regs->TISR, tisr);
mmio_write(fr_timer->base + fr_timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA);
/* Start timer */
@ -214,7 +216,7 @@ void omap3_timer_init(unsigned freq)
{
/* we only support 1ms resolution */
u32_t tisr;
if(BOARD_IS_BBXM(machine.board_id)){
if(BOARD_IS_BBXM(machine.board_id)) {
timer = &dm37xx_timer;
kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base);
/* Stop timer */
@ -222,7 +224,7 @@ void omap3_timer_init(unsigned freq)
/* Use 32 KHz clock source for GPTIMER1 */
mmio_clear(OMAP3_CM_CLKSEL_WKUP, OMAP3_CLKSEL_GPT1);
} else if(BOARD_IS_BB(machine.board_id)){
} else if(BOARD_IS_BB(machine.board_id)) {
timer = &am335x_timer;
kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base);
/* disable the module and wait for the module to be disabled */
@ -253,7 +255,8 @@ void omap3_timer_init(unsigned freq)
/* Set up overflow interrupt */
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
OMAP3_TISR_TCAR_IT_FLAG;
mmio_write(timer->base + timer->regs->TISR, tisr); /* Clear interrupt status */
/* Clear interrupt status */
mmio_write(timer->base + timer->regs->TISR, tisr);
mmio_write(timer->base + timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA);
/* Start timer */
@ -268,8 +271,9 @@ void omap3_timer_stop()
static u32_t read_frc(void)
{
if (done == 0)
if (done == 0) {
return 0;
}
return mmio_read(fr_timer->base + fr_timer->regs->TCRR);
}
@ -291,8 +295,9 @@ static void frc_overflow_check(u32_t cur_frc)
{
static int prev_frc_valid;
static u32_t prev_frc;
if(prev_frc_valid && prev_frc > cur_frc)
if(prev_frc_valid && prev_frc > cur_frc) {
high_frc++;
}
prev_frc = cur_frc;
prev_frc_valid = 1;
}
@ -305,8 +310,7 @@ void omap3_timer_int_handler()
/* when the kernel itself is running interrupts are disabled.
* We should therefore also read the overflow counter to detect
* this as to not miss events.
*/
* this as to not miss events. */
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
OMAP3_TISR_TCAR_IT_FLAG;
mmio_write(timer->base + timer->regs->TISR, tisr);

35
kernel/arch/earm/pg_utils.c
View file

@ -1,4 +1,3 @@
#include <minix/cpufeature.h>
#include <minix/type.h>
@ -72,12 +71,18 @@ void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len)
/* Truncate available memory at 4GB as the rest of minix
* currently can't deal with any bigger.
*/
if(addr > LIMIT) return;
if(addr > LIMIT) {
return;
}
if(addr + len > LIMIT) {
len -= (addr + len - LIMIT);
}
assert(cbi->mmap_size < MAXMEMMAP);
if(len == 0) return;
if(len == 0) {
return;
}
addr = roundup(addr, ARM_PAGE_SIZE);
len = rounddown(len, ARM_PAGE_SIZE);
@ -85,17 +90,19 @@ void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len)
for(m = 0; m < MAXMEMMAP; m++) {
phys_bytes highmark;
if(cbi->memmap[m].len) continue;
if(cbi->memmap[m].len) {
continue;
}
cbi->memmap[m].addr = addr;
cbi->memmap[m].len = len;
cbi->memmap[m].type = MULTIBOOT_MEMORY_AVAILABLE;
if(m >= cbi->mmap_size)
if(m >= cbi->mmap_size) {
cbi->mmap_size = m+1;
}
highmark = addr + len;
if(highmark > cbi->mem_high_phys) {
cbi->mem_high_phys = highmark;
}
return;
}
@ -108,7 +115,9 @@ u32_t *alloc_pagetable(phys_bytes *ph)
#define PG_PAGETABLES 24
static u32_t pagetables[PG_PAGETABLES][256] __aligned(1024);
static int pt_inuse = 0;
if(pt_inuse >= PG_PAGETABLES) panic("no more pagetables");
if(pt_inuse >= PG_PAGETABLES) {
panic("no more pagetables");
}
assert(sizeof(pagetables[pt_inuse]) == 1024);
ret = pagetables[pt_inuse++];
*ph = vir2phys(ret);
@ -126,7 +135,9 @@ phys_bytes pg_alloc_page(kinfo_t *cbi)
for(m = 0; m < cbi->mmap_size; m++) {
mmap = &cbi->memmap[m];
if(!mmap->len) continue;
if(!mmap->len) {
continue;
}
assert(mmap->len > 0);
assert(!(mmap->len % ARM_PAGE_SIZE));
assert(!(mmap->addr % ARM_PAGE_SIZE));
@ -161,7 +172,7 @@ void pg_identity(kinfo_t *cbi)
phys = i * ARM_SECTION_SIZE;
/* mark mormal memory as cacheable. TODO: fix hard coded values */
if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END){
if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END) {
pagedir[i] = phys | flags | ARM_VM_SECTION_CACHED;
} else {
pagedir[i] = phys | flags | ARM_VM_SECTION_DEVICE;
@ -243,8 +254,9 @@ void pg_clear(void)
phys_bytes pg_rounddown(phys_bytes b)
{
phys_bytes o;
if(!(o = b % ARM_PAGE_SIZE))
if(!(o = b % ARM_PAGE_SIZE)) {
return b;
}
return b - o;
}
@ -291,9 +303,10 @@ void pg_map(phys_bytes phys, vir_bytes vaddr, vir_bytes vaddr_end,
| ARM_VM_PTE_CACHED
| ARM_VM_PTE_USER;
vaddr += ARM_PAGE_SIZE;
if(phys != PG_ALLOCATEME)
if(phys != PG_ALLOCATEME) {
phys += ARM_PAGE_SIZE;
}
}
}
void pg_info(reg_t *pagedir_ph, u32_t **pagedir_v)

25
kernel/arch/earm/pre_init.c
View file

@ -1,4 +1,3 @@
#define UNPAGED 1 /* for proper kmain() prototype */
#include "kernel/kernel.h"
@ -62,7 +61,7 @@ int find_value(char * content,char * key,char *value,int value_max_len){
int key_len,content_len,match_len,value_len;
/* return if the input is invalid */
if (key == NULL || content == NULL || value == NULL){
if (key == NULL || content == NULL || value == NULL) {
return 1;
}
@ -78,8 +77,8 @@ int find_value(char * content,char * key,char *value,int value_max_len){
/* now find the key in the contents */
match_len =0;
for (iter = content ,keyp=key; match_len < key_len && *iter != '\0' ; iter++){
if (*iter == *keyp){
for (iter = content ,keyp=key; match_len < key_len && *iter != '\0' ; iter++) {
if (*iter == *keyp) {
match_len++;
keyp++;
continue;
@ -89,12 +88,12 @@ int find_value(char * content,char * key,char *value,int value_max_len){
keyp=key;
}
if (match_len == key_len){
if (match_len == key_len) {
printf("key found at %d %s\n", match_len, &content[match_len]);
value_len = 0;
/* copy the content to the value char iter already points to the first
char value */
while(*iter != '\0' && *iter != ' ' && value_len + 1< value_max_len){
while(*iter != '\0' && *iter != ' ' && value_len + 1< value_max_len) {
*value++ = *iter++;
value_len++;
}
@ -143,8 +142,9 @@ static int mb_set_param(char *bigbuf,char *name,char *value, kinfo_t *cbi)
if (p > bigbuf) p++;
/* Make sure there's enough space for the new parameter */
if (p + namelen + valuelen + 3 > bufend)
if (p + namelen + valuelen + 3 > bufend) {
return -1;
}
strcpy(p, name);
p[namelen] = '=';
@ -165,9 +165,10 @@ int overlaps(multiboot_module_t *mod, int n, int cmp_mod)
for(m = 0; m < n; m++) {
multiboot_module_t *thismod = &mod[m];
if(m == cmp_mod) continue;
if(OVERLAP(thismod, cmp))
if(OVERLAP(thismod, cmp)) {
return 1;
}
}
return 0;
}
@ -255,8 +256,9 @@ void get_parameters(kinfo_t *cbi, char *bootargs)
var[var_i++] = *p++ ;
var[var_i] = 0;
if (*p++ != '=') continue; /* skip if not name=value */
while (*p && *p != ' ' && value_i < BUF - 1)
while (*p && *p != ' ' && value_i < BUF - 1) {
value[value_i++] = *p++ ;
}
value[value_i] = 0;
mb_set_param(cbi->param_buf, var, value, cbi);
@ -377,9 +379,10 @@ kinfo_t *pre_init(int argc, char **argv)
* is the program name (load address) and the rest are
* arguments. by convention the second argument is the
* command line */
if (argc != 2){
if (argc != 2) {
POORMANS_FAILURE_NOTIFICATION;
}
bootargs = argv[1];
set_machine_id(bootargs);
omap3_ser_init();
@ -413,5 +416,5 @@ void minix_shutdown(timer_t *t) { arch_shutdown(RBT_PANIC); }
void busy_delay_ms(int x) { }
int raise(int n) { panic("raise(%d)\n", n); }
int kern_phys_map_ptr( phys_bytes base_address, vir_bytes io_size,
struct kern_phys_map * priv, vir_bytes ptr) {};
struct kern_phys_map * priv, vir_bytes ptr) {};
struct machine machine; /* pre init stage machine */

3
kernel/arch/earm/protect.c
View file

@ -22,7 +22,8 @@ int prot_init_done = 0;
phys_bytes vir2phys(void *vir)
{
extern char _kern_vir_base, _kern_phys_base; /* in kernel.lds */
/* defined in kernel.lds */
extern char _kern_vir_base, _kern_phys_base;
u32_t offset = (vir_bytes) &_kern_vir_base -
(vir_bytes) &_kern_phys_base;
return (phys_bytes)vir - offset;