sanchayanmaity/minix
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

arm:indenting

Browse source 
Change-Id: I2f8f664fa4c66649db8981e58e6bb7a6f533df5a
This commit is contained in:
Kees Jongenburger 2013-12-17 16:20:37 +01:00
parent 96f71be5a6
commit 502bc37a61
13 changed files with 312 additions and 295 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
kernel/arch/earm/arch_clock.c
View file

@ -1,4 +1,3 @@
/* ARM-specific clock functions. */ /* ARM-specific clock functions. */
#include "kernel/kernel.h" #include "kernel/kernel.h"
@ -30,9 +29,9 @@ int init_local_timer(unsigned freq)
omap3_timer_init(freq); omap3_timer_init(freq);
omap3_frclock_init(); omap3_frclock_init();
if (BOARD_IS_BBXM(machine.board_id)){ if (BOARD_IS_BBXM(machine.board_id)) {
tsc_per_ms[0] = 16250; tsc_per_ms[0] = 16250;
} else if (BOARD_IS_BB(machine.board_id)){ } else if (BOARD_IS_BB(machine.board_id)) {
tsc_per_ms[0] = 15000; tsc_per_ms[0] = 15000;
} else { } else {
panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id); panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id);

2
kernel/arch/earm/arch_do_vmctl.c
View file

@ -51,8 +51,6 @@ struct proc *p;
} }
} }
printf("arch_do_vmctl: strange param %d\n", m_ptr->SVMCTL_PARAM); printf("arch_do_vmctl: strange param %d\n", m_ptr->SVMCTL_PARAM);
return EINVAL; return EINVAL;
} }

4
kernel/arch/earm/arch_reset.c
View file

@ -1,4 +1,3 @@
#include "kernel/kernel.h" #include "kernel/kernel.h"
#include <unistd.h> #include <unistd.h>
@ -52,8 +51,7 @@ poweroff(void)
* The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8). * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
* At this point PM should have already signaled readclock to set the alarm. * At this point PM should have already signaled readclock to set the alarm.
*/ */
if (BOARD_IS_BB(machine.board_id)){ if (BOARD_IS_BB(machine.board_id)) {
/* Powers down the SoC within 3 seconds */ /* Powers down the SoC within 3 seconds */
direct_print("PMIC Power-Off in 3 Seconds\n"); direct_print("PMIC Power-Off in 3 Seconds\n");

11
kernel/arch/earm/arch_system.c
View file

@ -45,11 +45,12 @@ void arch_proc_reset(struct proc *pr)
assert(pr->p_nr < NR_PROCS); assert(pr->p_nr < NR_PROCS);
/* Clear process state. */ /* Clear process state. */
memset(&pr->p_reg, 0, sizeof(pr->p_reg)); memset(&pr->p_reg, 0, sizeof(pr->p_reg));
if(iskerneln(pr->p_nr)) if(iskerneln(pr->p_nr)) {
pr->p_reg.psr = INIT_TASK_PSR; pr->p_reg.psr = INIT_TASK_PSR;
else } else {
pr->p_reg.psr = INIT_PSR; pr->p_reg.psr = INIT_PSR;
}
} }
void arch_proc_setcontext(struct proc *p, struct stackframe_s *state, void arch_proc_setcontext(struct proc *p, struct stackframe_s *state,

29
kernel/arch/earm/omap_intr.c
View file

@ -22,18 +22,18 @@ static kern_phys_map intr_phys_map;
int intr_init(const int auto_eoi) int intr_init(const int auto_eoi)
{ {
if (BOARD_IS_BBXM(machine.board_id)){ if (BOARD_IS_BBXM(machine.board_id)) {
omap_intr.base = OMAP3_DM37XX_INTR_BASE; omap_intr.base = OMAP3_DM37XX_INTR_BASE;
} else if (BOARD_IS_BB(machine.board_id)){ } else if (BOARD_IS_BB(machine.board_id)) {
omap_intr.base = OMAP3_AM335X_INTR_BASE; omap_intr.base = OMAP3_AM335X_INTR_BASE;
} else { } else {
panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id); panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id);
}; };
omap_intr.size = 0x1000 ; /* 4K */ omap_intr.size = 0x1000 ; /* 4K */
kern_phys_map_ptr(omap_intr.base,omap_intr.size, kern_phys_map_ptr(omap_intr.base,omap_intr.size,
&intr_phys_map, (vir_bytes) &omap_intr.base); &intr_phys_map, (vir_bytes) &omap_intr.base);
return 0; return 0;
} }
void omap3_irq_handle(void) { void omap3_irq_handle(void) {
@ -44,16 +44,15 @@ void omap3_irq_handle(void) {
/* handle irq */ /* handle irq */
irq_handle(irq); irq_handle(irq);
/* re-enable. this should not trigger interrupts due to current cpsr state */ /* re-enable. this should not trigger interrupts due to current cpsr state */
mmio_write(omap_intr.base + OMAP3_INTCPS_CONTROL,OMAP3_INTR_NEWIRQAGR); mmio_write(omap_intr.base + OMAP3_INTCPS_CONTROL,OMAP3_INTR_NEWIRQAGR);
} }
void omap3_irq_unmask(int irq) void omap3_irq_unmask(int irq)
{ {
mmio_write(OMAP3_INTR_MIR_CLEAR(omap_intr.base, irq >> 5), 1 << (irq & 0x1f)); mmio_write(OMAP3_INTR_MIR_CLEAR(omap_intr.base, irq >> 5), 1 << (irq & 0x1f));
} }
void omap3_irq_mask(const int irq) void omap3_irq_mask(const int irq)
{ {
mmio_write(OMAP3_INTR_MIR_SET(omap_intr.base, irq >> 5), 1 << (irq & 0x1f)); mmio_write(OMAP3_INTR_MIR_SET(omap_intr.base, irq >> 5), 1 << (irq & 0x1f));
} }

6
kernel/arch/earm/omap_padconf.c
View file

@ -24,7 +24,7 @@ struct omap_padconf
}; };
struct omap_padconf omap_padconfs[] = { static struct omap_padconf omap_padconfs[] = {
{ {
.base = PADCONF_DM37XX_REGISTERS_BASE, .base = PADCONF_DM37XX_REGISTERS_BASE,
.offset = PADCONF_DM37XX_REGISTERS_OFFSET, .offset = PADCONF_DM37XX_REGISTERS_OFFSET,
@ -66,8 +66,8 @@ arch_padconf_init(void)
int x; int x;
omap_padconf = NULL; omap_padconf = NULL;
/* find the correct padconf */ /* find the correct padconf */
for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++){ for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++) {
if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value){ if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value) {
omap_padconf = &omap_padconfs[x]; omap_padconf = &omap_padconfs[x];
break; break;
} }

9
kernel/arch/earm/omap_reset.c
View file

@ -37,11 +37,10 @@ static kern_phys_map reset_phys_map;
void void
omap3_reset_init(void) omap3_reset_init(void)
{ {
if(BOARD_IS_BBXM(machine.board_id)) {
if(BOARD_IS_BBXM(machine.board_id)){
omap_reset.base = DM37XX_CM_BASE; omap_reset.base = DM37XX_CM_BASE;
omap_reset.size = DM37XX_CM_SIZE; omap_reset.size = DM37XX_CM_SIZE;
} else if(BOARD_IS_BB(machine.board_id)){ } else if(BOARD_IS_BB(machine.board_id)) {
omap_reset.base = AM335X_CM_BASE; omap_reset.base = AM335X_CM_BASE;
omap_reset.size = AM335X_CM_SIZE; omap_reset.size = AM335X_CM_SIZE;
} }
@ -53,9 +52,9 @@ omap3_reset_init(void)
void void
omap3_reset(void) omap3_reset(void)
{ {
if(BOARD_IS_BBXM(machine.board_id)){ if(BOARD_IS_BBXM(machine.board_id)) {
mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG), (1 << DM37XX_RST_DPLL3_BIT)); mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG), (1 << DM37XX_RST_DPLL3_BIT));
} else if(BOARD_IS_BB(machine.board_id)){ } else if(BOARD_IS_BB(machine.board_id)) {
mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET + AM335X_PRM_RSTCTRL_REG), (1 << AM335X_RST_GLOBAL_WARM_SW_BIT)); mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET + AM335X_PRM_RSTCTRL_REG), (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
} }
} }

16
kernel/arch/earm/omap_rtc.c
View file

@ -40,17 +40,17 @@ static kern_phys_map rtc_phys_map;
void void
omap3_rtc_init(void) omap3_rtc_init(void)
{ {
if (BOARD_IS_BB(machine.board_id)){ if (BOARD_IS_BB(machine.board_id)) {
kern_phys_map_ptr(omap_rtc.base, omap_rtc.size, &rtc_phys_map, kern_phys_map_ptr(omap_rtc.base, omap_rtc.size, &rtc_phys_map,
(vir_bytes) &omap_rtc.base); (vir_bytes) &omap_rtc.base);
} }
} }
void void
omap3_rtc_run(void) omap3_rtc_run(void)
{ {
if (BOARD_IS_BB(machine.board_id)){ if (BOARD_IS_BB(machine.board_id)) {
/* Setting the stop bit starts the RTC running */ /* Setting the stop bit starts the RTC running */
mmio_set((omap_rtc.base + RTC_CTRL_REG), (1 << RTC_CTRL_RTC_STOP_BIT)); mmio_set((omap_rtc.base + RTC_CTRL_REG), (1 << RTC_CTRL_RTC_STOP_BIT));
} }
} }

48
kernel/arch/earm/omap_serial.c
View file

@ -44,35 +44,37 @@ static kern_phys_map serial_phys_map;
*/ */
void omap3_ser_init() void omap3_ser_init()
{ {
if(BOARD_IS_BBXM(machine.board_id)){ if(BOARD_IS_BBXM(machine.board_id)) {
omap_serial.base = OMAP3_DM37XX_DEBUG_UART_BASE; omap_serial.base = OMAP3_DM37XX_DEBUG_UART_BASE;
} else if (BOARD_IS_BB(machine.board_id)){ } else if (BOARD_IS_BB(machine.board_id)) {
omap_serial.base = OMAP3_AM335X_DEBUG_UART_BASE; omap_serial.base = OMAP3_AM335X_DEBUG_UART_BASE;
} }
omap_serial.size = 0x1000 ; /* 4k */ omap_serial.size = 0x1000 ; /* 4k */
kern_phys_map_ptr(omap_serial.base,omap_serial.size,
kern_phys_map_ptr(omap_serial.base,omap_serial.size, &serial_phys_map, (vir_bytes) &omap_serial.base);
&serial_phys_map, (vir_bytes) &omap_serial.base); assert(omap_serial.base);
assert(omap_serial.base);
} }
void omap3_ser_putc(char c) void omap3_ser_putc(char c)
{ {
assert(omap_serial.base); int i;
assert(omap_serial.base);
int i; /* Wait until FIFO's empty */
for (i = 0; i < 100000; i++) {
if (mmio_read(omap_serial.base + OMAP3_LSR) & OMAP3_LSR_THRE) {
break;
}
}
/* Wait until FIFO's empty */ /* Write character */
for (i = 0; i < 100000; i++) mmio_write(omap_serial.base + OMAP3_THR, c);
if (mmio_read(omap_serial.base + OMAP3_LSR) & OMAP3_LSR_THRE)
break;
/* Write character */ /* And wait again until FIFO's empty to prevent TTY from overwriting */
mmio_write(omap_serial.base + OMAP3_THR, c); for (i = 0; i < 100000; i++) {
if (mmio_read(omap_serial.base + OMAP3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT)) {
/* And wait again until FIFO's empty to prevent TTY from overwriting */ break;
for (i = 0; i < 100000; i++) }
if (mmio_read(omap_serial.base + OMAP3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT)) }
break;
} }

212
kernel/arch/earm/omap_timer.c
View file

@ -12,7 +12,8 @@
#include "omap_timer.h" #include "omap_timer.h"
#include "omap_intr.h" #include "omap_intr.h"
static irq_hook_t omap3_timer_hook; /* interrupt handler hook */ /* interrupt handler hook */
static irq_hook_t omap3_timer_hook;
static u64_t high_frc; static u64_t high_frc;
struct omap_timer_registers; struct omap_timer_registers;
@ -96,30 +97,30 @@ static struct omap_timer_registers regs_v2 = {
}; };
static struct omap_timer dm37xx_timer = { static struct omap_timer dm37xx_timer = {
.base = OMAP3_GPTIMER1_BASE, .base = OMAP3_GPTIMER1_BASE,
.irq_nr = OMAP3_GPT1_IRQ, .irq_nr = OMAP3_GPT1_IRQ,
.regs = &regs_v1 .regs = &regs_v1
}; };
/* free running timer */ /* free running timer */
static struct omap_timer dm37xx_fr_timer = { static struct omap_timer dm37xx_fr_timer = {
.base = OMAP3_GPTIMER10_BASE, .base = OMAP3_GPTIMER10_BASE,
.irq_nr = OMAP3_GPT10_IRQ, .irq_nr = OMAP3_GPT10_IRQ,
.regs = &regs_v1 .regs = &regs_v1
}; };
/* normal timer */ /* normal timer */
static struct omap_timer am335x_timer = { static struct omap_timer am335x_timer = {
.base = AM335X_DMTIMER1_1MS_BASE, .base = AM335X_DMTIMER1_1MS_BASE,
.irq_nr = AM335X_INT_TINT1_1MS, .irq_nr = AM335X_INT_TINT1_1MS,
.regs = &regs_v1 .regs = &regs_v1
}; };
/* free running timer */ /* free running timer */
static struct omap_timer am335x_fr_timer = { static struct omap_timer am335x_fr_timer = {
.base = AM335X_DMTIMER7_BASE, .base = AM335X_DMTIMER7_BASE,
.irq_nr = AM335X_INT_TINT7, .irq_nr = AM335X_INT_TINT7,
.regs = &regs_v2 .regs = &regs_v2
}; };
static struct omap_timer *timer; static struct omap_timer *timer;
@ -136,7 +137,7 @@ int omap3_register_timer_handler(const irq_handler_t handler)
put_irq_handler(&omap3_timer_hook, timer->irq_nr, handler); put_irq_handler(&omap3_timer_hook, timer->irq_nr, handler);
/* only unmask interrupts after registering */ /* only unmask interrupts after registering */
omap3_irq_unmask(timer->irq_nr); omap3_irq_unmask(timer->irq_nr);
return 0; return 0;
} }
@ -151,125 +152,128 @@ void omap3_frclock_init(void)
u32_t tisr; u32_t tisr;
/* enable the clock */ /* enable the clock */
if(BOARD_IS_BBXM(machine.board_id)){ if(BOARD_IS_BBXM(machine.board_id)) {
fr_timer = &dm37xx_fr_timer; fr_timer = &dm37xx_fr_timer;
kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base); kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base);
/* Stop timer */ /* Stop timer */
mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST);
/* Use functional clock source for GPTIMER10 */ /* Use functional clock source for GPTIMER10 */
mmio_set(OMAP3_CM_CLKSEL_CORE, OMAP3_CLKSEL_GPT10); mmio_set(OMAP3_CM_CLKSEL_CORE, OMAP3_CLKSEL_GPT10);
/* Scale timer down to 13/8 = 1.625 Mhz to roughly get microsecond ticks */ /* Scale timer down to 13/8 = 1.625 Mhz to roughly get microsecond ticks */
/* The scale is computed as 2^(PTV+1). So if PTV == 2, we get 2^3 = 8. /* The scale is computed as 2^(PTV+1). So if PTV == 2, we get 2^3 = 8.
*/ */
mmio_set(fr_timer->base + fr_timer->regs->TCLR, (2 << OMAP3_TCLR_PTV)); mmio_set(fr_timer->base + fr_timer->regs->TCLR, (2 << OMAP3_TCLR_PTV));
} else if(BOARD_IS_BB(machine.board_id)){ } else if(BOARD_IS_BB(machine.board_id)) {
fr_timer = &am335x_fr_timer; fr_timer = &am335x_fr_timer;
kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base); kern_phys_map_ptr(fr_timer->base,ARM_PAGE_SIZE, &fr_timer_phys_map, (vir_bytes) &fr_timer->base);
/* Disable the module and wait for the module to be disabled */ /* Disable the module and wait for the module to be disabled */
set32(CM_PER_TIMER7_CLKCTRL, CM_MODULEMODE_MASK,CM_MODULEMODE_DISABLED); set32(CM_PER_TIMER7_CLKCTRL, CM_MODULEMODE_MASK,CM_MODULEMODE_DISABLED);
while( (mmio_read(CM_PER_TIMER7_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_DISABLE); while( (mmio_read(CM_PER_TIMER7_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_DISABLE);
set32(CLKSEL_TIMER7_CLK,CLKSEL_TIMER7_CLK_SEL_MASK, CLKSEL_TIMER7_CLK_SEL_SEL2); set32(CLKSEL_TIMER7_CLK,CLKSEL_TIMER7_CLK_SEL_MASK, CLKSEL_TIMER7_CLK_SEL_SEL2);
while( (read32(CLKSEL_TIMER7_CLK) & CLKSEL_TIMER7_CLK_SEL_MASK) != CLKSEL_TIMER7_CLK_SEL_SEL2); while( (read32(CLKSEL_TIMER7_CLK) & CLKSEL_TIMER7_CLK_SEL_MASK) != CLKSEL_TIMER7_CLK_SEL_SEL2);
/* enable the module and wait for the module to be ready */ /* enable the module and wait for the module to be ready */
set32(CM_PER_TIMER7_CLKCTRL,CM_MODULEMODE_MASK,CM_MODULEMODE_ENABLE); set32(CM_PER_TIMER7_CLKCTRL,CM_MODULEMODE_MASK,CM_MODULEMODE_ENABLE);
while( (mmio_read(CM_PER_TIMER7_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_FUNC); while( (mmio_read(CM_PER_TIMER7_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_FUNC);
/* Stop timer */ /* Stop timer */
mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST);
/* 24Mhz / 16 = 1.5 Mhz */ /* 24Mhz / 16 = 1.5 Mhz */
mmio_set(fr_timer->base + fr_timer->regs->TCLR, (3 << OMAP3_TCLR_PTV)); mmio_set(fr_timer->base + fr_timer->regs->TCLR, (3 << OMAP3_TCLR_PTV));
} }
/* Start and auto-reload at 0 */ /* Start and auto-reload at 0 */
mmio_write(fr_timer->base + fr_timer->regs->TLDR, 0x0); mmio_write(fr_timer->base + fr_timer->regs->TLDR, 0x0);
mmio_write(fr_timer->base + fr_timer->regs->TCRR, 0x0); mmio_write(fr_timer->base + fr_timer->regs->TCRR, 0x0);
/* Set up overflow interrupt */ /* Set up overflow interrupt */
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG | tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
OMAP3_TISR_TCAR_IT_FLAG; OMAP3_TISR_TCAR_IT_FLAG;
mmio_write(fr_timer->base + fr_timer->regs->TISR, tisr); /* Clear interrupt status */ /* Clear interrupt status */
mmio_write(fr_timer->base + fr_timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA); mmio_write(fr_timer->base + fr_timer->regs->TISR, tisr);
mmio_write(fr_timer->base + fr_timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA);
/* Start timer */ /* Start timer */
mmio_set(fr_timer->base + fr_timer->regs->TCLR, mmio_set(fr_timer->base + fr_timer->regs->TCLR,
OMAP3_TCLR_OVF_TRG|OMAP3_TCLR_AR|OMAP3_TCLR_ST|OMAP3_TCLR_PRE); OMAP3_TCLR_OVF_TRG|OMAP3_TCLR_AR|OMAP3_TCLR_ST|OMAP3_TCLR_PRE);
done = 1; done = 1;
} }
void omap3_frclock_stop() void omap3_frclock_stop()
{ {
mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST);
} }
void omap3_timer_init(unsigned freq) void omap3_timer_init(unsigned freq)
{ {
/* we only support 1ms resolution */ /* we only support 1ms resolution */
u32_t tisr; u32_t tisr;
if(BOARD_IS_BBXM(machine.board_id)){ if(BOARD_IS_BBXM(machine.board_id)) {
timer = &dm37xx_timer; timer = &dm37xx_timer;
kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base); kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base);
/* Stop timer */ /* Stop timer */
mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST);
/* Use 32 KHz clock source for GPTIMER1 */ /* Use 32 KHz clock source for GPTIMER1 */
mmio_clear(OMAP3_CM_CLKSEL_WKUP, OMAP3_CLKSEL_GPT1); mmio_clear(OMAP3_CM_CLKSEL_WKUP, OMAP3_CLKSEL_GPT1);
} else if(BOARD_IS_BB(machine.board_id)){ } else if(BOARD_IS_BB(machine.board_id)) {
timer = &am335x_timer; timer = &am335x_timer;
kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base); kern_phys_map_ptr(timer->base,ARM_PAGE_SIZE, &timer_phys_map, (vir_bytes) &timer->base);
/* disable the module and wait for the module to be disabled */ /* disable the module and wait for the module to be disabled */
set32(CM_WKUP_TIMER1_CLKCTRL, CM_MODULEMODE_MASK,CM_MODULEMODE_DISABLED); set32(CM_WKUP_TIMER1_CLKCTRL, CM_MODULEMODE_MASK,CM_MODULEMODE_DISABLED);
while( (mmio_read(CM_WKUP_TIMER1_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_DISABLE); while( (mmio_read(CM_WKUP_TIMER1_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_DISABLE);
set32(CLKSEL_TIMER1MS_CLK,CLKSEL_TIMER1MS_CLK_SEL_MASK, CLKSEL_TIMER1MS_CLK_SEL_SEL2); set32(CLKSEL_TIMER1MS_CLK,CLKSEL_TIMER1MS_CLK_SEL_MASK, CLKSEL_TIMER1MS_CLK_SEL_SEL2);
while( (read32(CLKSEL_TIMER1MS_CLK) & CLKSEL_TIMER1MS_CLK_SEL_MASK) != CLKSEL_TIMER1MS_CLK_SEL_SEL2); while( (read32(CLKSEL_TIMER1MS_CLK) & CLKSEL_TIMER1MS_CLK_SEL_MASK) != CLKSEL_TIMER1MS_CLK_SEL_SEL2);
/* enable the module and wait for the module to be ready */ /* enable the module and wait for the module to be ready */
set32(CM_WKUP_TIMER1_CLKCTRL,CM_MODULEMODE_MASK,CM_MODULEMODE_ENABLE); set32(CM_WKUP_TIMER1_CLKCTRL,CM_MODULEMODE_MASK,CM_MODULEMODE_ENABLE);
while( (mmio_read(CM_WKUP_TIMER1_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_FUNC); while( (mmio_read(CM_WKUP_TIMER1_CLKCTRL) & CM_CLKCTRL_IDLEST) != CM_CLKCTRL_IDLEST_FUNC);
/* Stop timer */ /* Stop timer */
mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST);
} }
/* Use 1-ms tick mode for GPTIMER1 TRM 16.2.4.2.1 */ /* Use 1-ms tick mode for GPTIMER1 TRM 16.2.4.2.1 */
mmio_write(timer->base + timer->regs->TPIR, 232000); mmio_write(timer->base + timer->regs->TPIR, 232000);
mmio_write(timer->base + timer->regs->TNIR, -768000); mmio_write(timer->base + timer->regs->TNIR, -768000);
mmio_write(timer->base + timer->regs->TLDR, 0xffffffff - (32768 / freq) +1); mmio_write(timer->base + timer->regs->TLDR, 0xffffffff - (32768 / freq) +1);
mmio_write(timer->base + timer->regs->TCRR, 0xffffffff - (32768 / freq) +1); mmio_write(timer->base + timer->regs->TCRR, 0xffffffff - (32768 / freq) +1);
/* Set up overflow interrupt */ /* Set up overflow interrupt */
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG | tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
OMAP3_TISR_TCAR_IT_FLAG; OMAP3_TISR_TCAR_IT_FLAG;
mmio_write(timer->base + timer->regs->TISR, tisr); /* Clear interrupt status */ /* Clear interrupt status */
mmio_write(timer->base + timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA); mmio_write(timer->base + timer->regs->TISR, tisr);
mmio_write(timer->base + timer->regs->TIER, OMAP3_TIER_OVF_IT_ENA);
/* Start timer */ /* Start timer */
mmio_set(timer->base + timer->regs->TCLR, mmio_set(timer->base + timer->regs->TCLR,
OMAP3_TCLR_OVF_TRG|OMAP3_TCLR_AR|OMAP3_TCLR_ST); OMAP3_TCLR_OVF_TRG|OMAP3_TCLR_AR|OMAP3_TCLR_ST);
} }
void omap3_timer_stop() void omap3_timer_stop()
{ {
mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST); mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST);
} }
static u32_t read_frc(void) static u32_t read_frc(void)
{ {
if (done == 0) if (done == 0) {
return 0; return 0;
}
return mmio_read(fr_timer->base + fr_timer->regs->TCRR); return mmio_read(fr_timer->base + fr_timer->regs->TCRR);
} }
@ -291,28 +295,28 @@ static void frc_overflow_check(u32_t cur_frc)
{ {
static int prev_frc_valid; static int prev_frc_valid;
static u32_t prev_frc; static u32_t prev_frc;
if(prev_frc_valid && prev_frc > cur_frc) if(prev_frc_valid && prev_frc > cur_frc) {
high_frc++; high_frc++;
}
prev_frc = cur_frc; prev_frc = cur_frc;
prev_frc_valid = 1; prev_frc_valid = 1;
} }
void omap3_timer_int_handler() void omap3_timer_int_handler()
{ {
/* Clear all interrupts */ /* Clear all interrupts */
u32_t tisr,now; u32_t tisr,now;
/* when the kernel itself is running interrupts are disabled. /* when the kernel itself is running interrupts are disabled.
* We should therefore also read the overflow counter to detect * We should therefore also read the overflow counter to detect
* this as to not miss events. * this as to not miss events. */
*/ tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG |
tisr = OMAP3_TISR_MAT_IT_FLAG | OMAP3_TISR_OVF_IT_FLAG | OMAP3_TISR_TCAR_IT_FLAG;
OMAP3_TISR_TCAR_IT_FLAG; mmio_write(timer->base + timer->regs->TISR, tisr);
mmio_write(timer->base + timer->regs->TISR, tisr);
now = read_frc(); now = read_frc();
frc_overflow_check(now); frc_overflow_check(now);
} }
/* Use the free running clock as TSC */ /* Use the free running clock as TSC */

127
kernel/arch/earm/pg_utils.c
View file

@ -1,4 +1,3 @@
#include <minix/cpufeature.h> #include <minix/cpufeature.h>
#include <minix/type.h> #include <minix/type.h>
@ -23,61 +22,67 @@ static u32_t pagedir[4096] __aligned(16384);
void print_memmap(kinfo_t *cbi) void print_memmap(kinfo_t *cbi)
{ {
int m; int m;
assert(cbi->mmap_size < MAXMEMMAP); assert(cbi->mmap_size < MAXMEMMAP);
for(m = 0; m < cbi->mmap_size; m++) { for(m = 0; m < cbi->mmap_size; m++) {
phys_bytes addr = cbi->memmap[m].addr, endit = cbi->memmap[m].addr + cbi->memmap[m].len; phys_bytes addr = cbi->memmap[m].addr, endit = cbi->memmap[m].addr + cbi->memmap[m].len;
printf("%08lx-%08lx ",addr, endit); printf("%08lx-%08lx ",addr, endit);
} }
printf("\nsize %08lx\n", cbi->mmap_size); printf("\nsize %08lx\n", cbi->mmap_size);
} }
void cut_memmap(kinfo_t *cbi, phys_bytes start, phys_bytes end) void cut_memmap(kinfo_t *cbi, phys_bytes start, phys_bytes end)
{ {
int m; int m;
phys_bytes o; phys_bytes o;
if((o=start % ARM_PAGE_SIZE)) if((o=start % ARM_PAGE_SIZE))
start -= o; start -= o;
if((o=end % ARM_PAGE_SIZE)) if((o=end % ARM_PAGE_SIZE))
end += ARM_PAGE_SIZE - o; end += ARM_PAGE_SIZE - o;
assert(kernel_may_alloc); assert(kernel_may_alloc);
for(m = 0; m < cbi->mmap_size; m++) { for(m = 0; m < cbi->mmap_size; m++) {
phys_bytes substart = start, subend = end; phys_bytes substart = start, subend = end;
phys_bytes memaddr = cbi->memmap[m].addr, phys_bytes memaddr = cbi->memmap[m].addr,
memend = cbi->memmap[m].addr + cbi->memmap[m].len; memend = cbi->memmap[m].addr + cbi->memmap[m].len;
/* adjust cut range to be a subset of the free memory */ /* adjust cut range to be a subset of the free memory */
if(substart < memaddr) substart = memaddr; if(substart < memaddr) substart = memaddr;
if(subend > memend) subend = memend; if(subend > memend) subend = memend;
if(substart >= subend) continue; if(substart >= subend) continue;
/* if there is any overlap, forget this one and add /* if there is any overlap, forget this one and add
* 1-2 subranges back * 1-2 subranges back
*/ */
cbi->memmap[m].addr = cbi->memmap[m].len = 0; cbi->memmap[m].addr = cbi->memmap[m].len = 0;
if(substart > memaddr) if(substart > memaddr)
add_memmap(cbi, memaddr, substart-memaddr); add_memmap(cbi, memaddr, substart-memaddr);
if(subend < memend) if(subend < memend)
add_memmap(cbi, subend, memend-subend); add_memmap(cbi, subend, memend-subend);
} }
} }
void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len) void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len)
{ {
int m; int m;
#define LIMIT 0xFFFFF000 #define LIMIT 0xFFFFF000
/* Truncate available memory at 4GB as the rest of minix /* Truncate available memory at 4GB as the rest of minix
* currently can't deal with any bigger. * currently can't deal with any bigger.
*/ */
if(addr > LIMIT) return; if(addr > LIMIT) {
if(addr + len > LIMIT) { return;
len -= (addr + len - LIMIT); }
}
assert(cbi->mmap_size < MAXMEMMAP); if(addr + len > LIMIT) {
if(len == 0) return; len -= (addr + len - LIMIT);
}
assert(cbi->mmap_size < MAXMEMMAP);
if(len == 0) {
return;
}
addr = roundup(addr, ARM_PAGE_SIZE); addr = roundup(addr, ARM_PAGE_SIZE);
len = rounddown(len, ARM_PAGE_SIZE); len = rounddown(len, ARM_PAGE_SIZE);
@ -85,21 +90,23 @@ void add_memmap(kinfo_t *cbi, u64_t addr, u64_t len)
for(m = 0; m < MAXMEMMAP; m++) { for(m = 0; m < MAXMEMMAP; m++) {
phys_bytes highmark; phys_bytes highmark;
if(cbi->memmap[m].len) continue; if(cbi->memmap[m].len) {
cbi->memmap[m].addr = addr; continue;
cbi->memmap[m].len = len; }
cbi->memmap[m].type = MULTIBOOT_MEMORY_AVAILABLE; cbi->memmap[m].addr = addr;
if(m >= cbi->mmap_size) cbi->memmap[m].len = len;
cbi->mmap_size = m+1; cbi->memmap[m].type = MULTIBOOT_MEMORY_AVAILABLE;
if(m >= cbi->mmap_size) {
cbi->mmap_size = m+1;
}
highmark = addr + len; highmark = addr + len;
if(highmark > cbi->mem_high_phys) { if(highmark > cbi->mem_high_phys) {
cbi->mem_high_phys = highmark; cbi->mem_high_phys = highmark;
} }
return;
return;
} }
panic("no available memmap slot"); panic("no available memmap slot");
} }
u32_t *alloc_pagetable(phys_bytes *ph) u32_t *alloc_pagetable(phys_bytes *ph)
@ -108,7 +115,9 @@ u32_t *alloc_pagetable(phys_bytes *ph)
#define PG_PAGETABLES 24 #define PG_PAGETABLES 24
static u32_t pagetables[PG_PAGETABLES][256] __aligned(1024); static u32_t pagetables[PG_PAGETABLES][256] __aligned(1024);
static int pt_inuse = 0; static int pt_inuse = 0;
if(pt_inuse >= PG_PAGETABLES) panic("no more pagetables"); if(pt_inuse >= PG_PAGETABLES) {
panic("no more pagetables");
}
assert(sizeof(pagetables[pt_inuse]) == 1024); assert(sizeof(pagetables[pt_inuse]) == 1024);
ret = pagetables[pt_inuse++]; ret = pagetables[pt_inuse++];
*ph = vir2phys(ret); *ph = vir2phys(ret);
@ -126,7 +135,9 @@ phys_bytes pg_alloc_page(kinfo_t *cbi)
for(m = 0; m < cbi->mmap_size; m++) { for(m = 0; m < cbi->mmap_size; m++) {
mmap = &cbi->memmap[m]; mmap = &cbi->memmap[m];
if(!mmap->len) continue; if(!mmap->len) {
continue;
}
assert(mmap->len > 0); assert(mmap->len > 0);
assert(!(mmap->len % ARM_PAGE_SIZE)); assert(!(mmap->len % ARM_PAGE_SIZE));
assert(!(mmap->addr % ARM_PAGE_SIZE)); assert(!(mmap->addr % ARM_PAGE_SIZE));
@ -161,7 +172,7 @@ void pg_identity(kinfo_t *cbi)
phys = i * ARM_SECTION_SIZE; phys = i * ARM_SECTION_SIZE;
/* mark mormal memory as cacheable. TODO: fix hard coded values */ /* mark mormal memory as cacheable. TODO: fix hard coded values */
if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END){ if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END) {
pagedir[i] = phys | flags | ARM_VM_SECTION_CACHED; pagedir[i] = phys | flags | ARM_VM_SECTION_CACHED;
} else { } else {
pagedir[i] = phys | flags | ARM_VM_SECTION_DEVICE; pagedir[i] = phys | flags | ARM_VM_SECTION_DEVICE;
@ -192,8 +203,8 @@ int pg_mapkernel(void)
void vm_enable_paging(void) void vm_enable_paging(void)
{ {
u32_t sctlr; u32_t sctlr;
u32_t actlr; u32_t actlr;
write_ttbcr(0); write_ttbcr(0);
@ -231,7 +242,7 @@ void vm_enable_paging(void)
phys_bytes pg_load() phys_bytes pg_load()
{ {
phys_bytes phpagedir = vir2phys(pagedir); phys_bytes phpagedir = vir2phys(pagedir);
write_ttbr0(phpagedir); write_ttbr0(phpagedir);
return phpagedir; return phpagedir;
} }
@ -243,8 +254,9 @@ void pg_clear(void)
phys_bytes pg_rounddown(phys_bytes b) phys_bytes pg_rounddown(phys_bytes b)
{ {
phys_bytes o; phys_bytes o;
if(!(o = b % ARM_PAGE_SIZE)) if(!(o = b % ARM_PAGE_SIZE)) {
return b; return b;
}
return b - o; return b - o;
} }
@ -291,8 +303,9 @@ void pg_map(phys_bytes phys, vir_bytes vaddr, vir_bytes vaddr_end,
| ARM_VM_PTE_CACHED | ARM_VM_PTE_CACHED
| ARM_VM_PTE_USER; | ARM_VM_PTE_USER;
vaddr += ARM_PAGE_SIZE; vaddr += ARM_PAGE_SIZE;
if(phys != PG_ALLOCATEME) if(phys != PG_ALLOCATEME) {
phys += ARM_PAGE_SIZE; phys += ARM_PAGE_SIZE;
}
} }
} }

41
kernel/arch/earm/pre_init.c
View file

@ -1,4 +1,3 @@
#define UNPAGED 1 /* for proper kmain() prototype */ #define UNPAGED 1 /* for proper kmain() prototype */
#include "kernel/kernel.h" #include "kernel/kernel.h"
@ -62,7 +61,7 @@ int find_value(char * content,char * key,char *value,int value_max_len){
int key_len,content_len,match_len,value_len; int key_len,content_len,match_len,value_len;
/* return if the input is invalid */ /* return if the input is invalid */
if (key == NULL || content == NULL || value == NULL){ if (key == NULL || content == NULL || value == NULL) {
return 1; return 1;
} }
@ -78,8 +77,8 @@ int find_value(char * content,char * key,char *value,int value_max_len){
/* now find the key in the contents */ /* now find the key in the contents */
match_len =0; match_len =0;
for (iter = content ,keyp=key; match_len < key_len && *iter != '\0' ; iter++){ for (iter = content ,keyp=key; match_len < key_len && *iter != '\0' ; iter++) {
if (*iter == *keyp){ if (*iter == *keyp) {
match_len++; match_len++;
keyp++; keyp++;
continue; continue;
@ -89,12 +88,12 @@ int find_value(char * content,char * key,char *value,int value_max_len){
keyp=key; keyp=key;
} }
if (match_len == key_len){ if (match_len == key_len) {
printf("key found at %d %s\n", match_len, &content[match_len]); printf("key found at %d %s\n", match_len, &content[match_len]);
value_len = 0; value_len = 0;
/* copy the content to the value char iter already points to the first /* copy the content to the value char iter already points to the first
char value */ char value */
while(*iter != '\0' && *iter != ' ' && value_len + 1< value_max_len){ while(*iter != '\0' && *iter != ' ' && value_len + 1< value_max_len) {
*value++ = *iter++; *value++ = *iter++;
value_len++; value_len++;
} }
@ -143,8 +142,9 @@ static int mb_set_param(char *bigbuf,char *name,char *value, kinfo_t *cbi)
if (p > bigbuf) p++; if (p > bigbuf) p++;
/* Make sure there's enough space for the new parameter */ /* Make sure there's enough space for the new parameter */
if (p + namelen + valuelen + 3 > bufend) if (p + namelen + valuelen + 3 > bufend) {
return -1; return -1;
}
strcpy(p, name); strcpy(p, name);
p[namelen] = '='; p[namelen] = '=';
@ -161,12 +161,13 @@ int overlaps(multiboot_module_t *mod, int n, int cmp_mod)
#define INRANGE(mod, v) ((v) >= mod->mod_start && (v) <= thismod->mod_end) #define INRANGE(mod, v) ((v) >= mod->mod_start && (v) <= thismod->mod_end)
#define OVERLAP(mod1, mod2) (INRANGE(mod1, mod2->mod_start) || \ #define OVERLAP(mod1, mod2) (INRANGE(mod1, mod2->mod_start) || \
INRANGE(mod1, mod2->mod_end)) INRANGE(mod1, mod2->mod_end))
for(m = 0; m < n; m++) { for(m = 0; m < n; m++) {
multiboot_module_t *thismod = &mod[m]; multiboot_module_t *thismod = &mod[m];
if(m == cmp_mod) continue; if(m == cmp_mod) continue;
if(OVERLAP(thismod, cmp)) if(OVERLAP(thismod, cmp)) {
return 1; return 1;
}
} }
return 0; return 0;
} }
@ -191,10 +192,10 @@ void setup_mbi(multiboot_info_t *mbi, char *bootargs)
int i; int i;
for (i = 0; i < MB_MODS_NR; ++i) { for (i = 0; i < MB_MODS_NR; ++i) {
mb_modlist[i].mod_start = MB_MODS_BASE + i * MB_MODS_ALIGN; mb_modlist[i].mod_start = MB_MODS_BASE + i * MB_MODS_ALIGN;
mb_modlist[i].mod_end = mb_modlist[i].mod_start + MB_MODS_ALIGN mb_modlist[i].mod_end = mb_modlist[i].mod_start + MB_MODS_ALIGN
- ARM_PAGE_SIZE; - ARM_PAGE_SIZE;
mb_modlist[i].cmdline = 0; mb_modlist[i].cmdline = 0;
} }
/* morph the bootargs into multiboot */ /* morph the bootargs into multiboot */
@ -216,9 +217,9 @@ void get_parameters(kinfo_t *cbi, char *bootargs)
int var_i,value_i, m, k; int var_i,value_i, m, k;
char *p; char *p;
extern char _kern_phys_base, _kern_vir_base, _kern_size, extern char _kern_phys_base, _kern_vir_base, _kern_size,
_kern_unpaged_start, _kern_unpaged_end; _kern_unpaged_start, _kern_unpaged_end;
phys_bytes kernbase = (phys_bytes) &_kern_phys_base, phys_bytes kernbase = (phys_bytes) &_kern_phys_base,
kernsize = (phys_bytes) &_kern_size; kernsize = (phys_bytes) &_kern_size;
#define BUF 1024 #define BUF 1024
static char cmdline[BUF]; static char cmdline[BUF];
@ -255,8 +256,9 @@ void get_parameters(kinfo_t *cbi, char *bootargs)
var[var_i++] = *p++ ; var[var_i++] = *p++ ;
var[var_i] = 0; var[var_i] = 0;
if (*p++ != '=') continue; /* skip if not name=value */ if (*p++ != '=') continue; /* skip if not name=value */
while (*p && *p != ' ' && value_i < BUF - 1) while (*p && *p != ' ' && value_i < BUF - 1) {
value[value_i++] = *p++ ; value[value_i++] = *p++ ;
}
value[value_i] = 0; value[value_i] = 0;
mb_set_param(cbi->param_buf, var, value, cbi); mb_set_param(cbi->param_buf, var, value, cbi);
@ -352,7 +354,7 @@ void set_machine_id(char *cmdline)
if (find_value(cmdline,"board_name=",boardname,20)){ if (find_value(cmdline,"board_name=",boardname,20)){
/* we expect the bootloader to pass a board_name as argument /* we expect the bootloader to pass a board_name as argument
* this however did not happen and given we still are in early * this however did not happen and given we still are in early
* boot we can't use the serial. We therefore generate an interrupt * boot we can't use the serial. We therefore generate an interrupt
* and hope the bootloader will do something nice with it */ * and hope the bootloader will do something nice with it */
POORMANS_FAILURE_NOTIFICATION; POORMANS_FAILURE_NOTIFICATION;
} }
@ -377,9 +379,10 @@ kinfo_t *pre_init(int argc, char **argv)
* is the program name (load address) and the rest are * is the program name (load address) and the rest are
* arguments. by convention the second argument is the * arguments. by convention the second argument is the
* command line */ * command line */
if (argc != 2){ if (argc != 2) {
POORMANS_FAILURE_NOTIFICATION; POORMANS_FAILURE_NOTIFICATION;
} }
bootargs = argv[1]; bootargs = argv[1];
set_machine_id(bootargs); set_machine_id(bootargs);
omap3_ser_init(); omap3_ser_init();
@ -413,5 +416,5 @@ void minix_shutdown(timer_t *t) { arch_shutdown(RBT_PANIC); }
void busy_delay_ms(int x) { } void busy_delay_ms(int x) { }
int raise(int n) { panic("raise(%d)\n", n); } int raise(int n) { panic("raise(%d)\n", n); }
int kern_phys_map_ptr( phys_bytes base_address, vir_bytes io_size, int kern_phys_map_ptr( phys_bytes base_address, vir_bytes io_size,
struct kern_phys_map * priv, vir_bytes ptr) {}; struct kern_phys_map * priv, vir_bytes ptr) {};
struct machine machine; /* pre init stage machine */ struct machine machine; /* pre init stage machine */

43
kernel/arch/earm/protect.c
View file

@ -22,9 +22,10 @@ int prot_init_done = 0;
phys_bytes vir2phys(void *vir) phys_bytes vir2phys(void *vir)
{ {
extern char _kern_vir_base, _kern_phys_base; /* in kernel.lds */ /* defined in kernel.lds */
extern char _kern_vir_base, _kern_phys_base;
u32_t offset = (vir_bytes) &_kern_vir_base - u32_t offset = (vir_bytes) &_kern_vir_base -
(vir_bytes) &_kern_phys_base; (vir_bytes) &_kern_phys_base;
return (phys_bytes)vir - offset; return (phys_bytes)vir - offset;
} }
@ -74,39 +75,39 @@ int booting_cpu = 0;
void prot_init() void prot_init()
{ {
write_vbar((reg_t)&exc_vector_table); write_vbar((reg_t)&exc_vector_table);
/* Set up a new post-relocate bootstrap pagetable so that /* Set up a new post-relocate bootstrap pagetable so that
* we can map in VM, and we no longer rely on pre-relocated * we can map in VM, and we no longer rely on pre-relocated
* data. * data.
*/ */
pg_clear(); pg_clear();
pg_identity(&kinfo); /* Still need 1:1 for device memory . */ pg_identity(&kinfo); /* Still need 1:1 for device memory . */
pg_mapkernel(); pg_mapkernel();
pg_load(); pg_load();
prot_init_done = 1; prot_init_done = 1;
} }
static int alloc_for_vm = 0; static int alloc_for_vm = 0;
void arch_post_init(void) void arch_post_init(void)
{ {
/* Let memory mapping code know what's going on at bootstrap time */ /* Let memory mapping code know what's going on at bootstrap time */
struct proc *vm; struct proc *vm;
vm = proc_addr(VM_PROC_NR); vm = proc_addr(VM_PROC_NR);
get_cpulocal_var(ptproc) = vm; get_cpulocal_var(ptproc) = vm;
pg_info(&vm->p_seg.p_ttbr, &vm->p_seg.p_ttbr_v); pg_info(&vm->p_seg.p_ttbr, &vm->p_seg.p_ttbr_v);
} }
int libexec_pg_alloc(struct exec_info *execi, off_t vaddr, size_t len) int libexec_pg_alloc(struct exec_info *execi, off_t vaddr, size_t len)
{ {
pg_map(PG_ALLOCATEME, vaddr, vaddr+len, &kinfo); pg_map(PG_ALLOCATEME, vaddr, vaddr+len, &kinfo);
pg_load(); pg_load();
memset((char *) vaddr, 0, len); memset((char *) vaddr, 0, len);
alloc_for_vm += len; alloc_for_vm += len;
return OK; return OK;
} }
void arch_boot_proc(struct boot_image *ip, struct proc *rp) void arch_boot_proc(struct boot_image *ip, struct proc *rp)