Lan8710 driver initial version, after first review

Change-Id: If00cf1e098da5875eb040f8765273a6fa5e43e33

distrib/sets/lists/minix/md.evbarm

@@ -4,6 +4,7 @@
 ./boot/minix/.temp/mod10_vm		minix-sys
 ./boot/minix/.temp/mod11_pfs		minix-sys
 ./boot/minix/.temp/mod12_init		minix-sys
+./etc/system.conf.d/lan8710a		minix-sys
 ./multiboot/mod07_log			minix-sys
 ./multiboot/mod08_tty			minix-sys
 ./multiboot/mod09_mfs			minix-sys
@@ -108,6 +109,7 @@
 ./usr/sbin/fb				minix-sys
 ./usr/sbin/gpio				minix-sys
 ./usr/sbin/i2c				minix-sys
+./usr/sbin/lan8710a			minix-sys
 ./usr/sbin/random			minix-sys
 ./usr/sbin/tda19988			minix-sys
 ./usr/tests/minix-posix/mod		minix-sys

drivers/Makefile

@@ -23,7 +23,7 @@ SUBDIR= ahci amddev atl2 at_wini audio dec21140A dp8390 dpeth \
 .endif
 
 .if ${MACHINE_ARCH} == "earm"
-SUBDIR=  cat24c256 fb gpio i2c mmc log tda19988 tty random
+SUBDIR=  cat24c256 fb gpio i2c mmc log tda19988 tty random lan8710a
 .endif
 
 .endif # ${MKIMAGEONLY} != "yes"

drivers/lan8710a/Makefile

@@ -0,0 +1,16 @@
+# Makefile for the lan8710a ethernet driver.
+PROG=   lan8710a
+SRCS=   lan8710a.c
+
+FILES=$(PROG).conf
+FILESNAME=$(PROG)
+FILESDIR= /etc/system.conf.d
+
+DPADD+=	${LIBNETDRIVER} ${LIBSYS} ${LIBTIMERS}
+LDADD+=	-lnetdriver -lsys -ltimers
+
+MAN=
+
+BINDIR?= /usr/sbin
+
+.include <minix.service.mk>

drivers/lan8710a/README.txt

@@ -0,0 +1,41 @@
+--------------------------------------------------------------------------------
+*                           INFORMATION:                                       *
+--------------------------------------------------------------------------------
+README file for the LAN8710A ethernet board driver for BeagleBone Rev. A6a
+
+created July 2013, JPEmbedded (info@jpembedded.eu)
+
+--------------------------------------------------------------------------------
+*                           INSTALLATION:                                      *
+--------------------------------------------------------------------------------
+To install LAN8710A for BeagleBone under MINIX you have to edit /etc/inet.conf
+by adding line:
+eth0 lan8710a 0 { default; };
+and changing:
+psip0 { default; };
+to:
+psip1;
+Restart the system and the driver should work.
+
+--------------------------------------------------------------------------------
+*                                 TESTS:                                       *
+--------------------------------------------------------------------------------
+Driver was tested using various tools, i. e.
+* fetch - downloading file from the Internet and also local server. Every file
+	  downloaded well, but speed was about 50-200 kB/s.
+* ftp - downloading and uploading 20 MB file completed.
+* ping - checking connection between BeagleBone and computer passed using stan -
+	 dard  settings,  when we set ping  requests interval  to 200 ms it also
+	 passed. But  with 20 ms  and 2 ms  driver dropped some packets (20 ms -
+	 about 20% loss, 2 ms - 50% loss).
+* udpstat, hostaddr, dhcpd, ifconfig, arp gave proper results.
+Tests passed, so driver meets the requirements of ethernet driver.
+
+--------------------------------------------------------------------------------
+*                                LIMITATION:                                   *
+--------------------------------------------------------------------------------
+Download speed:  50-200 kB/s
+Low bandwidth is probably caused by memory copy functions. Standard Linux driver 
+copies packets data directly to destination buffer using DMA. Minix driver needs
+to do a safe copy (sys_safecopyfrom and sys_safecopyto) from local buffer to the 
+system buffer. This operation slows down the whole driver.

drivers/lan8710a/lan8710a.conf

@@ -0,0 +1,17 @@
+service lan8710a
+{
+	type net;
+	descr "Beaglebone Ethernet Controller LAN8710A";
+	system
+		PRIVCTL		#  4
+		UMAP		# 14
+		IRQCTL		# 19
+		DEVIO		# 21
+	;
+	ipc
+		tty inet lwip
+	;
+	irq	41		# IRQ 41 allowed
+		42		# IRQ 42 allowed
+	;
+};

drivers/lan8710a/lan8710a.h

@@ -0,0 +1,123 @@
+#ifndef LAN8710A_H_
+#define LAN8710A_H_
+
+#include <net/gen/ether.h>
+
+#define LAN8710A_DEBUG		(1)
+
+#if LAN8710A_DEBUG == 1
+	#define LAN8710A_DEBUG_PRINT(args) 		\
+		do {					\
+			printf("LAN8710A DEBUG: ");	\
+			printf args; 			\
+			printf("\n");			\
+		} while (0)
+#else
+	#define LAN8710A_DEBUG_PRINT(args)
+#endif
+
+#ifndef ERR
+	#define ERR (-1)	/* general error flag */
+#endif
+#ifndef OK
+	#define OK 0		/* general OK flag */
+#endif
+
+#define MAP_FAILED 		((void *) -1)	/* mmap() failed */
+
+/* Ethernet driver defines */
+#define LAN8710A_NAME_LEN	(11)
+
+/* Ethernet driver states */
+#define LAN8710A_DETECTED	(1 << 0)
+#define LAN8710A_ENABLED	(1 << 1)
+#define LAN8710A_READING	(1 << 2)
+#define LAN8710A_WRITING	(1 << 3)
+#define LAN8710A_RECEIVED	(1 << 4)
+#define LAN8710A_TRANSMIT	(1 << 5)
+
+/* Descriptors flags */
+#define LAN8710A_DESC_FLAG_OWN		(1 << 29) /* ownership flag */
+#define LAN8710A_DESC_FLAG_SOP		(1 << 31) /* start of packet flag */
+#define LAN8710A_DESC_FLAG_EOP		(1 << 30) /* end of packet flag */
+
+/* Number of Tx and Rx interrupts */
+#define LAN8710A_RX_INTR		(41)
+#define LAN8710A_TX_INTR		(42)
+
+/* Values to be written after interrupt handle and interrupt masks*/
+#define RX_INT				(1)
+#define TX_INT				(2)
+
+/** Numbers of Tx DMA channels */
+#define TX_DMA_CHANNELS			(8)
+
+/** Number of transmit descriptors */
+#define LAN8710A_NUM_TX_DESC		(255)
+
+/** Number of receive descriptors */
+#define LAN8710A_NUM_RX_DESC		(255)
+
+/** Number of I/O vectors to use. */
+#define LAN8710A_IOVEC_NR		(16)
+
+/** Size of each I/O buffer per descriptor. */
+#define LAN8710A_IOBUF_SIZE		(1520)
+
+/** MAC address override variable. */
+#define LAN8710A_ENVVAR 		"LAN8710AETH"
+
+/** MAX DMA Channels */
+#define DMA_MAX_CHANNELS		(8)
+
+/* Setting of Tx descriptors */
+#define TX_DESC_TO_PORT1 		(1 << 16)
+#define TX_DESC_TO_PORT_EN 		(1 << 20)
+
+typedef struct lan8710a_desc_t
+{
+	u32_t  next_pointer;
+	u32_t  buffer_pointer;
+	u32_t  buffer_length_off;
+	u32_t  pkt_len_flags;
+} lan8710a_desc_t;
+
+typedef struct lan8710a_t
+{
+	lan8710a_desc_t  *rx_desc;
+	lan8710a_desc_t  *tx_desc;
+	phys_bytes  rx_desc_phy;
+	phys_bytes  tx_desc_phy;
+	char  name[LAN8710A_NAME_LEN];
+	int  status;
+	int  irq_rx_hook;	/* Rx interrupt Request Vector Hook. */
+	int  irq_tx_hook;	/* Tx interrupt Request Vector Hook. */
+	int  instance;
+	ether_addr_t  address;	/* Ethernet MAC address. */
+	u8_t  *regs;
+	u32_t  phy_address;
+	u8_t  *p_rx_buf;	/* pointer to the buffer with receive frames */
+	u8_t  *p_tx_buf;	/* pointer to the buffer with transmit frames */
+
+	u16_t  tx_desc_idx;	/* index of the next transmit desciptor */
+	u16_t  rx_desc_idx;	/* index of the next receive desciptor */
+	int  client;
+	message  tx_message;
+	message  rx_message;
+	unsigned int  rx_size;
+
+	/* register mapping */
+	vir_bytes  regs_cp_per;
+	vir_bytes  regs_mdio;
+	vir_bytes  regs_cpsw_cpdma;
+	vir_bytes  regs_ctrl_mod;
+	vir_bytes  regs_cpsw_sl;
+	vir_bytes  regs_cpsw_ss;
+	vir_bytes  regs_cpsw_stats;
+	vir_bytes  regs_cpsw_ale;
+	vir_bytes  regs_cpsw_wr;
+	vir_bytes  regs_intc;
+	vir_bytes  regs_cpdma_stram;
+} lan8710a_t;
+
+#endif /* LAN8710A_H_ */

drivers/lan8710a/lan8710a_reg.h

@@ -0,0 +1,203 @@
+#ifndef LAN8710A_REG_H_
+#define LAN8710A_REG_H_
+
+/* How much memory we should map */
+#define MEMORY_LIMIT		(0x5302000)
+#define BEGINNING_DESC_MEM	(0x4A102000)
+#define DESC_MEMORY_LIMIT	(0x2000)
+#define BEGINNING_RX_DESC_MEM	(0x4A102000)
+#define BEGINNING_TX_DESC_MEM	(0x4A103000)
+
+/* MDIO Registers */
+#define MDIO_BASE_ADDR		(0x4A101000)
+#define MDIOVER			((volatile u32_t *)( lan8710a_state.regs_mdio + 0x00))
+#define MDIOCONTROL		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x04))
+#define MDIOALIVE		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x08))
+#define MDIOLINK		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x0C))
+#define MDIOLINKINTRAW		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x10))
+#define MDIOLINKINTMASKED	((volatile u32_t *)( lan8710a_state.regs_mdio + 0x14))
+#define MDIOUSERINTRAW		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x20))
+#define MDIOUSERINTMASKED	((volatile u32_t *)( lan8710a_state.regs_mdio + 0x24))
+#define MDIOUSERINTMASKSET	((volatile u32_t *)( lan8710a_state.regs_mdio + 0x28))
+#define MDIOUSERINTMASKCLR	((volatile u32_t *)( lan8710a_state.regs_mdio + 0x2C))
+#define MDIOUSERACCESS0		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x80))
+#define MDIOUSERPHYSEL0		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x84))
+#define MDIOUSERACCESS1		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x88))
+#define MDIOUSERPHYSEL1		((volatile u32_t *)( lan8710a_state.regs_mdio + 0x8C))
+
+#define MDIO_PREAMBLE		(1 << 20)
+#define MDCLK_DIVIDER		(0x255)
+#define MDIO_ENABLE		(1 << 30)
+#define MDIO_GO			(1 << 31)
+#define MDIO_WRITE		(1 << 30)
+#define MDIO_ACK		(1 << 29)
+
+#define MDIO_REGADR		(21)
+#define MDIO_PHYADR		(16)
+#define MDIO_DATA		(0)
+
+/* CONTROL MODULE Registers */
+#define CTRL_MOD_BASE_ADR	(0x44E10000)
+#define CTRL_MAC_ID0_LO		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x630))
+#define CTRL_MAC_ID0_HI		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x634))
+#define GMII_SEL		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x650))
+#define CONF_MII1_COL		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x908))
+#define CONF_MII1_CRS		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x90C))
+#define CONF_MII1_RX_ER		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x910))
+#define CONF_MII1_TX_EN		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x914))
+#define CONF_MII1_RX_DV		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x918))
+#define CONF_MII1_TXD3		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x91C))
+#define CONF_MII1_TXD2		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x920))
+#define CONF_MII1_TXD1		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x924))
+#define CONF_MII1_TXD0		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x928))
+#define CONF_MII1_TX_CLK	((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x92C))
+#define CONF_MII1_RX_CLK	((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x930))
+#define CONF_MII1_RXD3		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x934))
+#define CONF_MII1_RXD2		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x938))
+#define CONF_MII1_RXD1		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x93C))
+#define CONF_MII1_RXD0		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x940))
+#define CONF_MDIO		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x948))
+#define CONF_MDC		((volatile u32_t *)( lan8710a_state.regs_ctrl_mod + 0x94C))
+
+#define CONF_MOD_SLEW_CTRL	(1 << 6)
+#define CONF_MOD_RX_ACTIVE	(1 << 5)
+#define CONF_MOD_PU_TYPESEL	(1 << 4)
+#define CONF_MOD_PUDEN		(1 << 3)
+#define CONF_MOD_MMODE_MII	(7 << 0)
+#define RMII1_IO_CLK_EN		(1 << 6)
+#define RGMII1_IDMODE		(1 << 4)
+#define GMII2_SEL_BIT1		(1 << 3)
+#define GMII2_SEL_BIT0		(1 << 2)
+#define GMII1_SEL_BIT1		(1 << 1)
+#define GMII1_SEL_BIT0		(1 << 0)
+
+/* CLOCK MODULE Registers */
+#define CM_PER_BASE_ADR		(0x44E00000)
+#define CM_PER_CPSW_CLKSTCTRL	((volatile u32_t *)( lan8710a_state.regs_cp_per + 0x144))
+
+#define CM_PER_CPSW_CLKSTCTRL_BIT1	(1 << 1)
+#define CM_PER_CPSW_CLKSTCTRL_BIT0	(1 << 0)
+
+/* CPSW_ALE Registers */
+#define CPSW_ALE_BASE_ADR	(0x4A100D00)
+#define CPSW_ALE_CONTROL	((volatile u32_t *)( lan8710a_state.regs_cpsw_ale + 0x08))
+#define CPSW_ALE_PORTCTL0	((volatile u32_t *)( lan8710a_state.regs_cpsw_ale + 0x40))
+#define CPSW_ALE_PORTCTL1	((volatile u32_t *)( lan8710a_state.regs_cpsw_ale + 0x44))
+
+#define CPSW_ALE_ENABLE		(1 << 31)
+#define CPSW_ALE_BYPASS		(1 << 4)
+#define CPSW_ALE_PORT_FWD	(3 << 0)
+
+/* CPSW_SL Registers */
+#define CPSW_SL_BASE_ADR	(0x4A100D80)
+#define CPSW_SL_MACCONTROL(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x04))
+#define CPSW_SL_SOFT_RESET(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x0C))
+#define CPSW_SL_RX_MAXLEN(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x10))
+#define CPSW_SL_BOFFTEST(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x14))
+#define CPSW_SL_EMCONTROL(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x20))
+#define CPSW_SL_RX_PRI_MAP(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x24))
+#define CPSW_SL_TX_GAP(x)	((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x28))
+
+#define CPSW_SL_GMII_EN		(1 << 5)
+#define CPSW_SL_FULLDUPLEX	(1 << 0)
+#define SOFT_RESET		(1 << 0)
+
+/* CPSW_STATS Registers */
+#define CPSW_STATS_BASE_ADR	(0x4A100900)
+#define CPSW_STATS_MEM_LIMIT	(0x90)
+#define CPSW_STAT_RX_GOOD	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x00))
+#define CPSW_STAT_RX_CRC_ERR	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x10))
+#define CPSW_STAT_RX_AGNCD_ERR	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x14))
+#define CPSW_STAT_RX_OVERSIZE	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x18))
+#define CPSW_STAT_TX_GOOD	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x34))
+#define CPSW_STAT_COLLISIONS	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x48))
+#define CPSW_STAT_TX_UNDERRUN	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x5C))
+#define CPSW_STAT_CARR_SENS_ERR	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x60))
+#define CPSW_STAT_RX_OVERRUN	((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x8C))
+
+/* CPSW_CPDMA Registers */
+#define CPSW_CPDMA_BASE_ADR	(0x4A100800)
+#define CPDMA_SOFT_RESET	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x1C))
+#define CPDMA_TX_CONTROL	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x04))
+#define CPDMA_RX_CONTROL	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x14))
+#define CPDMA_CONTROL		((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x20))
+#define CPDMA_STATUS		((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x24))
+#define CPDMA_RX_BUFFER_OFFSET	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x28))
+#define CPDMA_EMCONTROL		((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x2C))
+#define CPDMA_TX_INTMASK_SET	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x88))
+#define CPDMA_TX_INTMASK_CLEAR	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x8C))
+#define CPDMA_EOI_VECTOR	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x94))
+#define CPDMA_RX_INTMASK_SET	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xA8))
+#define CPDMA_RX_INTMASK_CLEAR	((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xAC))
+
+#define CPDMA_IDLE		(1 << 31)
+#define CPDMA_TX_RLIM		(0xFF << 8)
+#define CPDMA_NO_OFFSET		(0xFFFF << 0)
+#define CPDMA_RX_CEF		(1 << 4)
+#define CPDMA_CMD_IDLE		(1 << 3)
+#define RX_OFFLEN_BLOCK		(1 << 2)
+#define RX_OWNERSHIP		(1 << 1)
+#define TX_PTYPE		(1 << 0)
+#define CPDMA_TX_EN		(1 << 0)
+#define CPDMA_RX_EN		(1 << 0)
+#define CPDMA_FIRST_CHAN_INT	(1 << 0)
+#define CPDMA_ALL_CHAN_INT	(0xFF << 0)
+#define CPDMA_TX_PTYPE		(1 << 0)
+#define CPDMA_ERROR		(0x00F7F700)
+
+/* CPSW_SS Registers */
+#define CPSW_SS_BASE_ADR	(0x4A100000)
+#define CPSW_SS_SOFT_RESET	((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x08))
+#define CPSW_SS_STAT_PORT_EN	((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x0C))
+#define CPSW_SS_TX_START_WDS	((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x20))
+
+#define CPSW_P2_STAT_EN		(1 << 2)
+#define CPSW_P1_STAT_EN		(1 << 1)
+#define CPSW_P0_STAT_EN		(1 << 0)
+
+/* CPSW_WR Registers */
+#define CPSW_WR_BASE_ADR	(0x4A101200)
+#define CPSW_WR_INT_CONTROL	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x0C))
+#define CPSW_WR_C0_RX_EN	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x14))
+#define CPSW_WR_C1_RX_EN	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x24))
+#define CPSW_WR_C2_RX_EN	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x34))
+#define CPSW_WR_C0_RX_STAT	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x44))
+#define CPSW_WR_C0_TX_EN	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x18))
+#define CPSW_WR_C0_TX_STAT	((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x48))
+
+#define CPSW_FIRST_CHAN_INT	(1 << 0)
+#define CPSW_ALL_CHAN_INT	(0xFF << 0)
+
+/* INTERRUPTION CONTROLLER Registers */
+#define INTC_BASE_ADR		(0x48200000)
+#define INTC_SYSCONFIG		((volatile u32_t *)( lan8710a_state.regs_intc + 0x10))
+#define INTC_IDLE		((volatile u32_t *)( lan8710a_state.regs_intc + 0x50))
+#define INTC_MIR_CLEAR1		((volatile u32_t *)( lan8710a_state.regs_intc + 0xA8))
+#define INTC_ILR(x)		((volatile u32_t *)( lan8710a_state.regs_intc + 0x100 + 4*(x)))
+
+#define INTC_AUTOIDLE		(1 << 0)
+#define INTC_FUNCIDLE		(1 << 0)
+#define INTC_TURBO		(1 << 1)
+#define INTC_FIQnIRQ		(1 << 0)
+#define INTC_RX_MASK		(1 << 9)
+#define INTC_TX_MASK		(1 << 10)
+
+/* DMA STATERAM Registers */
+#define CPDMA_STRAM_BASE_ADR	(0x4A100A00)
+#define CPDMA_STRAM_TX_HDP(x)	((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 4*(x)))
+#define CPDMA_STRAM_RX_HDP(x)	((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x20 + 4*(x)))
+#define CPDMA_STRAM_TX_CP(x)	((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x40 + 4*(x)))
+#define CPDMA_STRAM_RX_CP(x)	((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x60 + 4*(x)))
+
+#define ALL_BITS		(0xFFFFFFFF)
+
+/* LAN8710A Registers */
+#define PHY_REGISTERS		(31)
+#define LAN8710A_CTRL_REG	(0)
+#define LAN8710A_STATUS_REG	(1)
+
+#define LAN8710A_SOFT_RESET	(1 << 15)
+#define LAN8710A_AUTO_NEG	(1 << 12)
+#define LAN8710A_AUTO_NEG_COMPL	(1 << 5)
+
+#endif /* LAN8710A_REG_H_ */