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drivers: slightly better use of PCI constants

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- introduce PCI_BAR_{IO|MEM}_MASK
- remove redundant PCI definitions from lance
- fix vbox BAR retrieval
This commit is contained in:
David van Moolenbroek 2012-03-08 00:01:25 +01:00
parent 5152cfd8bd
commit 291ece0caa
7 changed files with 22 additions and 39 deletions
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2
common/include/arch/i386/pci.h
View file

@ -36,6 +36,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
#define PCI_TYPE_32_1M 0x00000002 /* 32-bit below 1MB (legacy) */
#define PCI_TYPE_64 0x00000004 /* 64-bit BAR */
#define PCI_BAR_PREFETCH 0x00000008 /* Memory is prefetchable */
#define PCI_BAR_IO_MASK 0xFFFFFFFC /* I/O address mask */
#define PCI_BAR_MEM_MASK 0xFFFFFFF0 /* Memory address mask */
#define PCI_BAR_2 0x14 /* Base Address Register */
#define PCI_BAR_3 0x18 /* Base Address Register */
#define PCI_BAR_4 0x1C /* Base Address Register */

10
drivers/at_wini/at_wini.c
View file

@ -489,14 +489,14 @@ PRIVATE void init_params_pci(int skip)
}
}
base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
base_dma = pci_attr_r32(devind, PCI_BAR_5) & PCI_BAR_IO_MASK;
/* Primary channel not in compatability mode? */
if (quirk || (interface & ATA_IF_NOTCOMPAT1)) {
u32_t base_cmd, base_ctl;
base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
base_cmd = pci_attr_r32(devind, PCI_BAR) & PCI_BAR_IO_MASK;
base_ctl = pci_attr_r32(devind, PCI_BAR_2) & PCI_BAR_IO_MASK;
if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
init_drive(&wini[w_next_drive],
base_cmd, base_ctl+PCI_CTL_OFF,
@ -529,8 +529,8 @@ PRIVATE void init_params_pci(int skip)
if (quirk || (interface & ATA_IF_NOTCOMPAT2)) {
u32_t base_cmd, base_ctl;
base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
base_cmd = pci_attr_r32(devind, PCI_BAR_3) & PCI_BAR_IO_MASK;
base_ctl = pci_attr_r32(devind, PCI_BAR_4) & PCI_BAR_IO_MASK;
if (base_dma != 0)
base_dma += PCI_DMA_2ND_OFF;
if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {

17
drivers/lance/lance.c
View file

@ -1360,21 +1360,20 @@ ether_card_t *ec;
unsigned int membase, ioaddr;
int reg, irq;
for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4)
for (reg = PCI_BAR; reg <= PCI_BAR_6; reg += 4)
{
ioaddr = pci_attr_r32(devind, reg);
if ((ioaddr & PCI_BASE_ADDRESS_IO_MASK) == 0
|| (ioaddr & PCI_BASE_ADDRESS_SPACE_IO) == 0)
if ((ioaddr & PCI_BAR_IO_MASK) == 0 || (ioaddr & PCI_BAR_IO) == 0)
continue;
/* Strip the I/O address out of the returned value */
ioaddr &= PCI_BASE_ADDRESS_IO_MASK;
ioaddr &= PCI_BAR_IO_MASK;
/* Get the memory base address */
membase = pci_attr_r32(devind, PCI_BASE_ADDRESS_1);
membase = pci_attr_r32(devind, PCI_BAR_2);
/* KK: Get the IRQ number */
irq = pci_attr_r8(devind, PCI_INTERRUPT_PIN);
irq = pci_attr_r8(devind, PCI_IPR);
if (irq)
irq = pci_attr_r8(devind, PCI_INTERRUPT_LINE);
irq = pci_attr_r8(devind, PCI_ILR);
ec->ec_linmem = membase;
ec->ec_port = ioaddr;
@ -1413,8 +1412,8 @@ int skip;
/* ===== Bus Master ? ===== */
pci_cmd = pci_attr_r32(devind, PCI_CR);
if (!(pci_cmd & PCI_COMMAND_MASTER)) {
pci_cmd |= PCI_COMMAND_MASTER;
if (!(pci_cmd & PCI_CR_MAST_EN)) {
pci_cmd |= PCI_CR_MAST_EN;
pci_attr_w32(devind, PCI_CR, pci_cmd);
}

18
drivers/lance/lance.h
View file

@ -1,21 +1,3 @@
#include <net/gen/ether.h>
#include <net/gen/eth_io.h>
/* PCI STUFF */
#define PCI_BASE_ADDRESS_0 0x10
#define PCI_BASE_ADDRESS_1 0x14
#define PCI_BASE_ADDRESS_2 0x18
#define PCI_BASE_ADDRESS_3 0x1c
#define PCI_BASE_ADDRESS_4 0x20
#define PCI_BASE_ADDRESS_5 0x24
#define PCI_BASE_ADDRESS_IO_MASK (~0x03)
#define PCI_BASE_ADDRESS_SPACE_IO 0x01
#define PCI_INTERRUPT_LINE 0x3c
#define PCI_INTERRUPT_PIN 0x3d
#define PCI_COMMAND_MASTER 0x4
/* macros for 'mode' */
#define EC_DISABLED 0x0

8
drivers/pci/pci.c
View file

@ -1291,8 +1291,8 @@ int last;
pci_attr_w32(devind, reg, bar);
pci_attr_w16(devind, PCI_CR, cmd);
bar &= ~(u32_t)3; /* Clear non-address bits */
bar2 &= ~(u32_t)3;
bar &= PCI_BAR_IO_MASK; /* Clear non-address bits */
bar2 &= PCI_BAR_IO_MASK;
bar2= (~bar2 & 0xffff)+1;
if (debug)
{
@ -1379,8 +1379,8 @@ int last;
return width; /* Reg. is not implemented */
prefetch= !!(bar & PCI_BAR_PREFETCH);
bar &= ~(u32_t)0xf; /* Clear non-address bits */
bar2 &= ~(u32_t)0xf;
bar &= PCI_BAR_MEM_MASK; /* Clear non-address bits */
bar2 &= PCI_BAR_MEM_MASK;
bar2= (~bar2)+1;
if (debug)
{

2
drivers/ti1225/ti1225.c
View file

@ -161,7 +161,7 @@ PRIVATE void hw_init(struct port *pp, int devind)
v32= pci_attr_r32(devind, TI_CB_BASEADDR);
if (debug)
printf("ti1225: Cardbus/ExCA base address 0x%x\n", v32);
v32 &= ~(u32_t)0xF; /* Clear low order bits in base */
v32 &= PCI_BAR_MEM_MASK; /* Clear low order bits in base */
pp->csr_ptr=
(struct csr *) vm_map_phys(SELF, (void *) v32, I386_PAGE_SIZE);

4
drivers/vbox/vbox.c
View file

@ -75,10 +75,10 @@ PRIVATE int vbox_init(int UNUSED(type), sef_init_info_t *UNUSED(info))
r = pci_next_dev(&devind, &vid, &did);
}
port = pci_attr_r16(devind, PCI_BAR) & 0xfffc;
pci_reserve(devind);
port = pci_attr_r32(devind, PCI_BAR) & PCI_BAR_IO_MASK;
if ((vir_ptr = alloc_contig(VMMDEV_BUF_SIZE, 0, &phys_ptr)) == NULL)
panic("unable to allocate memory");