drivers: slightly better use of PCI constants
- introduce PCI_BAR_{IO|MEM}_MASK - remove redundant PCI definitions from lance - fix vbox BAR retrieval
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5152cfd8bd
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291ece0caa
7 changed files with 22 additions and 39 deletions
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@ -36,6 +36,8 @@ Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
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#define PCI_TYPE_32_1M 0x00000002 /* 32-bit below 1MB (legacy) */
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#define PCI_TYPE_32_1M 0x00000002 /* 32-bit below 1MB (legacy) */
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#define PCI_TYPE_64 0x00000004 /* 64-bit BAR */
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#define PCI_TYPE_64 0x00000004 /* 64-bit BAR */
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#define PCI_BAR_PREFETCH 0x00000008 /* Memory is prefetchable */
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#define PCI_BAR_PREFETCH 0x00000008 /* Memory is prefetchable */
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#define PCI_BAR_IO_MASK 0xFFFFFFFC /* I/O address mask */
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#define PCI_BAR_MEM_MASK 0xFFFFFFF0 /* Memory address mask */
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#define PCI_BAR_2 0x14 /* Base Address Register */
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#define PCI_BAR_2 0x14 /* Base Address Register */
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#define PCI_BAR_3 0x18 /* Base Address Register */
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#define PCI_BAR_3 0x18 /* Base Address Register */
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#define PCI_BAR_4 0x1C /* Base Address Register */
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#define PCI_BAR_4 0x1C /* Base Address Register */
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@ -489,14 +489,14 @@ PRIVATE void init_params_pci(int skip)
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}
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}
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}
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}
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base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
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base_dma = pci_attr_r32(devind, PCI_BAR_5) & PCI_BAR_IO_MASK;
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/* Primary channel not in compatability mode? */
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/* Primary channel not in compatability mode? */
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if (quirk || (interface & ATA_IF_NOTCOMPAT1)) {
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if (quirk || (interface & ATA_IF_NOTCOMPAT1)) {
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u32_t base_cmd, base_ctl;
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u32_t base_cmd, base_ctl;
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base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
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base_cmd = pci_attr_r32(devind, PCI_BAR) & PCI_BAR_IO_MASK;
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base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
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base_ctl = pci_attr_r32(devind, PCI_BAR_2) & PCI_BAR_IO_MASK;
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if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
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if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
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init_drive(&wini[w_next_drive],
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init_drive(&wini[w_next_drive],
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base_cmd, base_ctl+PCI_CTL_OFF,
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base_cmd, base_ctl+PCI_CTL_OFF,
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@ -529,8 +529,8 @@ PRIVATE void init_params_pci(int skip)
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if (quirk || (interface & ATA_IF_NOTCOMPAT2)) {
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if (quirk || (interface & ATA_IF_NOTCOMPAT2)) {
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u32_t base_cmd, base_ctl;
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u32_t base_cmd, base_ctl;
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base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
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base_cmd = pci_attr_r32(devind, PCI_BAR_3) & PCI_BAR_IO_MASK;
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base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
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base_ctl = pci_attr_r32(devind, PCI_BAR_4) & PCI_BAR_IO_MASK;
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if (base_dma != 0)
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if (base_dma != 0)
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base_dma += PCI_DMA_2ND_OFF;
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base_dma += PCI_DMA_2ND_OFF;
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if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
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if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
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@ -1360,21 +1360,20 @@ ether_card_t *ec;
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unsigned int membase, ioaddr;
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unsigned int membase, ioaddr;
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int reg, irq;
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int reg, irq;
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for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4)
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for (reg = PCI_BAR; reg <= PCI_BAR_6; reg += 4)
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{
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{
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ioaddr = pci_attr_r32(devind, reg);
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ioaddr = pci_attr_r32(devind, reg);
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if ((ioaddr & PCI_BASE_ADDRESS_IO_MASK) == 0
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if ((ioaddr & PCI_BAR_IO_MASK) == 0 || (ioaddr & PCI_BAR_IO) == 0)
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|| (ioaddr & PCI_BASE_ADDRESS_SPACE_IO) == 0)
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continue;
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continue;
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/* Strip the I/O address out of the returned value */
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/* Strip the I/O address out of the returned value */
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ioaddr &= PCI_BASE_ADDRESS_IO_MASK;
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ioaddr &= PCI_BAR_IO_MASK;
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/* Get the memory base address */
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/* Get the memory base address */
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membase = pci_attr_r32(devind, PCI_BASE_ADDRESS_1);
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membase = pci_attr_r32(devind, PCI_BAR_2);
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/* KK: Get the IRQ number */
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/* KK: Get the IRQ number */
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irq = pci_attr_r8(devind, PCI_INTERRUPT_PIN);
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irq = pci_attr_r8(devind, PCI_IPR);
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if (irq)
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if (irq)
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irq = pci_attr_r8(devind, PCI_INTERRUPT_LINE);
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irq = pci_attr_r8(devind, PCI_ILR);
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ec->ec_linmem = membase;
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ec->ec_linmem = membase;
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ec->ec_port = ioaddr;
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ec->ec_port = ioaddr;
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@ -1413,8 +1412,8 @@ int skip;
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/* ===== Bus Master ? ===== */
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/* ===== Bus Master ? ===== */
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pci_cmd = pci_attr_r32(devind, PCI_CR);
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pci_cmd = pci_attr_r32(devind, PCI_CR);
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if (!(pci_cmd & PCI_COMMAND_MASTER)) {
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if (!(pci_cmd & PCI_CR_MAST_EN)) {
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pci_cmd |= PCI_COMMAND_MASTER;
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pci_cmd |= PCI_CR_MAST_EN;
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pci_attr_w32(devind, PCI_CR, pci_cmd);
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pci_attr_w32(devind, PCI_CR, pci_cmd);
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}
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}
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@ -1,21 +1,3 @@
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#include <net/gen/ether.h>
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#include <net/gen/eth_io.h>
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/* PCI STUFF */
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#define PCI_BASE_ADDRESS_0 0x10
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#define PCI_BASE_ADDRESS_1 0x14
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#define PCI_BASE_ADDRESS_2 0x18
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#define PCI_BASE_ADDRESS_3 0x1c
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#define PCI_BASE_ADDRESS_4 0x20
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#define PCI_BASE_ADDRESS_5 0x24
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#define PCI_BASE_ADDRESS_IO_MASK (~0x03)
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#define PCI_BASE_ADDRESS_SPACE_IO 0x01
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#define PCI_INTERRUPT_LINE 0x3c
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#define PCI_INTERRUPT_PIN 0x3d
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#define PCI_COMMAND_MASTER 0x4
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/* macros for 'mode' */
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/* macros for 'mode' */
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#define EC_DISABLED 0x0
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#define EC_DISABLED 0x0
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@ -1291,8 +1291,8 @@ int last;
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pci_attr_w32(devind, reg, bar);
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pci_attr_w32(devind, reg, bar);
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pci_attr_w16(devind, PCI_CR, cmd);
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pci_attr_w16(devind, PCI_CR, cmd);
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bar &= ~(u32_t)3; /* Clear non-address bits */
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bar &= PCI_BAR_IO_MASK; /* Clear non-address bits */
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bar2 &= ~(u32_t)3;
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bar2 &= PCI_BAR_IO_MASK;
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bar2= (~bar2 & 0xffff)+1;
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bar2= (~bar2 & 0xffff)+1;
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if (debug)
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if (debug)
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{
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{
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@ -1379,8 +1379,8 @@ int last;
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return width; /* Reg. is not implemented */
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return width; /* Reg. is not implemented */
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prefetch= !!(bar & PCI_BAR_PREFETCH);
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prefetch= !!(bar & PCI_BAR_PREFETCH);
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bar &= ~(u32_t)0xf; /* Clear non-address bits */
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bar &= PCI_BAR_MEM_MASK; /* Clear non-address bits */
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bar2 &= ~(u32_t)0xf;
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bar2 &= PCI_BAR_MEM_MASK;
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bar2= (~bar2)+1;
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bar2= (~bar2)+1;
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if (debug)
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if (debug)
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{
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{
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@ -161,7 +161,7 @@ PRIVATE void hw_init(struct port *pp, int devind)
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v32= pci_attr_r32(devind, TI_CB_BASEADDR);
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v32= pci_attr_r32(devind, TI_CB_BASEADDR);
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if (debug)
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if (debug)
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printf("ti1225: Cardbus/ExCA base address 0x%x\n", v32);
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printf("ti1225: Cardbus/ExCA base address 0x%x\n", v32);
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v32 &= ~(u32_t)0xF; /* Clear low order bits in base */
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v32 &= PCI_BAR_MEM_MASK; /* Clear low order bits in base */
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pp->csr_ptr=
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pp->csr_ptr=
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(struct csr *) vm_map_phys(SELF, (void *) v32, I386_PAGE_SIZE);
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(struct csr *) vm_map_phys(SELF, (void *) v32, I386_PAGE_SIZE);
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@ -75,10 +75,10 @@ PRIVATE int vbox_init(int UNUSED(type), sef_init_info_t *UNUSED(info))
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r = pci_next_dev(&devind, &vid, &did);
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r = pci_next_dev(&devind, &vid, &did);
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}
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}
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port = pci_attr_r16(devind, PCI_BAR) & 0xfffc;
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pci_reserve(devind);
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pci_reserve(devind);
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port = pci_attr_r32(devind, PCI_BAR) & PCI_BAR_IO_MASK;
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if ((vir_ptr = alloc_contig(VMMDEV_BUF_SIZE, 0, &phys_ptr)) == NULL)
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if ((vir_ptr = alloc_contig(VMMDEV_BUF_SIZE, 0, &phys_ptr)) == NULL)
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panic("unable to allocate memory");
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panic("unable to allocate memory");
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