205 lines
5.4 KiB
C
205 lines
5.4 KiB
C
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/* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* cpu.h
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*
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* CPU specific symbols
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*
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* Created : 18/09/94
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*
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* Based on kate/katelib/arm6.h
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*/
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#ifndef _ARM_LOCORE_H_
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#define _ARM_LOCORE_H_
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#ifdef _KERNEL_OPT
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#include "opt_cpuoptions.h"
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#include "opt_cputypes.h"
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#endif
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#include <arm/cpuconf.h>
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#include <arm/armreg.h>
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#include <machine/frame.h>
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#ifdef _LOCORE
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#if defined(_ARM_ARCH_6)
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#define IRQdisable cpsid i
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#define IRQenable cpsie i
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#elif defined(__PROG32)
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#define IRQdisable \
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stmfd sp!, {r0} ; \
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mrs r0, cpsr ; \
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orr r0, r0, #(I32_bit) ; \
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msr cpsr_c, r0 ; \
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ldmfd sp!, {r0}
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#define IRQenable \
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stmfd sp!, {r0} ; \
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mrs r0, cpsr ; \
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bic r0, r0, #(I32_bit) ; \
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msr cpsr_c, r0 ; \
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ldmfd sp!, {r0}
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#else
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/* Not yet used in 26-bit code */
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#endif
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#if defined (TPIDRPRW_IS_CURCPU)
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#define GET_CURCPU(rX) mrc p15, 0, rX, c13, c0, 4
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#define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
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#elif defined (TPIDRPRW_IS_CURLWP)
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#define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4
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#define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU]
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#elif !defined(MULTIPROCESSOR)
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#define GET_CURCPU(rX) ldr rX, =_C_LABEL(cpu_info_store)
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#define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
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#endif
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#define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_PCB]
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#else /* !_LOCORE */
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#include <arm/cpufunc.h>
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#ifdef __PROG32
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#define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
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#define IRQenable __set_cpsr_c(I32_bit, 0);
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#else
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#define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE);
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#define IRQenable set_r15(R15_IRQ_DISABLE, 0);
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#endif
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/*
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* Validate a PC or PSR for a user process. Used by various system calls
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* that take a context passed by the user and restore it.
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*/
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#ifdef __PROG32
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#define VALID_R15_PSR(r15,psr) \
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(((psr) & PSR_MODE) == PSR_USR32_MODE && \
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((psr) & (I32_bit | F32_bit)) == 0)
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#else
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#define VALID_R15_PSR(r15,psr) \
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(((r15) & R15_MODE) == R15_MODE_USR && \
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((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0)
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#endif
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/* The address of the vector page. */
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extern vaddr_t vector_page;
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#ifdef __PROG32
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void arm32_vector_init(vaddr_t, int);
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#define ARM_VEC_RESET (1 << 0)
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#define ARM_VEC_UNDEFINED (1 << 1)
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#define ARM_VEC_SWI (1 << 2)
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#define ARM_VEC_PREFETCH_ABORT (1 << 3)
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#define ARM_VEC_DATA_ABORT (1 << 4)
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#define ARM_VEC_ADDRESS_EXCEPTION (1 << 5)
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#define ARM_VEC_IRQ (1 << 6)
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#define ARM_VEC_FIQ (1 << 7)
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#define ARM_NVEC 8
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#define ARM_VEC_ALL 0xffffffff
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#endif /* __PROG32 */
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#ifndef acorn26
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/*
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* cpu device glue (belongs in cpuvar.h)
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*/
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void cpu_attach(device_t, cpuid_t);
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#endif
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/* 1 == use cpu_sleep(), 0 == don't */
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extern int cpu_do_powersave;
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extern int cpu_fpu_present;
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extern int cpu_hwdiv_present;
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#if !defined(CPU_ARMV7)
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#define CPU_IS_ARMV7_P() false
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#elif defined(CPU_ARMV6) || defined(CPU_PRE_ARMV6)
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extern bool cpu_armv7_p;
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#define CPU_IS_ARMV7_P() (cpu_armv7_p)
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#else
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#define CPU_IS_ARMV7_P() true
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#endif
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/*
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* Random cruft
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*/
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struct lwp;
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/* locore.S */
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void atomic_set_bit(u_int *, u_int);
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void atomic_clear_bit(u_int *, u_int);
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/* cpuswitch.S */
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struct pcb;
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void savectx(struct pcb *);
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/* ast.c */
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void userret(struct lwp *);
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/* *_machdep.c */
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void bootsync(void);
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/* fault.c */
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int badaddr_read(void *, size_t, void *);
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/* syscall.c */
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void swi_handler(trapframe_t *);
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/* arm_machdep.c */
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void ucas_ras_check(trapframe_t *);
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/* vfp_init.c */
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void vfp_attach(void);
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void vfp_discardcontext(bool);
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void vfp_savecontext(void);
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void vfp_kernel_acquire(void);
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void vfp_kernel_release(void);
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bool vfp_used_p(void);
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extern const pcu_ops_t arm_vfp_ops;
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#endif /* !_LOCORE */
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#endif /* !_ARM_LOCORE_H_ */
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