87 lines
3.5 KiB
ArmAsm
87 lines
3.5 KiB
ArmAsm
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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RCSID("$NetBSD: strlen_neon.S,v 1.3 2012/12/28 05:15:08 matt Exp $")
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.text
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ENTRY(strlen)
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mov ip, r0 /* we use r0 for return value */
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ands r1, r0, #15 /* verify qword alignment */
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neg r0, r1 /* subtract misalignment from count */
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veor q2, q2, q2 /* clear mask */
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mov r3, #7 /* NBBY - 1 */
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vdup.32 q3, r3 /* dup throughout q3 */
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movw r3, #0x0404 /* magic since there are 4 bytes per U32 */
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orr r3, r3, lsl #16 /* copy to upper 16 bits */
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beq .Lmain_loop
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veor q0, q0, q0 /* clear q0 */
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vmvn q2, q2 /* set all 16 bytes of mask to all 1s */
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bic ip, ip, #15 /* qword align string address */
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lsl r1, r1, #3 /* convert to bits */
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cmp r1, #64
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rsbgt r1, r1, #128 /* > 64? BE so we are shifting LSW right */
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movgt r2, #0 /* > 64? leave MSW alone */
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rsble r2, r1, #64 /* <=64? BE so we are shifting MSW right */
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movle r1, #64 /* <=64? clear LSW */
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vmov d0, r1, r2 /* set shifts for lower and upper halves */
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vmovl.u32 q0, d0 /* 2 U32 -> 2 U64 */
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vshl.u64 q2, q2, q0 /* shift */
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/*
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* Main loop. Load 16 bytes, do a clz,
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*/
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.Lmain_loop:
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vld1.64 {d0, d1}, [ip:128]! /* load qword */
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#ifdef __ARMEL__
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vrev64.8 q0, q0 /* convert to BE for clz */
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#endif
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vswp d0, d1 /* swap dwords to get BE qword */
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vorr q0, q0, q2 /* or "in" leading byte mask */
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veor q2, q2, q2 /* clear leading byte mask */
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vceq.i8 q1, q0, #0 /* test each byte for 0 */
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/* Why couldn't there be a 64-bit CLZ? */
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vclz.u32 q1, q1 /* count leading zeroes to find the 0 byte */
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vadd.u32 q1, q1, q3 /* round up to byte bounary */
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vshr.u32 q1, q1, #3 /* convert to bytes */
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vmovn.u32 d0, q1 /* 4 I32 -> 4 I16 */
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vmovn.u16 d0, q0 /* 4 I16 -> 4 I8 */
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vmov r2, s0 /* get counts */
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eors r2, r2, r3 /* xor with 0x04040404 */
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addeq r0, #16 /* 0? no NULs */
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beq .Lmain_loop /* get next qword */
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clz ip, r2 /* count leading zeros */
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mov r2, r2, lsl ip /* discard them */
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mov ip, ip, lsr #3 /* divide leading zeroes by 8 */
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add r0, r0, ip, lsl #2 /* multiple by 4 and add to count */
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and r2, r2, #(3 << 29)
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add r0, r0, r2, lsr #29
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RET /* and return. */
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END(strlen)
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