101 lines
3.8 KiB
ArmAsm
101 lines
3.8 KiB
ArmAsm
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/* $NetBSD: atomic_add_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas <matt@3am-software.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "atomic_op_asm.h"
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#ifdef _ARM_ARCH_6
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ENTRY_NP(_atomic_sub_16)
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negs r1, r1
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/* FALLTHROUGH */
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ENTRY_NP(_atomic_add_16)
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mov ip, r0
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1: ldrexh r0, [ip] /* load old value */
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adds r3, r0, r1 /* calculate new value */
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strexh r2, r3, [ip] /* try to store */
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cmp r2, #0 /* succeed? */
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bne 1b /* no, try again */
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#ifdef _ARM_ARCH_7
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dmb
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#else
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mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
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#endif
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RET /* return old value */
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END(_atomic_add_16)
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END(_atomic_sub_16)
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ATOMIC_OP_ALIAS(atomic_add_16,_atomic_add_16)
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ATOMIC_OP_ALIAS(atomic_add_short,_atomic_add_16)
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ATOMIC_OP_ALIAS(atomic_add_ushort,_atomic_add_16)
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STRONG_ALIAS(__sync_fetch_and_add_2,_atomic_add_16)
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STRONG_ALIAS(_atomic_add_short,_atomic_add_16)
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STRONG_ALIAS(_atomic_add_ushort,_atomic_add_16)
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ATOMIC_OP_ALIAS(atomic_sub_16,_atomic_sub_16)
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ATOMIC_OP_ALIAS(atomic_sub_short,_atomic_sub_16)
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ATOMIC_OP_ALIAS(atomic_sub_ushort,_atomic_sub_16)
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STRONG_ALIAS(__sync_fetch_and_sub_2,_atomic_sub_16)
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STRONG_ALIAS(_atomic_sub_short,_atomic_sub_16)
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STRONG_ALIAS(_atomic_sub_ushort,_atomic_sub_16)
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ENTRY_NP(_atomic_sub_16_nv)
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negs r1, r1
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/* FALLTHROUGH */
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ENTRY_NP(_atomic_add_16_nv)
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mov ip, r0 /* need r0 for return value */
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1: ldrexh r0, [ip] /* load old value */
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adds r0, r0, r1 /* calculate new value (return value) */
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strexh r2, r0, [ip] /* try to store */
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cmp r2, #0 /* succeed? */
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bne 1b /* no, try again? */
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#ifdef _ARM_ARCH_7
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dmb
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#else
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mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
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#endif
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RET /* return new value */
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END(_atomic_add_16_nv)
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END(_atomic_sub_16_nv)
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ATOMIC_OP_ALIAS(atomic_add_16_nv,_atomic_add_16_nv)
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ATOMIC_OP_ALIAS(atomic_add_short_nv,_atomic_add_16_nv)
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ATOMIC_OP_ALIAS(atomic_add_ushort_nv,_atomic_add_16_nv)
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STRONG_ALIAS(__sync_add_and_fetch_2,_atomic_add_16_nv)
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STRONG_ALIAS(_atomic_add_short_nv,_atomic_add_16_nv)
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STRONG_ALIAS(_atomic_add_ushort_nv,_atomic_add_16_nv)
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ATOMIC_OP_ALIAS(atomic_sub_16_nv,_atomic_sub_16_nv)
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ATOMIC_OP_ALIAS(atomic_sub_short_nv,_atomic_sub_16_nv)
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ATOMIC_OP_ALIAS(atomic_sub_ushort_nv,_atomic_sub_16_nv)
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STRONG_ALIAS(__sync_sub_and_fetch_2,_atomic_sub_16_nv)
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STRONG_ALIAS(_atomic_sub_short_nv,_atomic_sub_16_nv)
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STRONG_ALIAS(_atomic_sub_ushort_nv,_atomic_sub_16_nv)
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#endif /* _ARM_ARCH_6 */
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