2009-11-04 14:24:56 +01:00
|
|
|
#ifndef __HW_INTR_X86_H__
|
|
|
|
#define __HW_INTR_X86_H__
|
|
|
|
|
2010-04-02 00:22:33 +02:00
|
|
|
#include "kernel/kernel.h"
|
2010-09-07 09:18:11 +02:00
|
|
|
_PROTOTYPE(int irq_8259_unmask,(int irq));
|
|
|
|
_PROTOTYPE(int irq_8259_mask,(int irq));
|
|
|
|
_PROTOTYPE(int irq_8259_eoi, (int irq));
|
|
|
|
_PROTOTYPE(void irq_handle,(int irq));
|
|
|
|
_PROTOTYPE(void i8259_disable,(void));
|
2009-11-04 14:24:56 +01:00
|
|
|
|
2010-09-07 09:18:11 +02:00
|
|
|
/*
|
|
|
|
* we don't use IO APIC if not configured for SMP as we cannot read any info
|
|
|
|
* about it unless we use MPS which is not present on all single CPU
|
|
|
|
* configurations. ACPI would be another option, however we don't support it
|
|
|
|
* either
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_APIC)
|
|
|
|
#include "arch/i386/apic.h"
|
2009-11-04 14:24:56 +01:00
|
|
|
|
2010-09-07 09:18:11 +02:00
|
|
|
#define hw_intr_mask(irq) ioapic_mask_irq(irq)
|
|
|
|
#define hw_intr_unmask(irq) ioapic_unmask_irq(irq)
|
|
|
|
#define hw_intr_ack(irq) ioapic_eoi(irq)
|
|
|
|
#define hw_intr_used(irq) do { \
|
|
|
|
if (ioapic_enabled) \
|
|
|
|
ioapic_set_irq(irq); \
|
|
|
|
} while (0)
|
|
|
|
#define hw_intr_not_used(irq) do { \
|
|
|
|
if (ioapic_enabled) \
|
|
|
|
ioapic_unset_irq(irq); \
|
|
|
|
} while (0)
|
|
|
|
#define hw_intr_disable_all() do { \
|
|
|
|
ioapic_disable_all(); \
|
|
|
|
ioapic_reset_pic(); \
|
|
|
|
lapic_disable(); \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#else
|
|
|
|
/* legacy PIC */
|
2009-11-04 14:24:56 +01:00
|
|
|
|
|
|
|
#define hw_intr_mask(irq) irq_8259_mask(irq)
|
|
|
|
#define hw_intr_unmask(irq) irq_8259_unmask(irq)
|
2010-09-07 09:18:11 +02:00
|
|
|
#define hw_intr_ack(irq) irq_8259_eoi(irq)
|
|
|
|
#define hw_intr_used(irq)
|
|
|
|
#define hw_intr_not_used(irq)
|
|
|
|
#define hw_intr_disable_all()
|
|
|
|
|
|
|
|
#endif
|
2009-11-04 14:24:56 +01:00
|
|
|
|
|
|
|
#endif /* __HW_INTR_X86_H__ */
|