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minix/kernel/arch/i386/apic_asm.S

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ArmAsm
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Move archtypes.h, fpu.h, and stackframe.h Move archtypes.h to include/ dir, since several servers require it. Move fpu.h and stackframe.h to arch-specific header directory. Make source files and makefiles aware of the new header locations.
2010-03-09 10:41:14 +01:00
#include "archconst.h"
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
#include "apic.h"
#include "sconst.h"
#include "apic_asm.h"
.globl apic_hwint00 /* handlers for hardware interrupts */
.globl apic_hwint01
.globl apic_hwint02
.globl apic_hwint03
.globl apic_hwint04
.globl apic_hwint05
.globl apic_hwint06
.globl apic_hwint07
.globl apic_hwint08
.globl apic_hwint09
.globl apic_hwint10
.globl apic_hwint11
.globl apic_hwint12
.globl apic_hwint13
.globl apic_hwint14
.globl apic_hwint15
Convert library asm files to GAS syntax
2010-03-03 15:27:30 +01:00
.text
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
#define APIC_IRQ_HANDLER(irq) \
push $irq ;\
call irq_handle /* intr_handle(irq_handlers[irq]) */ ;\
add $4, %esp ;\
mov lapic_eoi_addr, %eax ;\
movl $0, (%eax) ;\
/*===========================================================================*/
/* interrupt handlers */
/* interrupt handlers for 386 32-bit protected mode */
/* APIC interrupt handlers for 386 32-bit protected mode */
/*===========================================================================*/
#define apic_hwint(irq) \
TEST_INT_IN_KERNEL(4, 0f) ;\
\
SAVE_PROCESS_CTX(0) ;\
Time accounting based on TSC - as thre are still KERNEL and IDLE entries, time accounting for kernel and idle time works the same as for any other process - everytime we stop accounting for the currently running process, kernel or idle, we read the TSC counter and increment the p_cycles entry. - the process cycles inherently include some of the kernel cycles as we can stop accounting for the process only after we save its context and we start accounting just before we restore its context - this assumes that the system does not scale the CPU frequency which will be true for ... long time ;-)
2010-02-10 16:36:54 +01:00
push %ebp ;\
call cycles_accounting_stop ;\
add $4, %esp ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
movl $0, %ebp /* for stack trace */ ;\
APIC_IRQ_HANDLER(irq) ;\
jmp restart ;\
\
0: \
pusha ;\
Time accounting based on TSC - as thre are still KERNEL and IDLE entries, time accounting for kernel and idle time works the same as for any other process - everytime we stop accounting for the currently running process, kernel or idle, we read the TSC counter and increment the p_cycles entry. - the process cycles inherently include some of the kernel cycles as we can stop accounting for the process only after we save its context and we start accounting just before we restore its context - this assumes that the system does not scale the CPU frequency which will be true for ... long time ;-)
2010-02-10 16:36:54 +01:00
call cycles_accounting_stop_idle ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
APIC_IRQ_HANDLER(irq) ;\
Interrupts hadling while idle - When the cpu halts, the interrupts are enable so the cpu may be woken up. When the interrupt handler returns but another interrupt is available it is also serviced immediately. This is not a problem per-se. It only slightly breaks time accounting as idle accounted is for the kernel time in the interrupt handler. - As the big kernel lock is lock/unlocked in the smp branch in the time acounting functions as they are called exactly at the places we need to take the lock) this leads to a deadlock. - we make sure that once the interrupt handler returns from the nested trap, the interrupts are disabled. This means that only one interrupt is serviced after idle is interrupted. - this requires the loop in apic timer calibration to keep reenabling the interrupts. I admit it is a little bit hackish (one line), however, this code is a stupid corner case at the boot time. Hopefully it does not matter too much.
2010-03-23 14:35:01 +01:00
CLEAR_IF(10*4(%esp)) ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
popa ;\
iret ;
/* Each of these entry points is an expansion of the hwint_master macro */
.balign 16
apic_hwint00:
/* Interrupt routine for irq 0 (the clock). */
apic_hwint(0)
.balign 16
apic_hwint01:
/* Interrupt routine for irq 1 (keyboard) */
apic_hwint(1)
.balign 16
apic_hwint02:
/* Interrupt routine for irq 2 (cascade!) */
apic_hwint(2)
.balign 16
apic_hwint03:
/* Interrupt routine for irq 3 (second serial) */
apic_hwint(3)
.balign 16
apic_hwint04:
/* Interrupt routine for irq 4 (first serial) */
apic_hwint(4)
.balign 16
apic_hwint05:
/* Interrupt routine for irq 5 (XT winchester) */
apic_hwint(5)
.balign 16
apic_hwint06:
/* Interrupt routine for irq 6 (floppy) */
apic_hwint(6)
.balign 16
apic_hwint07:
/* Interrupt routine for irq 7 (printer) */
apic_hwint(7)
.balign 16
apic_hwint08:
/* Interrupt routine for irq 8 (realtime clock) */
apic_hwint(8)
.balign 16
apic_hwint09:
/* Interrupt routine for irq 9 (irq 2 redirected) */
apic_hwint(9)
.balign 16
apic_hwint10:
/* Interrupt routine for irq 10 */
apic_hwint(10)
.balign 16
apic_hwint11:
/* Interrupt routine for irq 11 */
apic_hwint(11)
.balign 16
apic_hwint12:
/* Interrupt routine for irq 12 */
apic_hwint(12)
.balign 16
apic_hwint13:
/* Interrupt routine for irq 13 (FPU exception) */
apic_hwint(13)
.balign 16
apic_hwint14:
/* Interrupt routine for irq 14 (AT winchester) */
apic_hwint(14)
.balign 16
apic_hwint15:
/* Interrupt routine for irq 15 */
apic_hwint(15)
#define LAPIC_INTR_HANDLER(func) \
movl $func, %eax ;\
call *%eax /* call the actual handler */ ;\
mov lapic_eoi_addr, %eax /* the end of handler*/ ;\
movl $0, (%eax) ;
/*===========================================================================*/
/* handler of the local APIC interrupts */
/*===========================================================================*/
#define lapic_intr(func) \
TEST_INT_IN_KERNEL(4, 0f) ;\
\
SAVE_PROCESS_CTX(0) ;\
Time accounting based on TSC - as thre are still KERNEL and IDLE entries, time accounting for kernel and idle time works the same as for any other process - everytime we stop accounting for the currently running process, kernel or idle, we read the TSC counter and increment the p_cycles entry. - the process cycles inherently include some of the kernel cycles as we can stop accounting for the process only after we save its context and we start accounting just before we restore its context - this assumes that the system does not scale the CPU frequency which will be true for ... long time ;-)
2010-02-10 16:36:54 +01:00
push %ebp ;\
call cycles_accounting_stop ;\
add $4, %esp ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
movl $0, %ebp /* for stack trace */ ;\
LAPIC_INTR_HANDLER(func) ;\
jmp restart ;\
\
0: \
pusha ;\
Time accounting based on TSC - as thre are still KERNEL and IDLE entries, time accounting for kernel and idle time works the same as for any other process - everytime we stop accounting for the currently running process, kernel or idle, we read the TSC counter and increment the p_cycles entry. - the process cycles inherently include some of the kernel cycles as we can stop accounting for the process only after we save its context and we start accounting just before we restore its context - this assumes that the system does not scale the CPU frequency which will be true for ... long time ;-)
2010-02-10 16:36:54 +01:00
call cycles_accounting_stop_idle ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
LAPIC_INTR_HANDLER(func) ;\
Interrupts hadling while idle - When the cpu halts, the interrupts are enable so the cpu may be woken up. When the interrupt handler returns but another interrupt is available it is also serviced immediately. This is not a problem per-se. It only slightly breaks time accounting as idle accounted is for the kernel time in the interrupt handler. - As the big kernel lock is lock/unlocked in the smp branch in the time acounting functions as they are called exactly at the places we need to take the lock) this leads to a deadlock. - we make sure that once the interrupt handler returns from the nested trap, the interrupts are disabled. This means that only one interrupt is serviced after idle is interrupted. - this requires the loop in apic timer calibration to keep reenabling the interrupts. I admit it is a little bit hackish (one line), however, this code is a stupid corner case at the boot time. Hopefully it does not matter too much.
2010-03-23 14:35:01 +01:00
CLEAR_IF(10*4(%esp)) ;\
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
popa ;\
iret ;
/* apic timer tick handlers */
.globl lapic_bsp_timer_int_handler
lapic_bsp_timer_int_handler:
lapic_intr(bsp_timer_int_handler)
.globl lapic_ap_timer_int_handler
lapic_ap_timer_int_handler:
lapic_intr(ap_timer_int_handler)
#ifdef CONFIG_APIC_DEBUG
.data
lapic_intr_dummy_handler_msg:
.ascii "UNHABLED APIC interrupt vector %d\n"
.text
#define lapic_intr_dummy_handler(vect) \
pushl $vect; \
push $lapic_intr_dummy_handler_msg; \
no more kprintf - kernel uses libsys printf now, only kputc is special to the kernel.
2010-03-03 16:45:01 +01:00
call printf; \
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
1: jmp 1b; /* never return */
#define LAPIC_INTR_DUMMY_HANDLER(vect) \
.balign LAPIC_INTR_DUMMY_HANDLER_SIZE; \
lapic_intr_dummy_handler_##vect: lapic_intr_dummy_handler(vect)
.globl lapic_intr_dummy_handles_start
lapic_intr_dummy_handles_start:
LAPIC_INTR_DUMMY_HANDLER(0)
LAPIC_INTR_DUMMY_HANDLER(1)
LAPIC_INTR_DUMMY_HANDLER(2)
LAPIC_INTR_DUMMY_HANDLER(3)
LAPIC_INTR_DUMMY_HANDLER(4)
LAPIC_INTR_DUMMY_HANDLER(5)
LAPIC_INTR_DUMMY_HANDLER(6)
LAPIC_INTR_DUMMY_HANDLER(7)
LAPIC_INTR_DUMMY_HANDLER(8)
LAPIC_INTR_DUMMY_HANDLER(9)
LAPIC_INTR_DUMMY_HANDLER(10)
LAPIC_INTR_DUMMY_HANDLER(11)
LAPIC_INTR_DUMMY_HANDLER(12)
LAPIC_INTR_DUMMY_HANDLER(13)
LAPIC_INTR_DUMMY_HANDLER(14)
LAPIC_INTR_DUMMY_HANDLER(15)
LAPIC_INTR_DUMMY_HANDLER(16)
LAPIC_INTR_DUMMY_HANDLER(17)
LAPIC_INTR_DUMMY_HANDLER(18)
LAPIC_INTR_DUMMY_HANDLER(19)
LAPIC_INTR_DUMMY_HANDLER(20)
LAPIC_INTR_DUMMY_HANDLER(21)
LAPIC_INTR_DUMMY_HANDLER(22)
LAPIC_INTR_DUMMY_HANDLER(23)
LAPIC_INTR_DUMMY_HANDLER(24)
LAPIC_INTR_DUMMY_HANDLER(25)
LAPIC_INTR_DUMMY_HANDLER(26)
LAPIC_INTR_DUMMY_HANDLER(27)
LAPIC_INTR_DUMMY_HANDLER(28)
LAPIC_INTR_DUMMY_HANDLER(29)
LAPIC_INTR_DUMMY_HANDLER(30)
LAPIC_INTR_DUMMY_HANDLER(31)
LAPIC_INTR_DUMMY_HANDLER(32)
LAPIC_INTR_DUMMY_HANDLER(33)
LAPIC_INTR_DUMMY_HANDLER(34)
LAPIC_INTR_DUMMY_HANDLER(35)
LAPIC_INTR_DUMMY_HANDLER(36)
LAPIC_INTR_DUMMY_HANDLER(37)
LAPIC_INTR_DUMMY_HANDLER(38)
LAPIC_INTR_DUMMY_HANDLER(39)
LAPIC_INTR_DUMMY_HANDLER(40)
LAPIC_INTR_DUMMY_HANDLER(41)
LAPIC_INTR_DUMMY_HANDLER(42)
LAPIC_INTR_DUMMY_HANDLER(43)
LAPIC_INTR_DUMMY_HANDLER(44)
LAPIC_INTR_DUMMY_HANDLER(45)
LAPIC_INTR_DUMMY_HANDLER(46)
LAPIC_INTR_DUMMY_HANDLER(47)
LAPIC_INTR_DUMMY_HANDLER(48)
LAPIC_INTR_DUMMY_HANDLER(49)
LAPIC_INTR_DUMMY_HANDLER(50)
LAPIC_INTR_DUMMY_HANDLER(51)
LAPIC_INTR_DUMMY_HANDLER(52)
LAPIC_INTR_DUMMY_HANDLER(53)
LAPIC_INTR_DUMMY_HANDLER(54)
LAPIC_INTR_DUMMY_HANDLER(55)
LAPIC_INTR_DUMMY_HANDLER(56)
LAPIC_INTR_DUMMY_HANDLER(57)
LAPIC_INTR_DUMMY_HANDLER(58)
LAPIC_INTR_DUMMY_HANDLER(59)
LAPIC_INTR_DUMMY_HANDLER(60)
LAPIC_INTR_DUMMY_HANDLER(61)
LAPIC_INTR_DUMMY_HANDLER(62)
LAPIC_INTR_DUMMY_HANDLER(63)
LAPIC_INTR_DUMMY_HANDLER(64)
LAPIC_INTR_DUMMY_HANDLER(65)
LAPIC_INTR_DUMMY_HANDLER(66)
LAPIC_INTR_DUMMY_HANDLER(67)
LAPIC_INTR_DUMMY_HANDLER(68)
LAPIC_INTR_DUMMY_HANDLER(69)
LAPIC_INTR_DUMMY_HANDLER(70)
LAPIC_INTR_DUMMY_HANDLER(71)
LAPIC_INTR_DUMMY_HANDLER(72)
LAPIC_INTR_DUMMY_HANDLER(73)
LAPIC_INTR_DUMMY_HANDLER(74)
LAPIC_INTR_DUMMY_HANDLER(75)
LAPIC_INTR_DUMMY_HANDLER(76)
LAPIC_INTR_DUMMY_HANDLER(77)
LAPIC_INTR_DUMMY_HANDLER(78)
LAPIC_INTR_DUMMY_HANDLER(79)
LAPIC_INTR_DUMMY_HANDLER(80)
LAPIC_INTR_DUMMY_HANDLER(81)
LAPIC_INTR_DUMMY_HANDLER(82)
LAPIC_INTR_DUMMY_HANDLER(83)
LAPIC_INTR_DUMMY_HANDLER(84)
LAPIC_INTR_DUMMY_HANDLER(85)
LAPIC_INTR_DUMMY_HANDLER(86)
LAPIC_INTR_DUMMY_HANDLER(87)
LAPIC_INTR_DUMMY_HANDLER(88)
LAPIC_INTR_DUMMY_HANDLER(89)
LAPIC_INTR_DUMMY_HANDLER(90)
LAPIC_INTR_DUMMY_HANDLER(91)
LAPIC_INTR_DUMMY_HANDLER(92)
LAPIC_INTR_DUMMY_HANDLER(93)
LAPIC_INTR_DUMMY_HANDLER(94)
LAPIC_INTR_DUMMY_HANDLER(95)
LAPIC_INTR_DUMMY_HANDLER(96)
LAPIC_INTR_DUMMY_HANDLER(97)
LAPIC_INTR_DUMMY_HANDLER(98)
LAPIC_INTR_DUMMY_HANDLER(99)
LAPIC_INTR_DUMMY_HANDLER(100)
LAPIC_INTR_DUMMY_HANDLER(101)
LAPIC_INTR_DUMMY_HANDLER(102)
LAPIC_INTR_DUMMY_HANDLER(103)
LAPIC_INTR_DUMMY_HANDLER(104)
LAPIC_INTR_DUMMY_HANDLER(105)
LAPIC_INTR_DUMMY_HANDLER(106)
LAPIC_INTR_DUMMY_HANDLER(107)
LAPIC_INTR_DUMMY_HANDLER(108)
LAPIC_INTR_DUMMY_HANDLER(109)
LAPIC_INTR_DUMMY_HANDLER(110)
LAPIC_INTR_DUMMY_HANDLER(111)
LAPIC_INTR_DUMMY_HANDLER(112)
LAPIC_INTR_DUMMY_HANDLER(113)
LAPIC_INTR_DUMMY_HANDLER(114)
LAPIC_INTR_DUMMY_HANDLER(115)
LAPIC_INTR_DUMMY_HANDLER(116)
LAPIC_INTR_DUMMY_HANDLER(117)
LAPIC_INTR_DUMMY_HANDLER(118)
LAPIC_INTR_DUMMY_HANDLER(119)
LAPIC_INTR_DUMMY_HANDLER(120)
LAPIC_INTR_DUMMY_HANDLER(121)
LAPIC_INTR_DUMMY_HANDLER(122)
LAPIC_INTR_DUMMY_HANDLER(123)
LAPIC_INTR_DUMMY_HANDLER(124)
LAPIC_INTR_DUMMY_HANDLER(125)
LAPIC_INTR_DUMMY_HANDLER(126)
LAPIC_INTR_DUMMY_HANDLER(127)
LAPIC_INTR_DUMMY_HANDLER(128)
LAPIC_INTR_DUMMY_HANDLER(129)
LAPIC_INTR_DUMMY_HANDLER(130)
LAPIC_INTR_DUMMY_HANDLER(131)
LAPIC_INTR_DUMMY_HANDLER(132)
LAPIC_INTR_DUMMY_HANDLER(133)
LAPIC_INTR_DUMMY_HANDLER(134)
LAPIC_INTR_DUMMY_HANDLER(135)
LAPIC_INTR_DUMMY_HANDLER(136)
LAPIC_INTR_DUMMY_HANDLER(137)
LAPIC_INTR_DUMMY_HANDLER(138)
LAPIC_INTR_DUMMY_HANDLER(139)
LAPIC_INTR_DUMMY_HANDLER(140)
LAPIC_INTR_DUMMY_HANDLER(141)
LAPIC_INTR_DUMMY_HANDLER(142)
LAPIC_INTR_DUMMY_HANDLER(143)
LAPIC_INTR_DUMMY_HANDLER(144)
LAPIC_INTR_DUMMY_HANDLER(145)
LAPIC_INTR_DUMMY_HANDLER(146)
LAPIC_INTR_DUMMY_HANDLER(147)
LAPIC_INTR_DUMMY_HANDLER(148)
LAPIC_INTR_DUMMY_HANDLER(149)
LAPIC_INTR_DUMMY_HANDLER(150)
LAPIC_INTR_DUMMY_HANDLER(151)
LAPIC_INTR_DUMMY_HANDLER(152)
LAPIC_INTR_DUMMY_HANDLER(153)
LAPIC_INTR_DUMMY_HANDLER(154)
LAPIC_INTR_DUMMY_HANDLER(155)
LAPIC_INTR_DUMMY_HANDLER(156)
LAPIC_INTR_DUMMY_HANDLER(157)
LAPIC_INTR_DUMMY_HANDLER(158)
LAPIC_INTR_DUMMY_HANDLER(159)
LAPIC_INTR_DUMMY_HANDLER(160)
LAPIC_INTR_DUMMY_HANDLER(161)
LAPIC_INTR_DUMMY_HANDLER(162)
LAPIC_INTR_DUMMY_HANDLER(163)
LAPIC_INTR_DUMMY_HANDLER(164)
LAPIC_INTR_DUMMY_HANDLER(165)
LAPIC_INTR_DUMMY_HANDLER(166)
LAPIC_INTR_DUMMY_HANDLER(167)
LAPIC_INTR_DUMMY_HANDLER(168)
LAPIC_INTR_DUMMY_HANDLER(169)
LAPIC_INTR_DUMMY_HANDLER(170)
LAPIC_INTR_DUMMY_HANDLER(171)
LAPIC_INTR_DUMMY_HANDLER(172)
LAPIC_INTR_DUMMY_HANDLER(173)
LAPIC_INTR_DUMMY_HANDLER(174)
LAPIC_INTR_DUMMY_HANDLER(175)
LAPIC_INTR_DUMMY_HANDLER(176)
LAPIC_INTR_DUMMY_HANDLER(177)
LAPIC_INTR_DUMMY_HANDLER(178)
LAPIC_INTR_DUMMY_HANDLER(179)
LAPIC_INTR_DUMMY_HANDLER(180)
LAPIC_INTR_DUMMY_HANDLER(181)
LAPIC_INTR_DUMMY_HANDLER(182)
LAPIC_INTR_DUMMY_HANDLER(183)
LAPIC_INTR_DUMMY_HANDLER(184)
LAPIC_INTR_DUMMY_HANDLER(185)
LAPIC_INTR_DUMMY_HANDLER(186)
LAPIC_INTR_DUMMY_HANDLER(187)
LAPIC_INTR_DUMMY_HANDLER(188)
LAPIC_INTR_DUMMY_HANDLER(189)
LAPIC_INTR_DUMMY_HANDLER(190)
LAPIC_INTR_DUMMY_HANDLER(191)
LAPIC_INTR_DUMMY_HANDLER(192)
LAPIC_INTR_DUMMY_HANDLER(193)
LAPIC_INTR_DUMMY_HANDLER(194)
LAPIC_INTR_DUMMY_HANDLER(195)
LAPIC_INTR_DUMMY_HANDLER(196)
LAPIC_INTR_DUMMY_HANDLER(197)
LAPIC_INTR_DUMMY_HANDLER(198)
LAPIC_INTR_DUMMY_HANDLER(199)
LAPIC_INTR_DUMMY_HANDLER(200)
LAPIC_INTR_DUMMY_HANDLER(201)
LAPIC_INTR_DUMMY_HANDLER(202)
LAPIC_INTR_DUMMY_HANDLER(203)
LAPIC_INTR_DUMMY_HANDLER(204)
LAPIC_INTR_DUMMY_HANDLER(205)
LAPIC_INTR_DUMMY_HANDLER(206)
LAPIC_INTR_DUMMY_HANDLER(207)
LAPIC_INTR_DUMMY_HANDLER(208)
LAPIC_INTR_DUMMY_HANDLER(209)
LAPIC_INTR_DUMMY_HANDLER(210)
LAPIC_INTR_DUMMY_HANDLER(211)
LAPIC_INTR_DUMMY_HANDLER(212)
LAPIC_INTR_DUMMY_HANDLER(213)
LAPIC_INTR_DUMMY_HANDLER(214)
LAPIC_INTR_DUMMY_HANDLER(215)
LAPIC_INTR_DUMMY_HANDLER(216)
LAPIC_INTR_DUMMY_HANDLER(217)
LAPIC_INTR_DUMMY_HANDLER(218)
LAPIC_INTR_DUMMY_HANDLER(219)
LAPIC_INTR_DUMMY_HANDLER(220)
LAPIC_INTR_DUMMY_HANDLER(221)
LAPIC_INTR_DUMMY_HANDLER(222)
LAPIC_INTR_DUMMY_HANDLER(223)
LAPIC_INTR_DUMMY_HANDLER(224)
LAPIC_INTR_DUMMY_HANDLER(225)
LAPIC_INTR_DUMMY_HANDLER(226)
LAPIC_INTR_DUMMY_HANDLER(227)
LAPIC_INTR_DUMMY_HANDLER(228)
LAPIC_INTR_DUMMY_HANDLER(229)
LAPIC_INTR_DUMMY_HANDLER(230)
LAPIC_INTR_DUMMY_HANDLER(231)
LAPIC_INTR_DUMMY_HANDLER(232)
LAPIC_INTR_DUMMY_HANDLER(233)
LAPIC_INTR_DUMMY_HANDLER(234)
LAPIC_INTR_DUMMY_HANDLER(235)
LAPIC_INTR_DUMMY_HANDLER(236)
LAPIC_INTR_DUMMY_HANDLER(237)
LAPIC_INTR_DUMMY_HANDLER(238)
LAPIC_INTR_DUMMY_HANDLER(239)
LAPIC_INTR_DUMMY_HANDLER(240)
LAPIC_INTR_DUMMY_HANDLER(241)
LAPIC_INTR_DUMMY_HANDLER(242)
LAPIC_INTR_DUMMY_HANDLER(243)
LAPIC_INTR_DUMMY_HANDLER(244)
LAPIC_INTR_DUMMY_HANDLER(245)
LAPIC_INTR_DUMMY_HANDLER(246)
LAPIC_INTR_DUMMY_HANDLER(247)
LAPIC_INTR_DUMMY_HANDLER(248)
LAPIC_INTR_DUMMY_HANDLER(249)
LAPIC_INTR_DUMMY_HANDLER(250)
LAPIC_INTR_DUMMY_HANDLER(251)
LAPIC_INTR_DUMMY_HANDLER(252)
LAPIC_INTR_DUMMY_HANDLER(253)
LAPIC_INTR_DUMMY_HANDLER(254)
LAPIC_INTR_DUMMY_HANDLER(255)
.globl lapic_intr_dummy_handles_end
lapic_intr_dummy_handles_end:
#endif /* CONFIG_APIC_DEBUG */
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