minix/kernel/arch/i386/include/arch_smp.h

#ifndef __SMP_X86_H__
#define __SMP_X86_H__

#include "arch_proto.h" /* K_STACK_SIZE */

#define MAX_NR_INTERRUPT_ENTRIES	128

#ifndef __ASSEMBLY__

/* returns the current cpu id */
#define cpuid	(((u32_t *)(((u32_t)get_stack_frame() + (K_STACK_SIZE - 1)) \
						& ~(K_STACK_SIZE - 1)))[-1])
/* 
 * in case apic or smp is disabled in boot monitor, we need to finish single cpu
 * boot using the legacy PIC
 */
#define smp_single_cpu_fallback() do {		\
	  tss_init(0, get_k_stack_top(0));	\
	  bsp_cpu_id = 0;			\
	  ncpus = 1;				\
	  bsp_finish_booting();			\
} while(0)

extern unsigned char cpuid2apicid[CONFIG_MAX_CPUS];

#define barrier()	do { mfence(); } while(0)

#endif

#endif /* __SMP_X86_H__ */
SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system 2010-09-15 16:09:52 +02:00			`#ifndef __SMP_X86_H__`
			`#define __SMP_X86_H__`

			`#include "arch_proto.h" /* K_STACK_SIZE */`

			`#define MAX_NR_INTERRUPT_ENTRIES 128`

			`#ifndef __ASSEMBLY__`

			`/* returns the current cpu id */`
			`#define cpuid (((u32_t *)(((u32_t)get_stack_frame() + (K_STACK_SIZE - 1)) \`
			`& ~(K_STACK_SIZE - 1)))[-1])`
			`/*`
			`* in case apic or smp is disabled in boot monitor, we need to finish single cpu`
			`* boot using the legacy PIC`
			`*/`
			`#define smp_single_cpu_fallback() do { \`
			`tss_init(0, get_k_stack_top(0)); \`
SMP - APs are fully enabled - apic_send_ipi() to send inter-processor interrupts (IPIs) - APIC IPI schedule and halt handlers to signal x-cpu that a cpu shold reschedule or halt - various little changes to let APs run - no processes are scheduled at the APs and therefore they are idle except being interrupted by a timer time to time 2010-09-15 16:10:30 +02:00			`bsp_cpu_id = 0; \`
			`ncpus = 1; \`
SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system 2010-09-15 16:09:52 +02:00			`bsp_finish_booting(); \`
			`} while(0)`

			`extern unsigned char cpuid2apicid[CONFIG_MAX_CPUS];`

SMP - BSP halts APs before shutting down 2010-09-15 16:10:54 +02:00			`#define barrier() do { mfence(); } while(0)`

SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system 2010-09-15 16:09:52 +02:00			`#endif`

			`#endif /* __SMP_X86_H__ */`