490 lines
14 KiB
C
490 lines
14 KiB
C
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/* $NetBSD: pmap.h,v 1.52 2012/04/20 22:23:24 rmind Exp $ */
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/*
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* Copyright (c) 1997 Charles D. Cranor and Washington University.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Frank van der Linden for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* pmap.h: see pmap.c for the history of this pmap module.
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*/
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#ifndef _X86_PMAP_H_
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#define _X86_PMAP_H_
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/*
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* pl*_pi: index in the ptp page for a pde mapping a VA.
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* (pl*_i below is the index in the virtual array of all pdes per level)
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*/
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#define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
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#define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
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#define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
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#define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
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/*
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* pl*_i: generate index into pde/pte arrays in virtual space
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*
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* pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
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*/
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#define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
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#define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
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#define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
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#define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
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#define pl_i(va, lvl) \
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(((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
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#define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
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/*
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* PTP macros:
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* a PTP's index is the PD index of the PDE that points to it
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* a PTP's offset is the byte-offset in the PTE space that this PTP is at
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* a PTP's VA is the first VA mapped by that PTP
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*/
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#define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
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/* size of a PDP: usually one page, except for PAE */
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#ifdef PAE
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#define PDP_SIZE 4
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#else
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#define PDP_SIZE 1
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#endif
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#if defined(_KERNEL)
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#include <sys/kcpuset.h>
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/*
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* pmap data structures: see pmap.c for details of locking.
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*/
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/*
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* we maintain a list of all non-kernel pmaps
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*/
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LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
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/*
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* linked list of all non-kernel pmaps
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*/
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extern struct pmap_head pmaps;
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extern kmutex_t pmaps_lock; /* protects pmaps */
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/*
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* pool_cache(9) that PDPs are allocated from
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*/
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extern struct pool_cache pmap_pdp_cache;
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/*
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* the pmap structure
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*
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* note that the pm_obj contains the lock pointer, the reference count,
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* page list, and number of PTPs within the pmap.
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*
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* pm_lock is the same as the lock for vm object 0. Changes to
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* the other objects may only be made if that lock has been taken
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* (the other object locks are only used when uvm_pagealloc is called)
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*
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* XXX If we ever support processor numbers higher than 31, we'll have
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* XXX to rethink the CPU mask.
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*/
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struct pmap {
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struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
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#define pm_lock pm_obj[0].vmobjlock
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kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs */
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LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
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pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
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paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */
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struct vm_page *pm_ptphint[PTP_LEVELS-1];
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/* pointer to a PTP in our pmap */
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struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
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#if !defined(__x86_64__)
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vaddr_t pm_hiexec; /* highest executable mapping */
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#endif /* !defined(__x86_64__) */
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int pm_flags; /* see below */
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union descriptor *pm_ldt; /* user-set LDT */
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size_t pm_ldt_len; /* size of LDT in bytes */
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int pm_ldt_sel; /* LDT selector */
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kcpuset_t *pm_cpus; /* mask of CPUs using pmap */
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kcpuset_t *pm_kernel_cpus; /* mask of CPUs using kernel part
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of pmap */
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kcpuset_t *pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's
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ptp mapped */
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uint64_t pm_ncsw; /* for assertions */
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struct vm_page *pm_gc_ptp; /* pages from pmap g/c */
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};
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/* macro to access pm_pdirpa slots */
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#ifdef PAE
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#define pmap_pdirpa(pmap, index) \
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((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
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#else
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#define pmap_pdirpa(pmap, index) \
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((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
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#endif
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/*
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* flag to be used for kernel mappings: PG_u on Xen/amd64,
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* 0 otherwise.
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*/
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#if defined(XEN) && defined(__x86_64__)
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#define PG_k PG_u
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#else
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#define PG_k 0
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#endif
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/*
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* MD flags that we use for pmap_enter and pmap_kenter_pa:
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*/
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/*
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* global kernel variables
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*/
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/*
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* PDPpaddr is the physical address of the kernel's PDP.
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* - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
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* value associated to the kernel process, proc0.
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* - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
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* the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
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* - Xen: it corresponds to the PFN of the kernel's PDP.
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*/
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extern u_long PDPpaddr;
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extern int pmap_pg_g; /* do we support PG_G? */
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extern long nkptp[PTP_LEVELS];
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/*
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* macros
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*/
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
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#define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
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#define pmap_copy(DP,SP,D,L,S)
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#define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
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#define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
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#define pmap_move(DP,SP,D,L,S)
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#define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK)
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#define pmap_mmap_flags(ppn) x86_mmap_flags(ppn)
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#define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
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#if defined(__x86_64__) || defined(PAE)
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#define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT)
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#else
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#define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT)
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#endif
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#define X86_MMAP_FLAG_MASK 0xf
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#define X86_MMAP_FLAG_PREFETCH 0x1
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/*
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* prototypes
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*/
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void pmap_activate(struct lwp *);
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void pmap_bootstrap(vaddr_t);
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bool pmap_clear_attrs(struct vm_page *, unsigned);
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void pmap_deactivate(struct lwp *);
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void pmap_page_remove (struct vm_page *);
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void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
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bool pmap_test_attrs(struct vm_page *, unsigned);
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void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
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void pmap_load(void);
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paddr_t pmap_init_tmp_pgtbl(paddr_t);
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void pmap_remove_all(struct pmap *);
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void pmap_ldt_sync(struct pmap *);
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void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t);
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void pmap_emap_remove(vaddr_t, vsize_t);
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void pmap_emap_sync(bool);
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void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
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pd_entry_t * const **);
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void pmap_unmap_ptes(struct pmap *, struct pmap *);
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int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *);
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u_int x86_mmap_flags(paddr_t);
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bool pmap_is_curpmap(struct pmap *);
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vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
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typedef enum tlbwhy {
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TLBSHOOT_APTE,
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TLBSHOOT_KENTER,
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TLBSHOOT_KREMOVE,
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TLBSHOOT_FREE_PTP1,
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TLBSHOOT_FREE_PTP2,
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TLBSHOOT_REMOVE_PTE,
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TLBSHOOT_REMOVE_PTES,
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TLBSHOOT_SYNC_PV1,
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TLBSHOOT_SYNC_PV2,
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TLBSHOOT_WRITE_PROTECT,
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TLBSHOOT_ENTER,
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TLBSHOOT_UPDATE,
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TLBSHOOT_BUS_DMA,
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TLBSHOOT_BUS_SPACE,
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TLBSHOOT__MAX,
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} tlbwhy_t;
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void pmap_tlb_init(void);
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void pmap_tlb_cpu_init(struct cpu_info *);
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void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
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void pmap_tlb_shootnow(void);
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void pmap_tlb_intr(void);
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#define __HAVE_PMAP_EMAP
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#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
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#define PMAP_FORK /* turn on pmap_fork interface */
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/*
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* Do idle page zero'ing uncached to avoid polluting the cache.
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*/
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bool pmap_pageidlezero(paddr_t);
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#define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
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/*
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* inline functions
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*/
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__inline static bool __unused
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pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde)
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{
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return pmap_pdes_invalid(va, pdes, lastpde) == 0;
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}
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/*
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* pmap_update_pg: flush one page from the TLB (or flush the whole thing
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* if hardware doesn't support one-page flushing)
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*/
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__inline static void __unused
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pmap_update_pg(vaddr_t va)
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{
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invlpg(va);
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}
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/*
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* pmap_update_2pg: flush two pages from the TLB
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*/
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__inline static void __unused
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pmap_update_2pg(vaddr_t va, vaddr_t vb)
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{
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invlpg(va);
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invlpg(vb);
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}
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/*
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* pmap_page_protect: change the protection of all recorded mappings
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* of a managed page
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*
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* => this function is a frontend for pmap_page_remove/pmap_clear_attrs
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* => we only have to worry about making the page more protected.
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* unprotecting a page is done on-demand at fault time.
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*/
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__inline static void __unused
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pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
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{
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if ((prot & VM_PROT_WRITE) == 0) {
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if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
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(void) pmap_clear_attrs(pg, PG_RW);
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} else {
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pmap_page_remove(pg);
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}
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}
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}
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/*
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* pmap_protect: change the protection of pages in a pmap
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*
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* => this function is a frontend for pmap_remove/pmap_write_protect
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* => we only have to worry about making the page more protected.
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* unprotecting a page is done on-demand at fault time.
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*/
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__inline static void __unused
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pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
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{
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if ((prot & VM_PROT_WRITE) == 0) {
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if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
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pmap_write_protect(pmap, sva, eva, prot);
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} else {
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pmap_remove(pmap, sva, eva);
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}
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}
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}
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/*
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* various address inlines
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*
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* vtopte: return a pointer to the PTE mapping a VA, works only for
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* user and PT addresses
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*
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* kvtopte: return a pointer to the PTE mapping a kernel VA
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*/
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#include <lib/libkern/libkern.h>
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static __inline pt_entry_t * __unused
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vtopte(vaddr_t va)
|
||
|
{
|
||
|
|
||
|
KASSERT(va < VM_MIN_KERNEL_ADDRESS);
|
||
|
|
||
|
return (PTE_BASE + pl1_i(va));
|
||
|
}
|
||
|
|
||
|
static __inline pt_entry_t * __unused
|
||
|
kvtopte(vaddr_t va)
|
||
|
{
|
||
|
pd_entry_t *pde;
|
||
|
|
||
|
KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
|
||
|
|
||
|
pde = L2_BASE + pl2_i(va);
|
||
|
if (*pde & PG_PS)
|
||
|
return ((pt_entry_t *)pde);
|
||
|
|
||
|
return (PTE_BASE + pl1_i(va));
|
||
|
}
|
||
|
|
||
|
paddr_t vtophys(vaddr_t);
|
||
|
vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
|
||
|
void pmap_cpu_init_late(struct cpu_info *);
|
||
|
bool sse2_idlezero_page(void *);
|
||
|
|
||
|
#ifdef XEN
|
||
|
#include <sys/bitops.h>
|
||
|
|
||
|
#define XPTE_MASK L1_FRAME
|
||
|
/* Selects the index of a PTE in (A)PTE_BASE */
|
||
|
#define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t)))
|
||
|
|
||
|
/* PTE access inline fuctions */
|
||
|
|
||
|
/*
|
||
|
* Get the machine address of the pointed pte
|
||
|
* We use hardware MMU to get value so works only for levels 1-3
|
||
|
*/
|
||
|
|
||
|
static __inline paddr_t
|
||
|
xpmap_ptetomach(pt_entry_t *pte)
|
||
|
{
|
||
|
pt_entry_t *up_pte;
|
||
|
vaddr_t va = (vaddr_t) pte;
|
||
|
|
||
|
va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
|
||
|
up_pte = (pt_entry_t *) va;
|
||
|
|
||
|
return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
|
||
|
}
|
||
|
|
||
|
/* Xen helpers to change bits of a pte */
|
||
|
#define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
|
||
|
|
||
|
paddr_t vtomach(vaddr_t);
|
||
|
#define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
|
||
|
#endif /* XEN */
|
||
|
|
||
|
/* pmap functions with machine addresses */
|
||
|
void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
|
||
|
int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
|
||
|
vm_prot_t, u_int, int);
|
||
|
bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
|
||
|
|
||
|
/*
|
||
|
* Hooks for the pool allocator.
|
||
|
*/
|
||
|
#define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
|
||
|
|
||
|
#ifdef __HAVE_DIRECT_MAP
|
||
|
|
||
|
#define L4_SLOT_DIRECT 509
|
||
|
#define PDIR_SLOT_DIRECT L4_SLOT_DIRECT
|
||
|
|
||
|
#define PMAP_DIRECT_BASE (VA_SIGN_NEG((L4_SLOT_DIRECT * NBPD_L4)))
|
||
|
#define PMAP_DIRECT_END (VA_SIGN_NEG(((L4_SLOT_DIRECT + 1) * NBPD_L4)))
|
||
|
|
||
|
#define PMAP_DIRECT_MAP(pa) ((vaddr_t)PMAP_DIRECT_BASE + (pa))
|
||
|
#define PMAP_DIRECT_UNMAP(va) ((paddr_t)(va) - PMAP_DIRECT_BASE)
|
||
|
|
||
|
/*
|
||
|
* Alternate mapping hooks for pool pages.
|
||
|
*/
|
||
|
#define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP((pa))
|
||
|
#define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP((va))
|
||
|
|
||
|
void pagezero(vaddr_t);
|
||
|
|
||
|
#endif /* __HAVE_DIRECT_MAP */
|
||
|
|
||
|
#endif /* _KERNEL */
|
||
|
|
||
|
#endif /* _X86_PMAP_H_ */
|