448 lines
10 KiB
C
448 lines
10 KiB
C
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/* kernel headers */
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#include <minix/syslib.h>
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#include <minix/drvlib.h>
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#include <minix/log.h>
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#include <minix/mmio.h>
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#include <minix/gpio.h>
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/* system headers */
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#include <sys/mman.h>
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#include <sys/types.h>
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/* usr headers */
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <assert.h>
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#include "clkconf.h"
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/* local headers */
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/* used for logging */
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static struct log log = {
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.name = "gpio_omap",
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.log_level = LEVEL_INFO,
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.log_func = default_log
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};
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struct gpio_driver
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{
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/* request access to a gpio */
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int (*claim) (char *owner, int nr, struct gpio ** gpio);
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/* Configure the GPIO for a certain purpose */
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int (*pin_mode) (struct gpio * gpio, int mode);
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/* Set the value for a GPIO */
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int (*set) (struct gpio * gpio, int value);
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/* Read the current value of the GPIO */
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int (*read) (struct gpio * gpio, int *value);
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/* Read and clear the value interrupt value of the GPIO */
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int (*intr_read) (struct gpio * gpio, int *value);
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/* Interrupt hook */
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int (*message_hook) (message * m);
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};
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static struct gpio_driver drv;
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struct omap_gpio_bank
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{
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const char *name;
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uint32_t register_address;
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uint32_t irq_nr; /* irq number */
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uint32_t base_address;
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int32_t disabled;
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int irq_id; /* orignhal hook id??? */
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int irq_hook_id; /* hook id */
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uint32_t inter_values; /* values when the interrupt was called */
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};
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#define GPIO1_BASE (0x48310000)
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#define GPIO2_BASE (0x49050000)
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#define GPIO3_BASE (0x49052000)
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#define GPIO4_BASE (0x49054000)
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#define GPIO5_BASE (0x49056000)
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#define GPIO6_BASE (0x49058000)
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#define GPIO1_IRQ 29 /* GPIO module 1 */
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#define GPIO2_IRQ 30 /* GPIO module 2 */
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#define GPIO3_IRQ 31 /* GPIO module 3 */
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#define GPIO4_IRQ 32 /* GPIO module 4 */
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#define GPIO5_IRQ 33 /* GPIO module 5 */
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#define GPIO6_IRQ 34 /* GPIO module 6 */
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#define GPIO1_IRQ_HOOK_ID 0
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#define GPIO2_IRQ_HOOK_ID 1
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#define GPIO3_IRQ_HOOK_ID 2
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#define GPIO4_IRQ_HOOK_ID 3
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#define GPIO5_IRQ_HOOK_ID 4
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#define GPIO6_IRQ_HOOK_ID 5
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#define GPIO_IRQSTATUS1 (0x18)
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#define GPIO_IRQENABLE1 (0x01C)
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#define GPIO_DATAOUT (0x3c)
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#define GPIO_DATAIN (0x38)
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#define GPIO_OE (0x34) /* Output Data Enable */
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#define GPIO_RISINGDETECT1 (0x048)
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#define GPIO_FALLINGDETECT1 (0x04c)
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#define GPIO_CLEARDATAOUT (0x90)
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#define GPIO_SETDATAOUT (0x94)
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static struct omap_gpio_bank omap_gpio_banks[] = {
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{
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.name = "GPIO1",
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.register_address = GPIO1_BASE,
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.irq_nr = GPIO1_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO1_IRQ_HOOK_ID,
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.irq_hook_id = GPIO1_IRQ_HOOK_ID,
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},
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{
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.name = "GPIO2",
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.register_address = GPIO2_BASE,
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.irq_nr = GPIO2_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO2_IRQ_HOOK_ID,
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.irq_hook_id = GPIO2_IRQ_HOOK_ID,
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},
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{
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.name = "GPIO3",
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.register_address = GPIO3_BASE,
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.irq_nr = GPIO3_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO3_IRQ_HOOK_ID,
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.irq_hook_id = GPIO3_IRQ_HOOK_ID,
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},
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{
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.name = "GPIO4",
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.register_address = GPIO4_BASE,
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.irq_nr = GPIO4_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO4_IRQ_HOOK_ID,
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.irq_hook_id = GPIO4_IRQ_HOOK_ID,
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},
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{
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.name = "GPIO5",
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.register_address = GPIO5_BASE,
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.irq_nr = GPIO5_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO5_IRQ_HOOK_ID,
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.irq_hook_id = GPIO5_IRQ_HOOK_ID,
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},
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{
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.name = "GPIO6",
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.register_address = GPIO6_BASE,
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.irq_nr = GPIO6_IRQ,
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.base_address = 0,
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.disabled = 0,
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.irq_id = GPIO6_IRQ_HOOK_ID,
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.irq_hook_id = GPIO6_IRQ_HOOK_ID,
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},
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{NULL, 0, 0}
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};
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#define GPIO_REVISION 0x00
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#define GPIO_REVISION_MAJOR(X) ((X & 0xF0) >> 4)
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#define GPIO_REVISION_MINOR(X) (X & 0XF)
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struct omap_gpio_bank *
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omap_gpio_bank_get(int gpio_nr)
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{
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struct omap_gpio_bank *bank;
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assert(gpio_nr >= 0 && gpio_nr <= 32 * 6);
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bank = &omap_gpio_banks[gpio_nr / 32];
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return bank;
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}
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int
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omap_gpio_claim(char *owner, int nr, struct gpio **gpio)
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{
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log_trace(&log, "%s s claiming %d\n", owner, nr);
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if (nr < 0 && nr >= 32 * 6) {
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log_warn(&log, "%s is claiming unknown GPIO number %d\n",
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owner, nr);
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return EINVAL;
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}
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if (omap_gpio_bank_get(nr)->disabled == 1) {
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log_warn(&log, "%s is claiming GPIO %d from disabled bank\n",
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owner, nr);
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return EINVAL;
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}
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struct gpio *tmp = malloc(sizeof(struct gpio));
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memset(tmp, 0, sizeof(*tmp));
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tmp->nr = nr;
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*gpio = tmp;
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return OK;
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}
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int
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omap_gpio_pin_mode(struct gpio *gpio, int mode)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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gpio->mode = mode;
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bank = omap_gpio_bank_get(gpio->nr);
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log_debug(&log,
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"pin mode bank %s, base address 0x%x -> register address (0x%x,0x%x,0x%x)\n",
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bank->name, bank->base_address, bank->register_address, GPIO_OE,
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bank->register_address + GPIO_OE);
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if (mode == GPIO_MODE_OUTPUT) {
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set32(bank->base_address + GPIO_OE, BIT(gpio->nr % 32), 0);
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} else {
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set32(bank->base_address + GPIO_FALLINGDETECT1,
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BIT(gpio->nr % 32), 0xffffffff);
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set32(bank->base_address + GPIO_IRQENABLE1, BIT(gpio->nr % 32),
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0xffffffff);
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set32(bank->base_address + GPIO_OE, BIT(gpio->nr % 32),
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0xffffffff);
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}
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return 0;
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}
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int
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omap_gpio_set(struct gpio *gpio, int value)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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assert(gpio->nr >= 0 && gpio->nr <= 32 * 6);
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bank = omap_gpio_bank_get(gpio->nr);
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if (value == 1) {
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write32(bank->base_address + GPIO_SETDATAOUT,
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BIT(gpio->nr % 32));
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} else {
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write32(bank->base_address + GPIO_CLEARDATAOUT,
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BIT(gpio->nr % 32));
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}
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return OK;
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}
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int
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omap_gpio_read(struct gpio *gpio, int *value)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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assert(gpio->nr >= 0 && gpio->nr <= 32 * 6);
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bank = omap_gpio_bank_get(gpio->nr);
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log_trace(&log, "mode=%d OU/IN 0x%08x 0x%08x\n", gpio->mode,
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read32(bank->base_address + GPIO_DATAIN),
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read32(bank->base_address + GPIO_DATAOUT));
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if (gpio->mode == GPIO_MODE_INPUT) {
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*value =
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(read32(bank->base_address +
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GPIO_DATAIN) >> (gpio->nr % 32)) & 0x1;
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} else {
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*value =
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(read32(bank->base_address +
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GPIO_DATAOUT) >> (gpio->nr % 32)) & 0x1;
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}
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return OK;
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}
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int
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omap_gpio_intr_read(struct gpio *gpio, int *value)
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{
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struct omap_gpio_bank *bank;
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assert(gpio != NULL);
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assert(gpio->nr >= 0 && gpio->nr <= 32 * 6);
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bank = omap_gpio_bank_get(gpio->nr);
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/* TODO: check if interrupt where enabled?? */
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*value = (bank->inter_values >> (gpio->nr % 32)) & 0x1;
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/* clear the data */
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bank->inter_values &= ~(1 << (gpio->nr % 32));
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return OK;
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}
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int
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omap_message_hook(message * m)
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{
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unsigned long irq_set, i;
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struct omap_gpio_bank *bank;
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switch (_ENDPOINT_P(m->m_source)) {
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case HARDWARE:
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/* Hardware interrupt return a "set" if pending interrupts */
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irq_set = m->NOTIFY_ARG;
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log_debug(&log, "HW message 0X%08x\n", m->NOTIFY_ARG);
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bank = &omap_gpio_banks[0];
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for (i = 0; omap_gpio_banks[i].name != NULL; i++) {
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bank = &omap_gpio_banks[i];
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if (irq_set & (1 << (bank->irq_id))) {
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log_trace(&log, "Interrupt for bank %s\n",
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bank->name);
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bank->inter_values |=
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read32(bank->base_address +
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GPIO_IRQSTATUS1);
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/* clear the interrupts */
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write32(bank->base_address + GPIO_IRQSTATUS1,
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0xffffffff);
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if (sys_irqenable(&bank->irq_hook_id) != OK) {
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log_warn(&log,
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"Failed to enable irq for bank %s\n",
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bank->name);
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}
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}
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}
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return OK;
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default:
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log_warn(&log, "Unknown message\n");
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break;
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}
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return OK;
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}
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int
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omap_gpio_init(struct gpio_driver *drv)
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{
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u32_t revision;
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int i;
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struct minix_mem_range mr;
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struct omap_gpio_bank *bank;
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bank = &omap_gpio_banks[0];
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for (i = 0; omap_gpio_banks[i].name != NULL; i++) {
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bank = &omap_gpio_banks[i];
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mr.mr_base = bank->register_address;
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mr.mr_limit = bank->register_address + 0x400;
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if (sys_privctl(SELF, SYS_PRIV_ADD_MEM, &mr) != 0) {
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log_warn(&log,
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"Unable to request permission to map memory\n");
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return EPERM; /* fixme */
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}
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/* Set the base address to use */
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bank->base_address =
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(uint32_t) vm_map_phys(SELF,
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(void *) bank->register_address, 0x400);
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if (bank->base_address == (uint32_t) MAP_FAILED) {
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log_warn(&log, "Unable to map GPIO memory\n");
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return EPERM; /* fixme */
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}
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revision = 0;
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revision = read32(bank->base_address + GPIO_REVISION);
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/* test if we can access it */
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if (GPIO_REVISION_MAJOR(revision) != 2
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|| GPIO_REVISION_MINOR(revision) != 5) {
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log_warn(&log,
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"Failed to read the revision of GPIO bank %s.. disabling\n",
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bank->name);
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bank->disabled = 1;
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}
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bank->disabled = 0;
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if (sys_irqsetpolicy(bank->irq_nr, 0,
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&bank->irq_hook_id) != OK) {
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log_warn(&log,
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"GPIO: couldn't set IRQ policy for bank %s\n",
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bank->name);
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continue;
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};
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if (bank->irq_id != bank->irq_hook_id) {
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log_debug(&log, "requested id %d but got id %d\n",
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bank->irq_id, bank->irq_hook_id);
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}
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if (sys_irqenable(&bank->irq_hook_id) != OK) {
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log_warn(&log,
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"GPIO: couldn't enable interrupt for %s\n",
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bank->name);
|
||
|
|
};
|
||
|
|
log_trace(&log, "bank %s mapped on 0x%x with irq hook id %d\n",
|
||
|
|
bank->name, bank->base_address, bank->irq_hook_id);
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
clkconf_init();
|
||
|
|
/* enable the interface and functional clock on GPIO bank 1 */
|
||
|
|
clkconf_set(CM_FCLKEN_WKUP, BIT(3), 0xffffffff);
|
||
|
|
clkconf_set(CM_ICLKEN_WKUP, BIT(3), 0xffffffff);
|
||
|
|
clkconf_release();
|
||
|
|
|
||
|
|
|
||
|
|
drv->claim = omap_gpio_claim;
|
||
|
|
drv->pin_mode = omap_gpio_pin_mode;
|
||
|
|
drv->set = omap_gpio_set;
|
||
|
|
drv->read = omap_gpio_read;
|
||
|
|
drv->intr_read = omap_gpio_intr_read;
|
||
|
|
drv->message_hook = omap_message_hook;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
gpio_init()
|
||
|
|
{
|
||
|
|
return omap_gpio_init(&drv);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* request access to a gpio */
|
||
|
|
int
|
||
|
|
gpio_claim(char *owner, int nr, struct gpio **gpio)
|
||
|
|
{
|
||
|
|
return drv.claim(owner, nr, gpio);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Configure the GPIO for a certain purpose */
|
||
|
|
int
|
||
|
|
gpio_pin_mode(struct gpio *gpio, int mode)
|
||
|
|
{
|
||
|
|
return drv.pin_mode(gpio, mode);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Set the value for a GPIO */
|
||
|
|
int
|
||
|
|
gpio_set(struct gpio *gpio, int value)
|
||
|
|
{
|
||
|
|
return drv.set(gpio, value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Read the current value of the GPIO */
|
||
|
|
int
|
||
|
|
gpio_read(struct gpio *gpio, int *value)
|
||
|
|
{
|
||
|
|
return drv.read(gpio, value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Read and clear the value interrupt value of the GPIO */
|
||
|
|
int
|
||
|
|
gpio_intr_read(struct gpio *gpio, int *value)
|
||
|
|
{
|
||
|
|
return drv.intr_read(gpio, value);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Interrupt hook */
|
||
|
|
int
|
||
|
|
gpio_intr_message(message * m)
|
||
|
|
{
|
||
|
|
return drv.message_hook(m);
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
gpio_release()
|
||
|
|
{
|
||
|
|
return OK;
|
||
|
|
}
|