2005-08-05 11:53:08 +02:00
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/*
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rtl8029.c
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Initialization of PCI DP8390-based ethernet cards
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Created: April 2000 by Philip Homburg <philip@f-mnx.phicoh.com>
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*/
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2010-03-22 22:25:22 +01:00
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#include <minix/drivers.h>
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2005-08-05 11:53:08 +02:00
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#include <stdlib.h>
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#include <sys/types.h>
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#include <net/gen/ether.h>
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#include <net/gen/eth_io.h>
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2010-03-08 12:04:59 +01:00
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#include <machine/pci.h>
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2005-08-05 11:53:08 +02:00
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#include "assert.h"
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#include "local.h"
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#include "dp8390.h"
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#include "rtl8029.h"
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#if ENABLE_PCI
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PRIVATE struct pcitab
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{
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u16_t vid;
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u16_t did;
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int checkclass;
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} pcitab[]=
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{
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{ 0x10ec, 0x8029, 0 }, /* Realtek RTL8029 */
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{ 0x0000, 0x0000, 0 }
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};
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_PROTOTYPE( static void rtl_init, (struct dpeth *dep) );
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2007-04-23 17:38:00 +02:00
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#if 0
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2005-08-05 11:53:08 +02:00
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_PROTOTYPE( static u16_t get_ee_word, (dpeth_t *dep, int a) );
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_PROTOTYPE( static void ee_wen, (dpeth_t *dep) );
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2010-04-21 13:05:22 +02:00
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_PROTOTYPE( static void set_ee_word, (dpeth_t *dep, int a, u16_t w) );
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2005-08-05 11:53:08 +02:00
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_PROTOTYPE( static void ee_wds, (dpeth_t *dep) );
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2007-04-23 17:38:00 +02:00
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#endif
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2005-08-05 11:53:08 +02:00
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2010-05-10 22:19:55 +02:00
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PUBLIC int rtl_probe(dep, skip)
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2005-08-05 11:53:08 +02:00
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struct dpeth *dep;
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2010-05-10 22:19:55 +02:00
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int skip;
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2005-08-05 11:53:08 +02:00
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{
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int i, r, devind, just_one;
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u16_t vid, did;
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u32_t bar;
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u8_t ilr;
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char *dname;
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pci_init();
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if ((dep->de_pcibus | dep->de_pcidev | dep->de_pcifunc) != 0)
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{
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/* Look for specific PCI device */
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r= pci_find_dev(dep->de_pcibus, dep->de_pcidev,
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dep->de_pcifunc, &devind);
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if (r == 0)
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{
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printf("%s: no PCI found at %d.%d.%d\n",
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dep->de_name, dep->de_pcibus,
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dep->de_pcidev, dep->de_pcifunc);
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return 0;
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}
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pci_ids(devind, &vid, &did);
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just_one= TRUE;
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}
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else
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{
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r= pci_first_dev(&devind, &vid, &did);
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if (r == 0)
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return 0;
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just_one= FALSE;
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}
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for(;;)
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{
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2007-04-23 17:38:00 +02:00
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for (i= 0; pcitab[i].vid != 0 || pcitab[i].did != 0; i++)
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2005-08-05 11:53:08 +02:00
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{
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if (pcitab[i].vid != vid)
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continue;
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if (pcitab[i].did != did)
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continue;
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2010-03-05 16:05:11 +01:00
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if (pcitab[i].checkclass) {
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panic("rtl_probe: class check not implemented");
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2005-08-05 11:53:08 +02:00
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}
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break;
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}
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2010-05-10 22:19:55 +02:00
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if (pcitab[i].vid != 0 || pcitab[i].did != 0) {
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if (just_one || !skip)
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break;
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skip--;
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}
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2005-08-05 11:53:08 +02:00
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if (just_one)
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{
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printf(
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"%s: wrong PCI device (%04X/%04X) found at %d.%d.%d\n",
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dep->de_name, vid, did,
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dep->de_pcibus,
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dep->de_pcidev, dep->de_pcifunc);
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return 0;
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}
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r= pci_next_dev(&devind, &vid, &did);
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if (!r)
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return 0;
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}
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dname= pci_dev_name(vid, did);
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if (!dname)
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dname= "unknown device";
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printf("%s: %s (%04X/%04X) at %s\n",
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dep->de_name, dname, vid, did, pci_slot_name(devind));
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2007-04-24 14:29:51 +02:00
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if(pci_reserve_ok(devind) != OK)
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return 0;
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2005-08-05 11:53:08 +02:00
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/* printf("cr = 0x%x\n", pci_attr_r16(devind, PCI_CR)); */
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bar= pci_attr_r32(devind, PCI_BAR) & 0xffffffe0;
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2005-08-09 13:23:41 +02:00
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if (bar < 0x400)
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2010-03-05 16:05:11 +01:00
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panic("base address is not properly configured");
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2005-08-09 13:23:41 +02:00
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2005-08-05 11:53:08 +02:00
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dep->de_base_port= bar;
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ilr= pci_attr_r8(devind, PCI_ILR);
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dep->de_irq= ilr;
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if (debug)
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{
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printf("%s: using I/O address 0x%lx, IRQ %d\n",
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dep->de_name, (unsigned long)bar, ilr);
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}
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dep->de_initf= rtl_init;
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return TRUE;
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}
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static void rtl_init(dep)
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dpeth_t *dep;
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{
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u8_t reg_a, reg_b, cr, config0, config2, config3;
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int i;
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#if DEBUG
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printf("rtl_init called\n");
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#endif
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ne_init(dep);
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/* ID */
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outb_reg0(dep, DP_CR, CR_PS_P0);
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reg_a = inb_reg0(dep, DP_DUM1);
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reg_b = inb_reg0(dep, DP_DUM2);
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#if DEBUG
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printf("rtl_init: '%c', '%c'\n", reg_a, reg_b);
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#endif
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outb_reg0(dep, DP_CR, CR_PS_P3);
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config0 = inb_reg3(dep, 3);
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config2 = inb_reg3(dep, 5);
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config3 = inb_reg3(dep, 6);
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outb_reg0(dep, DP_CR, CR_PS_P0);
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#if DEBUG
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printf("rtl_init: config 0/2/3 = %x/%x/%x\n",
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config0, config2, config3);
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#endif
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if (getenv("RTL8029FD"))
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{
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printf("rtl_init: setting full-duplex mode\n");
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outb_reg0(dep, DP_CR, CR_PS_P3);
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cr= inb_reg3(dep, 1);
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outb_reg3(dep, 1, cr | 0xc0);
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outb_reg3(dep, 6, config3 | 0x40);
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config3 = inb_reg3(dep, 6);
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config2= inb_reg3(dep, 5);
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outb_reg3(dep, 5, config2 | 0x20);
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config2= inb_reg3(dep, 5);
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outb_reg3(dep, 1, cr);
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outb_reg0(dep, DP_CR, CR_PS_P0);
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#if DEBUG
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printf("rtl_init: config 2 = %x\n", config2);
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printf("rtl_init: config 3 = %x\n", config3);
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#endif
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}
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#if DEBUG
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for (i= 0; i<64; i++)
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printf("%x ", get_ee_word(dep, i));
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printf("\n");
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#endif
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2007-04-23 17:38:00 +02:00
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#if 0
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2005-08-05 11:53:08 +02:00
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if (getenv("RTL8029MN"))
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{
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ee_wen(dep);
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set_ee_word(dep, 0x78/2, 0x10ec);
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set_ee_word(dep, 0x7A/2, 0x8029);
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set_ee_word(dep, 0x7C/2, 0x10ec);
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set_ee_word(dep, 0x7E/2, 0x8029);
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ee_wds(dep);
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assert(get_ee_word(dep, 0x78/2) == 0x10ec);
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assert(get_ee_word(dep, 0x7A/2) == 0x8029);
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assert(get_ee_word(dep, 0x7C/2) == 0x10ec);
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assert(get_ee_word(dep, 0x7E/2) == 0x8029);
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}
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if (getenv("RTL8029XXX"))
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{
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ee_wen(dep);
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set_ee_word(dep, 0x76/2, 0x8029);
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ee_wds(dep);
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assert(get_ee_word(dep, 0x76/2) == 0x8029);
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}
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2007-04-23 17:38:00 +02:00
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#endif
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2005-08-05 11:53:08 +02:00
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}
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2007-04-23 17:38:00 +02:00
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#if 0
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2005-08-05 11:53:08 +02:00
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static u16_t get_ee_word(dep, a)
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dpeth_t *dep;
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int a;
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{
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int b, i, cmd;
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u16_t w;
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outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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/* Switch to 9346 mode and enable CS */
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outb_reg3(dep, 1, 0x80 | 0x8);
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cmd= 0x180 | (a & 0x3f); /* 1 1 0 a5 a4 a3 a2 a1 a0 */
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for (i= 8; i >= 0; i--)
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{
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b= (cmd & (1 << i));
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b= (b ? 2 : 0);
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/* Cmd goes out on the rising edge of the clock */
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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}
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outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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w= 0;
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for (i= 0; i<16; i++)
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{
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w <<= 1;
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/* Data is shifted out on the rising edge. Read at the
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* falling edge.
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*/
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4);
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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b= inb_reg3(dep, 1);
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w |= (b & 1);
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}
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outb_reg3(dep, 1, 0x80); /* drop CS */
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outb_reg3(dep, 1, 0x00); /* back to normal */
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outb_reg0(dep, DP_CR, CR_PS_P0); /* back to bank 0 */
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return w;
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}
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static void ee_wen(dep)
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dpeth_t *dep;
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{
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int b, i, cmd;
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outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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/* Switch to 9346 mode and enable CS */
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outb_reg3(dep, 1, 0x80 | 0x8);
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cmd= 0x130; /* 1 0 0 1 1 x x x x */
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for (i= 8; i >= 0; i--)
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{
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b= (cmd & (1 << i));
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b= (b ? 2 : 0);
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/* Cmd goes out on the rising edge of the clock */
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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}
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outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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outb_reg3(dep, 1, 0x80); /* Drop CS */
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micro_delay(1); /* Is this required? */
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}
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static void set_ee_word(dep, a, w)
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dpeth_t *dep;
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int a;
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u16_t w;
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{
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int b, i, cmd;
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outb_reg3(dep, 1, 0x80 | 0x8); /* Set CS */
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cmd= 0x140 | (a & 0x3f); /* 1 0 1 a5 a4 a3 a2 a1 a0 */
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for (i= 8; i >= 0; i--)
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{
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b= (cmd & (1 << i));
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b= (b ? 2 : 0);
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/* Cmd goes out on the rising edge of the clock */
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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}
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for (i= 15; i >= 0; i--)
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{
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b= (w & (1 << i));
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b= (b ? 2 : 0);
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/* Cmd goes out on the rising edge of the clock */
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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}
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outb_reg3(dep, 1, 0x80 | 0x8); /* End of data */
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outb_reg3(dep, 1, 0x80); /* Drop CS */
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micro_delay(1); /* Is this required? */
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outb_reg3(dep, 1, 0x80 | 0x8); /* Set CS */
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for (i= 0; i<10000; i++)
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{
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if (inb_reg3(dep, 1) & 1)
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break;
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micro_delay(1);
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}
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if (!(inb_reg3(dep, 1) & 1))
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2010-03-05 16:05:11 +01:00
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panic("set_ee_word: device remains busy");
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2005-08-05 11:53:08 +02:00
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}
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static void ee_wds(dep)
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dpeth_t *dep;
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{
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int b, i, cmd;
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outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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/* Switch to 9346 mode and enable CS */
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outb_reg3(dep, 1, 0x80 | 0x8);
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cmd= 0x100; /* 1 0 0 0 0 x x x x */
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for (i= 8; i >= 0; i--)
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{
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b= (cmd & (1 << i));
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b= (b ? 2 : 0);
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/* Cmd goes out on the rising edge of the clock */
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outb_reg3(dep, 1, 0x80 | 0x8 | b);
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outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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}
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outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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outb_reg3(dep, 1, 0x80); /* Drop CS */
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outb_reg3(dep, 1, 0x00); /* back to normal */
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outb_reg0(dep, DP_CR, CR_PS_P0); /* back to bank 0 */
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|
}
|
2007-04-23 17:38:00 +02:00
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#endif
|
2005-08-05 11:53:08 +02:00
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#endif /* ENABLE_PCI */
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/*
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* $PchId: rtl8029.c,v 1.7 2004/08/03 12:16:58 philip Exp $
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*/
|