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minix/kernel/arch/i386/glo.h

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Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
#ifndef __GLO_X86_H__
#define __GLO_X86_H__
SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system
2010-09-15 16:09:52 +02:00
#include "kernel/kernel.h"
SMP - CPU local run queues - each CPU has its own runqueues - processes on BSP are put on the runqueues later after a switch to the final stack when cpuid works to avoid special cases - enqueue() and dequeue() use the run queues of the cpu the process is assigned to - pick_proc() uses the local run queues - printing of per-CPU run queues ('2') on serial console
2010-09-15 16:10:18 +02:00
#include "arch_proto.h"
SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system
2010-09-15 16:09:52 +02:00
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
EXTERN int cpu_has_tsc; /* signal whether this cpu has time stamp register. This
feature was introduced by Pentium */
SMP - We boot APs - kernel detects CPUs by searching ACPI tables for local apic nodes - each CPU has its own TSS that points to its own stack. All cpus boot on the same boot stack (in sequence) but switch to its private stack as soon as they can. - final booting code in main() placed in bsp_finish_booting() which is executed only after the BSP switches to its final stack - apic functions to send startup interrupts - assembler functions to handle CPU features not needed for single cpu mode like memory barries, HT detection etc. - new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and kernel/arch/i386/include/arch_smp.h - 16-bit trampoline code for the APs. It is executed by each AP after receiving startup IPIs it brings up the CPUs to 32bit mode and let them spin in an infinite loop so they don't do any damage. - implementation of kernel spinlock - CONFIG_SMP and CONFIG_MAX_CPUS set by the build system
2010-09-15 16:09:52 +02:00
EXTERN struct tss_s tss[CONFIG_MAX_CPUS];
EXTERN int i386_paging_enabled;
Local APIC - local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
2009-11-16 22:41:44 +01:00
#endif /* __GLO_X86_H__ */
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