437 lines
12 KiB
C
437 lines
12 KiB
C
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// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s| FileCheck %s
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// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s -target-feature +avx | FileCheck %s -check-prefix=AVX
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#include <stdarg.h>
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// CHECK-LABEL: define signext i8 @f0()
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char f0(void) {
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return 0;
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}
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// CHECK-LABEL: define signext i16 @f1()
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short f1(void) {
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return 0;
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}
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// CHECK-LABEL: define i32 @f2()
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int f2(void) {
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return 0;
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}
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// CHECK-LABEL: define float @f3()
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float f3(void) {
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return 0;
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}
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// CHECK-LABEL: define double @f4()
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double f4(void) {
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return 0;
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}
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// CHECK-LABEL: define x86_fp80 @f5()
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long double f5(void) {
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return 0;
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}
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// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
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void f6(char a0, short a1, int a2, long long a3, void *a4) {
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}
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// CHECK-LABEL: define void @f7(i32 %a0)
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typedef enum { A, B, C } e7;
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void f7(e7 a0) {
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}
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// Test merging/passing of upper eightbyte with X87 class.
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//
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// CHECK-LABEL: define void @f8_1(%union.u8* noalias sret %agg.result)
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// CHECK-LABEL: define void @f8_2(%union.u8* byval align 16 %a0)
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union u8 {
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long double a;
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int b;
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};
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union u8 f8_1() { while (1) {} }
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void f8_2(union u8 a0) {}
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// CHECK-LABEL: define i64 @f9()
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struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} }
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// CHECK-LABEL: define void @f10(i64 %a0.coerce)
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struct s10 { int a; int b; int : 0; };
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void f10(struct s10 a0) {}
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// CHECK-LABEL: define void @f11(%union.anon* noalias sret %agg.result)
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union { long double a; float b; } f11() { while (1) {} }
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// CHECK-LABEL: define i32 @f12_0()
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// CHECK-LABEL: define void @f12_1(i32 %a0.coerce)
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struct s12 { int a __attribute__((aligned(16))); };
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struct s12 f12_0(void) { while (1) {} }
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void f12_1(struct s12 a0) {}
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// Check that sret parameter is accounted for when checking available integer
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// registers.
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// CHECK: define void @f13(%struct.s13_0* noalias sret %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval align 8 %e, i32 %f)
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struct s13_0 { long long f0[3]; };
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struct s13_1 { long long f0[2]; };
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struct s13_0 f13(int a, int b, int c, int d,
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struct s13_1 e, int f) { while (1) {} }
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// CHECK: define void @f14({{.*}}, i8 signext %X)
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void f14(int a, int b, int c, int d, int e, int f, char X) {}
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// CHECK: define void @f15({{.*}}, i8* %X)
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void f15(int a, int b, int c, int d, int e, int f, void *X) {}
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// CHECK: define void @f16({{.*}}, float %X)
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void f16(float a, float b, float c, float d, float e, float f, float g, float h,
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float X) {}
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// CHECK: define void @f17({{.*}}, x86_fp80 %X)
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void f17(float a, float b, float c, float d, float e, float f, float g, float h,
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long double X) {}
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// Check for valid coercion. The struct should be passed/returned as i32, not
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// as i64 for better code quality.
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// rdar://8135035
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// CHECK-LABEL: define void @f18(i32 %a, i32 %f18_arg1.coerce)
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struct f18_s0 { int f0; };
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void f18(int a, struct f18_s0 f18_arg1) { while (1) {} }
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// Check byval alignment.
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// CHECK-LABEL: define void @f19(%struct.s19* byval align 16 %x)
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struct s19 {
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long double a;
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};
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void f19(struct s19 x) {}
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// CHECK-LABEL: define void @f20(%struct.s20* byval align 32 %x)
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struct __attribute__((aligned(32))) s20 {
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int x;
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int y;
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};
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void f20(struct s20 x) {}
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struct StringRef {
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long x;
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const char *Ptr;
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};
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// rdar://7375902
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// CHECK-LABEL: define i8* @f21(i64 %S.coerce0, i8* %S.coerce1)
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const char *f21(struct StringRef S) { return S.x+S.Ptr; }
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// PR7567
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typedef __attribute__ ((aligned(16))) struct f22s { unsigned long long x[2]; } L;
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void f22(L x, L y) { }
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// CHECK: @f22
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// CHECK: %x = alloca{{.*}}, align 16
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// CHECK: %y = alloca{{.*}}, align 16
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// PR7714
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struct f23S {
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short f0;
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unsigned f1;
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int f2;
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};
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void f23(int A, struct f23S B) {
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// CHECK-LABEL: define void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
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}
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struct f24s { long a; int b; };
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struct f23S f24(struct f23S *X, struct f24s *P2) {
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return *X;
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// CHECK: define { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
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}
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// rdar://8248065
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typedef float v4f32 __attribute__((__vector_size__(16)));
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v4f32 f25(v4f32 X) {
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// CHECK-LABEL: define <4 x float> @f25(<4 x float> %X)
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// CHECK-NOT: alloca
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// CHECK: alloca <4 x float>
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// CHECK-NOT: alloca
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// CHECK: store <4 x float> %X, <4 x float>*
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// CHECK-NOT: store
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// CHECK: ret <4 x float>
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return X+X;
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}
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struct foo26 {
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int *X;
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float *Y;
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};
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struct foo26 f26(struct foo26 *P) {
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// CHECK: define { i32*, float* } @f26(%struct.foo26* %P)
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return *P;
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}
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struct v4f32wrapper {
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v4f32 v;
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};
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struct v4f32wrapper f27(struct v4f32wrapper X) {
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// CHECK-LABEL: define <4 x float> @f27(<4 x float> %X.coerce)
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return X;
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}
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// rdar://5711709
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struct f28c {
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double x;
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int y;
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};
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void f28(struct f28c C) {
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// CHECK-LABEL: define void @f28(double %C.coerce0, i32 %C.coerce1)
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}
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struct f29a {
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struct c {
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double x;
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int y;
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} x[1];
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};
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void f29a(struct f29a A) {
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// CHECK-LABEL: define void @f29a(double %A.coerce0, i32 %A.coerce1)
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}
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// rdar://8249586
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struct S0 { char f0[8]; char f2; char f3; char f4; };
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void f30(struct S0 p_4) {
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// CHECK-LABEL: define void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
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}
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// Pass the third element as a float when followed by tail padding.
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// rdar://8251384
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struct f31foo { float a, b, c; };
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float f31(struct f31foo X) {
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// CHECK-LABEL: define float @f31(<2 x float> %X.coerce0, float %X.coerce1)
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return X.c;
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}
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_Complex float f32(_Complex float A, _Complex float B) {
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// rdar://6379669
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// CHECK-LABEL: define <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
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return A+B;
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}
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// rdar://8357396
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struct f33s { long x; float c,d; };
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void f33(va_list X) {
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va_arg(X, struct f33s);
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}
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typedef unsigned long long v1i64 __attribute__((__vector_size__(8)));
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// rdar://8359248
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// CHECK-LABEL: define i64 @f34(i64 %arg.coerce)
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v1i64 f34(v1i64 arg) { return arg; }
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// rdar://8358475
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// CHECK-LABEL: define i64 @f35(i64 %arg.coerce)
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typedef unsigned long v1i64_2 __attribute__((__vector_size__(8)));
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v1i64_2 f35(v1i64_2 arg) { return arg+arg; }
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// rdar://9122143
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// CHECK: declare void @func(%struct._str* byval align 16)
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typedef struct _str {
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union {
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long double a;
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long c;
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};
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} str;
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void func(str s);
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str ss;
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void f9122143()
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{
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func(ss);
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}
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// CHECK-LABEL: define double @f36(double %arg.coerce)
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typedef unsigned v2i32 __attribute((__vector_size__(8)));
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v2i32 f36(v2i32 arg) { return arg; }
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// AVX: declare void @f38(<8 x float>)
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// AVX: declare void @f37(<8 x float>)
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// CHECK: declare void @f38(%struct.s256* byval align 32)
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// CHECK: declare void @f37(<8 x float>* byval align 32)
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typedef float __m256 __attribute__ ((__vector_size__ (32)));
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typedef struct {
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__m256 m;
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} s256;
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s256 x38;
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__m256 x37;
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void f38(s256 x);
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void f37(__m256 x);
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void f39() { f38(x38); f37(x37); }
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// The two next tests make sure that the struct below is passed
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// in the same way regardless of avx being used
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// CHECK: declare void @func40(%struct.t128* byval align 16)
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typedef float __m128 __attribute__ ((__vector_size__ (16)));
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typedef struct t128 {
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__m128 m;
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__m128 n;
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} two128;
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extern void func40(two128 s);
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void func41(two128 s) {
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func40(s);
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}
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// CHECK: declare void @func42(%struct.t128_2* byval align 16)
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typedef struct xxx {
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__m128 array[2];
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} Atwo128;
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typedef struct t128_2 {
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Atwo128 x;
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} SA;
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extern void func42(SA s);
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void func43(SA s) {
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func42(s);
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}
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// CHECK-LABEL: define i32 @f44
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// CHECK: ptrtoint
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// CHECK-NEXT: and {{.*}}, -32
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// CHECK-NEXT: inttoptr
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typedef int T44 __attribute((vector_size(32)));
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struct s44 { T44 x; int y; };
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int f44(int i, ...) {
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__builtin_va_list ap;
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__builtin_va_start(ap, i);
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struct s44 s = __builtin_va_arg(ap, struct s44);
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__builtin_va_end(ap);
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return s.y;
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}
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// Text that vec3 returns the correct LLVM IR type.
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// AVX-LABEL: define i32 @foo(<3 x i64> %X)
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typedef long long3 __attribute((ext_vector_type(3)));
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int foo(long3 X)
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{
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return 0;
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}
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// Make sure we don't use a varargs convention for a function without a
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// prototype where AVX types are involved.
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// AVX: @test45
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// AVX: call i32 bitcast (i32 (...)* @f45 to i32 (<8 x float>)*)
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int f45();
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__m256 x45;
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void test45() { f45(x45); }
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// Make sure we use byval to pass 64-bit vectors in memory; the LLVM call
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// lowering can't handle this case correctly because it runs after legalization.
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// CHECK: @test46
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// CHECK: call void @f46({{.*}}<2 x float>* byval align 8 {{.*}}, <2 x float>* byval align 8 {{.*}})
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typedef float v46 __attribute((vector_size(8)));
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void f46(v46,v46,v46,v46,v46,v46,v46,v46,v46,v46);
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void test46() { v46 x = {1,2}; f46(x,x,x,x,x,x,x,x,x,x); }
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// Check that we pass the struct below without using byval, which helps out
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// codegen.
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//
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// CHECK: @test47
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// CHECK: call void @f47(i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}})
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struct s47 { unsigned a; };
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void f47(int,int,int,int,int,int,struct s47);
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void test47(int a, struct s47 b) { f47(a, a, a, a, a, a, b); }
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// rdar://12723368
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// In the following example, there are holes in T4 at the 3rd byte and the 4th
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||
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|
// byte, however, T2 does not have those holes. T4 is chosen to be the
|
||
|
|
// representing type for union T1, but we can't use load or store of T4 since
|
||
|
|
// it will skip the 3rd byte and the 4th byte.
|
||
|
|
// In general, Since we don't accurately represent the data fields of a union,
|
||
|
|
// do not use load or store of the representing llvm type for the union.
|
||
|
|
typedef _Complex int T2;
|
||
|
|
typedef _Complex char T5;
|
||
|
|
typedef _Complex int T7;
|
||
|
|
typedef struct T4 { T5 field0; T7 field1; } T4;
|
||
|
|
typedef union T1 { T2 field0; T4 field1; } T1;
|
||
|
|
extern T1 T1_retval;
|
||
|
|
T1 test48(void) {
|
||
|
|
// CHECK: @test48
|
||
|
|
// CHECK: memcpy
|
||
|
|
// CHECK: memcpy
|
||
|
|
return T1_retval;
|
||
|
|
}
|
||
|
|
|
||
|
|
void test49_helper(double, ...);
|
||
|
|
void test49(double d, double e) {
|
||
|
|
test49_helper(d, e);
|
||
|
|
}
|
||
|
|
// CHECK-LABEL: define void @test49(
|
||
|
|
// CHECK: [[T0:%.*]] = load double*
|
||
|
|
// CHECK-NEXT: [[T1:%.*]] = load double*
|
||
|
|
// CHECK-NEXT: call void (double, ...)* @test49_helper(double [[T0]], double [[T1]])
|
||
|
|
|
||
|
|
void test50_helper();
|
||
|
|
void test50(double d, double e) {
|
||
|
|
test50_helper(d, e);
|
||
|
|
}
|
||
|
|
// CHECK-LABEL: define void @test50(
|
||
|
|
// CHECK: [[T0:%.*]] = load double*
|
||
|
|
// CHECK-NEXT: [[T1:%.*]] = load double*
|
||
|
|
// CHECK-NEXT: call void (double, double, ...)* bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double [[T0]], double [[T1]])
|
||
|
|
|
||
|
|
struct test51_s { __uint128_t intval; };
|
||
|
|
void test51(struct test51_s *s, __builtin_va_list argList) {
|
||
|
|
*s = __builtin_va_arg(argList, struct test51_s);
|
||
|
|
}
|
||
|
|
|
||
|
|
// CHECK-LABEL: define void @test51
|
||
|
|
// CHECK: [[TMP_ADDR:%.*]] = alloca [[STRUCT_TEST51:%.*]], align 16
|
||
|
|
// CHECK: br i1
|
||
|
|
// CHECK: [[REG_SAVE_AREA_PTR:%.*]] = getelementptr inbounds {{.*}}, i32 0, i32 3
|
||
|
|
// CHECK-NEXT: [[REG_SAVE_AREA:%.*]] = load i8** [[REG_SAVE_AREA_PTR]]
|
||
|
|
// CHECK-NEXT: [[VALUE_ADDR:%.*]] = getelementptr i8* [[REG_SAVE_AREA]], i32 {{.*}}
|
||
|
|
// CHECK-NEXT: [[CASTED_VALUE_ADDR:%.*]] = bitcast i8* [[VALUE_ADDR]] to [[STRUCT_TEST51]]
|
||
|
|
// CHECK-NEXT: [[CASTED_TMP_ADDR:%.*]] = bitcast [[STRUCT_TEST51]]* [[TMP_ADDR]] to i8*
|
||
|
|
// CHECK-NEXT: [[RECASTED_VALUE_ADDR:%.*]] = bitcast [[STRUCT_TEST51]]* [[CASTED_VALUE_ADDR]] to i8*
|
||
|
|
// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[CASTED_TMP_ADDR]], i8* [[RECASTED_VALUE_ADDR]], i64 16, i32 8, i1 false)
|
||
|
|
// CHECK-NEXT: add i32 {{.*}}, 16
|
||
|
|
// CHECK-NEXT: store i32 {{.*}}, i32* {{.*}}
|
||
|
|
// CHECK-NEXT: br label
|
||
|
|
|
||
|
|
void test52_helper(int, ...);
|
||
|
|
__m256 x52;
|
||
|
|
void test52() {
|
||
|
|
test52_helper(0, x52, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
|
||
|
|
}
|
||
|
|
// AVX: @test52_helper(i32 0, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})
|
||
|
|
|
||
|
|
void test53(__m256 *m, __builtin_va_list argList) {
|
||
|
|
*m = __builtin_va_arg(argList, __m256);
|
||
|
|
}
|
||
|
|
// AVX-LABEL: define void @test53
|
||
|
|
// AVX-NOT: br i1
|
||
|
|
// AVX: ret void
|
||
|
|
|
||
|
|
void test54_helper(__m256, ...);
|
||
|
|
__m256 x54;
|
||
|
|
void test54() {
|
||
|
|
test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
|
||
|
|
test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
|
||
|
|
}
|
||
|
|
// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})
|
||
|
|
// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval align 8 {{%[a-zA-Z0-9]+}})
|