2013-05-23 10:03:09 +02:00
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#include <assert.h>
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2012-10-08 03:38:03 +02:00
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#include <sys/types.h>
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#include <machine/cpu.h>
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2013-05-23 10:03:09 +02:00
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#include <minix/type.h>
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2012-10-08 03:38:03 +02:00
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#include <io.h>
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#include "omap_serial.h"
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2013-05-23 10:03:09 +02:00
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struct omap_serial {
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vir_bytes base;
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};
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static struct omap_serial omap_serial = {
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.base = 0,
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};
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/*
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* In kernel serial for the omap. The serial driver like most other
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* drivers needs to be started early and even before the MMU is turned on.
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* We start by directly accessing the hardware memory address. Later on
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* a when the MMU is turned on we still use a 1:1 mapping for these addresses.
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*
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* Pretty soon we are going to remap these addresses at later stage. And this
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* requires us to use a dynamic base address. The idea is to receive a callback
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* from VM with the new address to use.
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*
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* We also anticipate on the beaglebone port an try to keep the differences between
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* the drivers to a minimum by initializing a struct here and not using (to much)
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* constants in the code.
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*
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* The serial driver also gets used in the "pre_init" stage before the kernel is loaded
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* in high memory so keep in mind there are two copies of this code in the kernel.
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*/
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void omap3_ser_init(){
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#ifdef DM37XX
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2013-05-23 13:16:24 +02:00
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omap_serial.base = OMAP3_DM37XX_DEBUG_UART_BASE;
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#endif
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#ifdef AM335X
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omap_serial.base = OMAP3_AM335X_DEBUG_UART_BASE;
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2013-05-23 10:03:09 +02:00
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#endif
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assert(omap_serial.base);
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}
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2012-10-08 03:38:03 +02:00
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void omap3_ser_putc(char c)
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{
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2013-05-23 10:03:09 +02:00
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assert(omap_serial.base);
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2012-10-08 03:38:03 +02:00
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int i;
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/* Wait until FIFO's empty */
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for (i = 0; i < 100000; i++)
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2013-05-23 10:03:09 +02:00
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if (mmio_read(omap_serial.base + OMAP3_LSR) & OMAP3_LSR_THRE)
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2012-10-08 03:38:03 +02:00
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break;
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/* Write character */
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2013-05-23 10:03:09 +02:00
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mmio_write(omap_serial.base + OMAP3_THR, c);
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2012-10-17 16:57:08 +02:00
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/* And wait again until FIFO's empty to prevent TTY from overwriting */
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for (i = 0; i < 100000; i++)
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2013-05-23 10:03:09 +02:00
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if (mmio_read(omap_serial.base + OMAP3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT))
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2012-10-17 16:57:08 +02:00
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break;
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2012-10-08 03:38:03 +02:00
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}
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